1 | /* $NetBSD: uftdireg.h,v 1.10 2016/04/23 10:15:32 skrll Exp $ */ |
2 | |
3 | /* |
4 | * Definitions for the FTDI USB Single Port Serial Converter - |
5 | * known as FTDI_SIO (Serial Input/Output application of the chipset) |
6 | * |
7 | * The device is based on the FTDI FT8U100AX chip. It has a DB25 on one side, |
8 | * USB on the other. |
9 | * |
10 | * Thanx to FTDI (http://www.ftdichip.com) for so kindly providing details |
11 | * of the protocol required to talk to the device and ongoing assistence |
12 | * during development. |
13 | * |
14 | * Bill Ryder - bryder@sgi.com of Silicon Graphics, Inc. is the original |
15 | * author of this file. |
16 | */ |
17 | /* Modified by Lennart Augustsson */ |
18 | |
19 | /* Vendor Request Interface */ |
20 | #define FTDI_SIO_RESET 0 /* Reset the port */ |
21 | #define FTDI_SIO_MODEM_CTRL 1 /* Set the modem control register */ |
22 | #define FTDI_SIO_SET_FLOW_CTRL 2 /* Set flow control register */ |
23 | #define FTDI_SIO_SET_BAUD_RATE 3 /* Set baud rate */ |
24 | #define FTDI_SIO_SET_DATA 4 /* Set the data characteristics of the port */ |
25 | #define FTDI_SIO_GET_STATUS 5 /* Retrieve current value of status reg */ |
26 | #define FTDI_SIO_SET_EVENT_CHAR 6 /* Set the event character */ |
27 | #define FTDI_SIO_SET_ERROR_CHAR 7 /* Set the error character */ |
28 | #define FTDI_SIO_SET_BITMODE 11 /* Set FIFO/Serial mode */ |
29 | |
30 | /* Port Identifier Table */ |
31 | #define FTDI_PIT_DEFAULT 0 /* SIOA */ |
32 | #define FTDI_PIT_SIOA 1 /* SIOA */ |
33 | #define FTDI_PIT_SIOB 2 /* SIOB */ |
34 | #define FTDI_PIT_PARALLEL 3 /* Parallel */ |
35 | |
36 | enum uftdi_type { |
37 | UFTDI_TYPE_SIO, |
38 | UFTDI_TYPE_8U232AM |
39 | }; |
40 | |
41 | /* |
42 | * BmRequestType: 0100 0000B |
43 | * bRequest: FTDI_SIO_RESET |
44 | * wValue: Control Value |
45 | * 0 = Reset SIO |
46 | * 1 = Purge RX buffer |
47 | * 2 = Purge TX buffer |
48 | * wIndex: Port |
49 | * wLength: 0 |
50 | * Data: None |
51 | * |
52 | * The Reset SIO command has this effect: |
53 | * |
54 | * Sets flow control set to 'none' |
55 | * Event char = 0x0d |
56 | * Event trigger = disabled |
57 | * Purge RX buffer |
58 | * Purge TX buffer |
59 | * Clear DTR |
60 | * Clear RTS |
61 | * baud and data format not reset |
62 | * |
63 | * The Purge RX and TX buffer commands affect nothing except the buffers |
64 | * |
65 | */ |
66 | /* FTDI_SIO_RESET */ |
67 | #define FTDI_SIO_RESET_SIO 0 |
68 | #define FTDI_SIO_RESET_PURGE_RX 1 |
69 | #define FTDI_SIO_RESET_PURGE_TX 2 |
70 | |
71 | |
72 | /* |
73 | * BmRequestType: 0100 0000B |
74 | * bRequest: FTDI_SIO_SET_BAUDRATE |
75 | * wValue: BaudRate value - see below |
76 | * wIndex: Port |
77 | * wLength: 0 |
78 | * Data: None |
79 | */ |
80 | /* FTDI_SIO_SET_BAUDRATE */ |
81 | enum { |
82 | ftdi_sio_b300 = 0, |
83 | ftdi_sio_b600 = 1, |
84 | ftdi_sio_b1200 = 2, |
85 | ftdi_sio_b2400 = 3, |
86 | ftdi_sio_b4800 = 4, |
87 | ftdi_sio_b9600 = 5, |
88 | ftdi_sio_b19200 = 6, |
89 | ftdi_sio_b38400 = 7, |
90 | ftdi_sio_b57600 = 8, |
91 | ftdi_sio_b115200 = 9 |
92 | }; |
93 | |
94 | enum { |
95 | ftdi_8u232am_b300 = 0x2710, |
96 | ftdi_8u232am_b600 = 0x1388, |
97 | ftdi_8u232am_b1200 = 0x09c4, |
98 | ftdi_8u232am_b2400 = 0x04e2, |
99 | ftdi_8u232am_b4800 = 0x0271, |
100 | ftdi_8u232am_b9600 = 0x4138, |
101 | ftdi_8u232am_b19200 = 0x809c, |
102 | ftdi_8u232am_b38400 = 0xc04e, |
103 | ftdi_8u232am_b57600 = 0x0034, |
104 | ftdi_8u232am_b115200 = 0x001a, |
105 | ftdi_8u232am_b230400 = 0x000d, |
106 | ftdi_8u232am_b460800 = 0x4006, |
107 | ftdi_8u232am_b921600 = 0x8003 |
108 | }; |
109 | |
110 | /* |
111 | * BmRequestType: 0100 0000B |
112 | * bRequest: FTDI_SIO_SET_DATA |
113 | * wValue: Data characteristics (see below) |
114 | * wIndex: Port |
115 | * wLength: 0 |
116 | * Data: No |
117 | * |
118 | * Data characteristics |
119 | * |
120 | * B0..7 Number of data bits |
121 | * B8..10 Parity |
122 | * 0 = None |
123 | * 1 = Odd |
124 | * 2 = Even |
125 | * 3 = Mark |
126 | * 4 = Space |
127 | * B11..13 Stop Bits |
128 | * 0 = 1 |
129 | * 1 = 1.5 |
130 | * 2 = 2 |
131 | * B14..15 Reserved |
132 | * |
133 | */ |
134 | /* FTDI_SIO_SET_DATA */ |
135 | #define FTDI_SIO_SET_DATA_BITS(n) (n) |
136 | #define FTDI_SIO_SET_DATA_PARITY_NONE (0x0 << 8) |
137 | #define FTDI_SIO_SET_DATA_PARITY_ODD (0x1 << 8) |
138 | #define FTDI_SIO_SET_DATA_PARITY_EVEN (0x2 << 8) |
139 | #define FTDI_SIO_SET_DATA_PARITY_MARK (0x3 << 8) |
140 | #define FTDI_SIO_SET_DATA_PARITY_SPACE (0x4 << 8) |
141 | #define FTDI_SIO_SET_DATA_STOP_BITS_1 (0x0 << 11) |
142 | #define FTDI_SIO_SET_DATA_STOP_BITS_15 (0x1 << 11) |
143 | #define FTDI_SIO_SET_DATA_STOP_BITS_2 (0x2 << 11) |
144 | #define FTDI_SIO_SET_BREAK (0x1 << 14) |
145 | |
146 | |
147 | /* |
148 | * BmRequestType: 0100 0000B |
149 | * bRequest: FTDI_SIO_MODEM_CTRL |
150 | * wValue: ControlValue (see below) |
151 | * wIndex: Port |
152 | * wLength: 0 |
153 | * Data: None |
154 | * |
155 | * NOTE: If the device is in RTS/CTS flow control, the RTS set by this |
156 | * command will be IGNORED without an error being returned |
157 | * Also - you can not set DTR and RTS with one control message |
158 | * |
159 | * ControlValue |
160 | * B0 DTR state |
161 | * 0 = reset |
162 | * 1 = set |
163 | * B1 RTS state |
164 | * 0 = reset |
165 | * 1 = set |
166 | * B2..7 Reserved |
167 | * B8 DTR state enable |
168 | * 0 = ignore |
169 | * 1 = use DTR state |
170 | * B9 RTS state enable |
171 | * 0 = ignore |
172 | * 1 = use RTS state |
173 | * B10..15 Reserved |
174 | */ |
175 | /* FTDI_SIO_MODEM_CTRL */ |
176 | #define FTDI_SIO_SET_DTR_MASK 0x1 |
177 | #define FTDI_SIO_SET_DTR_HIGH (1 | ( FTDI_SIO_SET_DTR_MASK << 8)) |
178 | #define FTDI_SIO_SET_DTR_LOW (0 | ( FTDI_SIO_SET_DTR_MASK << 8)) |
179 | #define FTDI_SIO_SET_RTS_MASK 0x2 |
180 | #define FTDI_SIO_SET_RTS_HIGH (2 | ( FTDI_SIO_SET_RTS_MASK << 8)) |
181 | #define FTDI_SIO_SET_RTS_LOW (0 | ( FTDI_SIO_SET_RTS_MASK << 8)) |
182 | |
183 | |
184 | /* |
185 | * BmRequestType: 0100 0000b |
186 | * bRequest: FTDI_SIO_SET_FLOW_CTRL |
187 | * wValue: Xoff/Xon |
188 | * wIndex: Protocol/Port - hIndex is protocol / lIndex is port |
189 | * wLength: 0 |
190 | * Data: None |
191 | * |
192 | * hIndex protocol is: |
193 | * B0 Output handshaking using RTS/CTS |
194 | * 0 = disabled |
195 | * 1 = enabled |
196 | * B1 Output handshaking using DTR/DSR |
197 | * 0 = disabled |
198 | * 1 = enabled |
199 | * B2 Xon/Xoff handshaking |
200 | * 0 = disabled |
201 | * 1 = enabled |
202 | * |
203 | * A value of zero in the hIndex field disables handshaking |
204 | * |
205 | * If Xon/Xoff handshaking is specified, the hValue field should contain the |
206 | * XOFF character and the lValue field contains the XON character. |
207 | */ |
208 | /* FTDI_SIO_SET_FLOW_CTRL */ |
209 | #define FTDI_SIO_DISABLE_FLOW_CTRL 0x0 |
210 | #define FTDI_SIO_RTS_CTS_HS 0x1 |
211 | #define FTDI_SIO_DTR_DSR_HS 0x2 |
212 | #define FTDI_SIO_XON_XOFF_HS 0x4 |
213 | |
214 | |
215 | /* |
216 | * BmRequestType: 0100 0000b |
217 | * bRequest: FTDI_SIO_SET_EVENT_CHAR |
218 | * wValue: Event Char |
219 | * wIndex: Port |
220 | * wLength: 0 |
221 | * Data: None |
222 | * |
223 | * wValue: |
224 | * B0..7 Event Character |
225 | * B8 Event Character Processing |
226 | * 0 = disabled |
227 | * 1 = enabled |
228 | * B9..15 Reserved |
229 | * |
230 | * FTDI_SIO_SET_EVENT_CHAR |
231 | * |
232 | * Set the special event character for the specified communications port. |
233 | * If the device sees this character it will immediately return the |
234 | * data read so far - rather than wait 40ms or until 62 bytes are read |
235 | * which is what normally happens. |
236 | */ |
237 | |
238 | |
239 | |
240 | /* |
241 | * BmRequestType: 0100 0000b |
242 | * bRequest: FTDI_SIO_SET_ERROR_CHAR |
243 | * wValue: Error Char |
244 | * wIndex: Port |
245 | * wLength: 0 |
246 | * Data: None |
247 | * |
248 | * Error Char |
249 | * B0..7 Error Character |
250 | * B8 Error Character Processing |
251 | * 0 = disabled |
252 | * 1 = enabled |
253 | * B9..15 Reserved |
254 | * |
255 | * |
256 | * FTDI_SIO_SET_ERROR_CHAR |
257 | * Set the parity error replacement character for the specified communications |
258 | * port. |
259 | */ |
260 | |
261 | |
262 | /* |
263 | * BmRequestType: 1100 0000b |
264 | * bRequest: FTDI_SIO_GET_MODEM_STATUS |
265 | * wValue: zero |
266 | * wIndex: Port |
267 | * wLength: 1 |
268 | * Data: Status |
269 | * |
270 | * One byte of data is returned |
271 | * B0..3 0 |
272 | * B4 CTS |
273 | * 0 = inactive |
274 | * 1 = active |
275 | * B5 DSR |
276 | * 0 = inactive |
277 | * 1 = active |
278 | * B6 Ring Indicator (RI) |
279 | * 0 = inactive |
280 | * 1 = active |
281 | * B7 Receive Line Signal Detect (RLSD) |
282 | * 0 = inactive |
283 | * 1 = active |
284 | * |
285 | * FTDI_SIO_GET_MODEM_STATUS |
286 | * Retrieve the current value of the modem status register. |
287 | */ |
288 | #define FTDI_SIO_CTS_MASK 0x10 |
289 | #define FTDI_SIO_DSR_MASK 0x20 |
290 | #define FTDI_SIO_RI_MASK 0x40 |
291 | #define FTDI_SIO_RLSD_MASK 0x80 |
292 | |
293 | |
294 | |
295 | /* |
296 | * |
297 | * DATA FORMAT |
298 | * |
299 | * IN Endpoint |
300 | * |
301 | * The device reserves the first two bytes of data on this endpoint to contain |
302 | * the current values of the modem and line status registers. In the absence of |
303 | * data, the device generates a message consisting of these two status bytes |
304 | * every 40 ms. |
305 | * |
306 | * Byte 0: Modem Status |
307 | * NOTE: 4 upper bits have same layout as the MSR register in a 16550 |
308 | * |
309 | * Offset Description |
310 | * B0..3 Port |
311 | * B4 Clear to Send (CTS) |
312 | * B5 Data Set Ready (DSR) |
313 | * B6 Ring Indicator (RI) |
314 | * B7 Receive Line Signal Detect (RLSD) |
315 | * |
316 | * Byte 1: Line Status |
317 | * NOTE: same layout as the LSR register in a 16550 |
318 | * |
319 | * Offset Description |
320 | * B0 Data Ready (DR) |
321 | * B1 Overrun Error (OE) |
322 | * B2 Parity Error (PE) |
323 | * B3 Framing Error (FE) |
324 | * B4 Break Interrupt (BI) |
325 | * B5 Transmitter Holding Register (THRE) |
326 | * B6 Transmitter Empty (TEMT) |
327 | * B7 Error in RCVR FIFO |
328 | * |
329 | * |
330 | * OUT Endpoint |
331 | * |
332 | * This device reserves the first bytes of data on this endpoint contain the |
333 | * length and port identifier of the message. For the FTDI USB Serial converter |
334 | * the port identifier is always 1. |
335 | * |
336 | * Byte 0: Port & length |
337 | * |
338 | * Offset Description |
339 | * B0..1 Port |
340 | * B2..7 Length of message - (not including Byte 0) |
341 | * |
342 | */ |
343 | #define FTDI_PORT_MASK 0x0f |
344 | #define FTDI_MSR_MASK 0xf0 |
345 | #define FTDI_GET_MSR(p) (((p)[0]) & FTDI_MSR_MASK) |
346 | #define FTDI_GET_LSR(p) ((p)[1]) |
347 | #define FTDI_LSR_MASK (~0x60) /* interesting bits */ |
348 | #define FTDI_OUT_TAG(len, port) (((len) << 2) | (port)) |
349 | |
350 | /* |
351 | * BmRequestType: 0100 0000B |
352 | * bRequest: FTDI_SIO_SET_BITMODE |
353 | * wValue: Bitmode value - see below |
354 | * wIndex: Port |
355 | * wLength: 0 |
356 | * Data: None |
357 | * |
358 | * Not all modes are available on all chips |
359 | */ |
360 | /* FTDI_SIO_SET_BITMODE */ |
361 | #define FTDI_BITMODE_RESET 0x00 /* UART mode */ |
362 | #define FTDI_BITMODE_BITBANG 0x01 /* asynchrounous bitbang mode */ |
363 | #define FTDI_BITMODE_MPSSE 0x02 /* MPSSE mode */ |
364 | #define FTDI_BITMODE_SYNCBB 0x04 /* synchronous bitbang mode */ |
365 | #define FTDI_BITMODE_MCU 0x08 /* MCU Host Bus Emulation mode */ |
366 | #define FTDI_BITMODE_OPTO 0x10 /* Fast Opto-Isolated Serial Interface Mode */ |
367 | #define FTDI_BITMODE_CBUS 0x20 /* Bitbang on CBUS pins */ |
368 | #define FTDI_BITMODE_SYNCFF 0x40 /* Synchronous FIFO mode */ |
369 | |
370 | |