1/* $NetBSD: nsphy.c,v 1.60 2016/07/07 06:55:41 msaitoh Exp $ */
2
3/*-
4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33/*
34 * Copyright (c) 1997 Manuel Bouyer. All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 *
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
46 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
47 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
48 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
50 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
51 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
52 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
53 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
54 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
55 */
56
57/*
58 * driver for National Semiconductor's DP83840A ethernet 10/100 PHY
59 * Data Sheet available from www.national.com
60 */
61
62#include <sys/cdefs.h>
63__KERNEL_RCSID(0, "$NetBSD: nsphy.c,v 1.60 2016/07/07 06:55:41 msaitoh Exp $");
64
65#include <sys/param.h>
66#include <sys/systm.h>
67#include <sys/kernel.h>
68#include <sys/device.h>
69#include <sys/socket.h>
70#include <sys/errno.h>
71
72#include <net/if.h>
73#include <net/if_media.h>
74
75#include <dev/mii/mii.h>
76#include <dev/mii/miivar.h>
77#include <dev/mii/miidevs.h>
78
79#include <dev/mii/nsphyreg.h>
80
81static int nsphymatch(device_t, cfdata_t, void *);
82static void nsphyattach(device_t, device_t, void *);
83
84CFATTACH_DECL_NEW(nsphy, sizeof(struct mii_softc),
85 nsphymatch, nsphyattach, mii_phy_detach, mii_phy_activate);
86
87static int nsphy_service(struct mii_softc *, struct mii_data *, int);
88static void nsphy_status(struct mii_softc *);
89static void nsphy_reset(struct mii_softc *sc);
90
91static const struct mii_phy_funcs nsphy_funcs = {
92 nsphy_service, nsphy_status, nsphy_reset,
93};
94
95static const struct mii_phydesc nsphys[] = {
96 { MII_OUI_xxNATSEMI, MII_MODEL_xxNATSEMI_DP83840,
97 MII_STR_xxNATSEMI_DP83840 },
98
99 { 0, 0,
100 NULL },
101};
102
103static int
104nsphymatch(device_t parent, cfdata_t match, void *aux)
105{
106 struct mii_attach_args *ma = aux;
107
108 if (mii_phy_match(ma, nsphys) != NULL)
109 return (10);
110
111 return (0);
112}
113
114static void
115nsphyattach(device_t parent, device_t self, void *aux)
116{
117 struct mii_softc *sc = device_private(self);
118 struct mii_attach_args *ma = aux;
119 struct mii_data *mii = ma->mii_data;
120 const struct mii_phydesc *mpd;
121
122 mpd = mii_phy_match(ma, nsphys);
123 aprint_naive(": Media interface\n");
124 aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
125
126 sc->mii_dev = self;
127 sc->mii_inst = mii->mii_instance;
128 sc->mii_phy = ma->mii_phyno;
129 sc->mii_funcs = &nsphy_funcs;
130 sc->mii_pdata = mii;
131 sc->mii_flags = ma->mii_flags;
132 sc->mii_anegticks = MII_ANEGTICKS;
133
134 PHY_RESET(sc);
135
136 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
137 aprint_normal_dev(self, "");
138 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0)
139 aprint_error("no media present");
140 else
141 mii_phy_add_media(sc);
142 aprint_normal("\n");
143}
144
145static int
146nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
147{
148 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
149 int reg;
150
151 switch (cmd) {
152 case MII_POLLSTAT:
153 /*
154 * If we're not polling our PHY instance, just return.
155 */
156 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
157 return (0);
158 break;
159
160 case MII_MEDIACHG:
161 /*
162 * If the media indicates a different PHY instance,
163 * isolate ourselves.
164 */
165 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
166 reg = PHY_READ(sc, MII_BMCR);
167 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
168 return (0);
169 }
170
171 /*
172 * If the interface is not up, don't do anything.
173 */
174 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
175 break;
176
177 reg = PHY_READ(sc, MII_NSPHY_PCR);
178
179 /*
180 * Set up the PCR to use LED4 to indicate full-duplex
181 * in both 10baseT and 100baseTX modes.
182 */
183 reg |= PCR_LED4MODE;
184
185 /*
186 * Make sure Carrier Integrity Monitor function is
187 * disabled (normal for Node operation, but sometimes
188 * it's not set?!)
189 */
190 reg |= PCR_CIMDIS;
191
192 /*
193 * Make sure "force link good" is set to normal mode.
194 * It's only intended for debugging.
195 */
196 reg |= PCR_FLINK100;
197
198 /*
199 * Mystery bits which are supposedly `reserved',
200 * but we seem to need to set them when the PHY
201 * is connected to some interfaces:
202 *
203 * 0x0400 is needed for fxp
204 * (Intel EtherExpress Pro 10+/100B, 82557 chip)
205 * (nsphy with a DP83840 chip)
206 * 0x0100 may be needed for some other card
207 */
208 reg |= 0x0100 | 0x0400;
209
210 PHY_WRITE(sc, MII_NSPHY_PCR, reg);
211
212 mii_phy_setmedia(sc);
213 break;
214
215 case MII_TICK:
216 /*
217 * If we're not currently selected, just return.
218 */
219 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
220 return (0);
221
222 if (mii_phy_tick(sc) == EJUSTRETURN)
223 return (0);
224 break;
225
226 case MII_DOWN:
227 mii_phy_down(sc);
228 return (0);
229 }
230
231 /* Update the media status. */
232 mii_phy_status(sc);
233
234 /* Callback if something changed. */
235 mii_phy_update(sc, cmd);
236 return (0);
237}
238
239static void
240nsphy_status(struct mii_softc *sc)
241{
242 struct mii_data *mii = sc->mii_pdata;
243 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
244 int bmsr, bmcr, par, anlpar;
245
246 mii->mii_media_status = IFM_AVALID;
247 mii->mii_media_active = IFM_ETHER;
248
249 bmsr = PHY_READ(sc, MII_BMSR) |
250 PHY_READ(sc, MII_BMSR);
251 if (bmsr & BMSR_LINK)
252 mii->mii_media_status |= IFM_ACTIVE;
253
254 bmcr = PHY_READ(sc, MII_BMCR);
255 if (bmcr & BMCR_ISO) {
256 mii->mii_media_active |= IFM_NONE;
257 mii->mii_media_status = 0;
258 return;
259 }
260
261 if (bmcr & BMCR_LOOP)
262 mii->mii_media_active |= IFM_LOOP;
263
264 if (bmcr & BMCR_AUTOEN) {
265 /*
266 * The PAR status bits are only valid if autonegotiation
267 * has completed (or it's disabled).
268 */
269 if ((bmsr & BMSR_ACOMP) == 0) {
270 /* Erg, still trying, I guess... */
271 mii->mii_media_active |= IFM_NONE;
272 return;
273 }
274
275 /*
276 * Argh. The PAR doesn't seem to indicate duplex mode
277 * properly! Determine media based on link partner's
278 * advertised capabilities.
279 */
280 if (PHY_READ(sc, MII_ANER) & ANER_LPAN) {
281 anlpar = PHY_READ(sc, MII_ANAR) &
282 PHY_READ(sc, MII_ANLPAR);
283 if (anlpar & ANLPAR_TX_FD)
284 mii->mii_media_active |= IFM_100_TX|IFM_FDX;
285 else if (anlpar & ANLPAR_T4)
286 mii->mii_media_active |= IFM_100_T4|IFM_HDX;
287 else if (anlpar & ANLPAR_TX)
288 mii->mii_media_active |= IFM_100_TX|IFM_HDX;
289 else if (anlpar & ANLPAR_10_FD)
290 mii->mii_media_active |= IFM_10_T|IFM_FDX;
291 else if (anlpar & ANLPAR_10)
292 mii->mii_media_active |= IFM_10_T|IFM_HDX;
293 else
294 mii->mii_media_active |= IFM_NONE;
295 return;
296 }
297
298 /*
299 * Link partner is not capable of autonegotiation.
300 * We will never be in full-duplex mode if this is
301 * the case, so reading the PAR is OK.
302 */
303 par = PHY_READ(sc, MII_NSPHY_PAR);
304 if (par & PAR_10)
305 mii->mii_media_active |= IFM_10_T;
306 else
307 mii->mii_media_active |= IFM_100_TX;
308 mii->mii_media_active |= IFM_HDX;
309 } else
310 mii->mii_media_active = ife->ifm_media;
311}
312
313static void
314nsphy_reset(struct mii_softc *sc)
315{
316 int reg, i;
317
318 if (sc->mii_flags & MIIF_NOISOLATE)
319 reg = BMCR_RESET;
320 else
321 reg = BMCR_RESET | BMCR_ISO;
322 PHY_WRITE(sc, MII_BMCR, reg);
323
324 /*
325 * Give it a little time to settle in case we just got power.
326 * The DP83840A data sheet suggests that a soft reset not happen
327 * within 500us of power being applied. Be conservative.
328 */
329 delay(1000);
330
331 /*
332 * Wait another 2s for it to complete.
333 * This is only a little overkill as under normal circumstances
334 * the PHY can take up to 1s to complete reset.
335 * This is also a bit odd because after a reset, the BMCR will
336 * clear the reset bit and simply reports 0 even though the reset
337 * is not yet complete.
338 */
339 for (i = 0; i < 1000; i++) {
340 reg = PHY_READ(sc, MII_BMCR);
341 if (reg && ((reg & BMCR_RESET) == 0))
342 break;
343 delay(2000);
344 }
345
346 if (sc->mii_inst != 0 && ((sc->mii_flags & MIIF_NOISOLATE) == 0)) {
347 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
348 }
349}
350