1 | /* $NetBSD: siisata_cardbus.c,v 1.15 2011/08/01 11:20:28 drochner Exp $ */ |
2 | /* Id: siisata_pci.c,v 1.11 2008/05/21 16:20:11 jakllsch Exp */ |
3 | |
4 | /* |
5 | * Copyright (c) 2006 Manuel Bouyer. |
6 | * |
7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions |
9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * 2. Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
15 | * |
16 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * |
27 | */ |
28 | |
29 | /* |
30 | * Copyright (c) 2007, 2008 Jonathan A. Kollasch. |
31 | * All rights reserved. |
32 | * |
33 | * Redistribution and use in source and binary forms, with or without |
34 | * modification, are permitted provided that the following conditions |
35 | * are met: |
36 | * 1. Redistributions of source code must retain the above copyright |
37 | * notice, this list of conditions and the following disclaimer. |
38 | * 2. Redistributions in binary form must reproduce the above copyright |
39 | * notice, this list of conditions and the following disclaimer in the |
40 | * documentation and/or other materials provided with the distribution. |
41 | * |
42 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
43 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
44 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
45 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
46 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
47 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
48 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
49 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
50 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
51 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
52 | */ |
53 | |
54 | #include <sys/cdefs.h> |
55 | __KERNEL_RCSID(0, "$NetBSD: siisata_cardbus.c,v 1.15 2011/08/01 11:20:28 drochner Exp $" ); |
56 | |
57 | #include <sys/types.h> |
58 | #include <sys/malloc.h> |
59 | #include <sys/param.h> |
60 | #include <sys/kernel.h> |
61 | #include <sys/systm.h> |
62 | |
63 | #include <dev/cardbus/cardbusvar.h> |
64 | #include <dev/pci/pcidevs.h> |
65 | #include <dev/ic/siisatavar.h> |
66 | |
67 | struct siisata_cardbus_softc { |
68 | struct siisata_softc si_sc; |
69 | cardbus_chipset_tag_t sc_cc; |
70 | cardbus_function_tag_t sc_cf; |
71 | cardbus_devfunc_t sc_ct; |
72 | pcitag_t sc_tag; |
73 | bus_space_tag_t sc_iot; /* CardBus I/O space tag */ |
74 | bus_space_tag_t sc_memt; /* CardBus MEM space tag */ |
75 | rbus_tag_t sc_rbus_iot; /* CardBus i/o rbus tag */ |
76 | rbus_tag_t sc_rbus_memt; /* CardBus mem rbus tag */ |
77 | |
78 | bus_size_t sc_grsize; |
79 | bus_size_t sc_prsize; |
80 | void *sc_ih; |
81 | }; |
82 | |
83 | static int siisata_cardbus_match(device_t, cfdata_t, void *); |
84 | static void siisata_cardbus_attach(device_t, device_t, void *); |
85 | static int siisata_cardbus_detach(device_t, int); |
86 | static bool siisata_cardbus_resume(device_t, const pmf_qual_t *); |
87 | |
88 | static const struct siisata_cardbus_product { |
89 | pci_vendor_id_t scp_vendor; |
90 | pci_product_id_t scp_product; |
91 | int scp_ports; |
92 | int scp_chip; |
93 | |
94 | } siisata_cardbus_products[] = { |
95 | { |
96 | PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_3124, |
97 | 4, 3124 |
98 | }, |
99 | { |
100 | 0, 0, |
101 | 0, 0 |
102 | }, |
103 | }; |
104 | |
105 | CFATTACH_DECL_NEW(siisata_cardbus, sizeof(struct siisata_cardbus_softc), |
106 | siisata_cardbus_match, siisata_cardbus_attach, siisata_cardbus_detach, |
107 | NULL); |
108 | |
109 | static const struct siisata_cardbus_product * |
110 | siisata_cardbus_lookup(const struct cardbus_attach_args *ca) |
111 | { |
112 | const struct siisata_cardbus_product *scp; |
113 | |
114 | for (scp = siisata_cardbus_products; scp->scp_ports > 0; scp++) { |
115 | if (PCI_VENDOR(ca->ca_id) == scp->scp_vendor && |
116 | PCI_PRODUCT(ca->ca_id) == scp->scp_product) |
117 | return scp; |
118 | } |
119 | return NULL; |
120 | } |
121 | |
122 | static int |
123 | siisata_cardbus_match(device_t parent, cfdata_t match, void *aux) |
124 | { |
125 | struct cardbus_attach_args *ca = aux; |
126 | |
127 | if (siisata_cardbus_lookup(ca) != NULL) |
128 | return 3; |
129 | |
130 | return 0; |
131 | } |
132 | |
133 | static void |
134 | siisata_cardbus_attach(device_t parent, device_t self, void *aux) |
135 | { |
136 | struct cardbus_attach_args *ca = aux; |
137 | struct siisata_cardbus_softc *csc = device_private(self); |
138 | struct siisata_softc *sc = &csc->si_sc; |
139 | cardbus_devfunc_t ct = ca->ca_ct; |
140 | cardbus_chipset_tag_t cc = ct->ct_cc; |
141 | cardbus_function_tag_t cf = ct->ct_cf; |
142 | pcireg_t csr; |
143 | const struct siisata_cardbus_product *scp; |
144 | bus_space_tag_t memt; |
145 | bus_space_handle_t memh; |
146 | bus_addr_t base; |
147 | bus_size_t grsize, prsize; |
148 | uint32_t gcreg; |
149 | char devinfo[256]; |
150 | |
151 | sc->sc_atac.atac_dev = self; |
152 | |
153 | csc->sc_cc = cc; |
154 | csc->sc_cf = cf; |
155 | csc->sc_ct = ct; |
156 | csc->sc_tag = ca->ca_tag; |
157 | |
158 | csc->sc_iot = ca->ca_iot; |
159 | csc->sc_memt = ca->ca_memt; |
160 | csc->sc_rbus_iot = ca->ca_rbus_iot; |
161 | csc->sc_rbus_memt = ca->ca_rbus_memt; |
162 | |
163 | pci_devinfo(ca->ca_id, ca->ca_class, 0, devinfo, sizeof(devinfo)); |
164 | aprint_naive(": SATA-II HBA\n" ); |
165 | aprint_normal(": %s\n" , devinfo); |
166 | |
167 | /* |
168 | * XXXX |
169 | * Our BAR0/BAR1 type is 64bit Memory. Cardbus_mapreg_map() don't |
170 | * support 64bit Memory. We map ourself... |
171 | */ |
172 | /* map bar0 */ |
173 | { |
174 | #define SIISATA_BAR0_SIZE 128 |
175 | grsize = SIISATA_BAR0_SIZE; |
176 | base = PCI_MAPREG_MEM_ADDR(Cardbus_conf_read(ct, ca->ca_tag, SIISATA_CARDBUS_BAR0)); |
177 | memt = csc->sc_memt; |
178 | if ((*cf->cardbus_space_alloc)(cc, csc->sc_rbus_memt, base, |
179 | grsize, grsize - 1, grsize, 0, &base, &memh)) { |
180 | aprint_error( |
181 | "%s: unable to map device global registers\n" , |
182 | SIISATANAME(sc)); |
183 | return; |
184 | } |
185 | Cardbus_conf_write(ct, ca->ca_tag, SIISATA_CARDBUS_BAR0, base); |
186 | } |
187 | sc->sc_grt = memt; |
188 | sc->sc_grh = memh; |
189 | csc->sc_grsize = grsize; |
190 | |
191 | /* map bar1 */ |
192 | { |
193 | #define SIISATA_BAR1_SIZE (32 * 1024) |
194 | prsize = SIISATA_BAR1_SIZE; |
195 | base = PCI_MAPREG_MEM_ADDR(Cardbus_conf_read(ct, ca->ca_tag, |
196 | SIISATA_CARDBUS_BAR1)); |
197 | memt = csc->sc_memt; |
198 | if ((*cf->cardbus_space_alloc)(cc, csc->sc_rbus_memt, base, |
199 | prsize, prsize - 1, prsize, 0, &base, &memh)) { |
200 | Cardbus_conf_write(ct, ca->ca_tag, |
201 | SIISATA_CARDBUS_BAR0, 0); |
202 | (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, |
203 | sc->sc_grh, grsize); |
204 | aprint_error( |
205 | "%s: unable to map device port registers\n" , |
206 | SIISATANAME(sc)); |
207 | return; |
208 | } |
209 | Cardbus_conf_write(ct, ca->ca_tag, SIISATA_CARDBUS_BAR1, base); |
210 | } |
211 | sc->sc_prt = memt; |
212 | sc->sc_prh = memh; |
213 | csc->sc_prsize = prsize; |
214 | |
215 | sc->sc_dmat = ca->ca_dmat; |
216 | |
217 | /* map interrupt */ |
218 | csc->sc_ih = Cardbus_intr_establish(ct, IPL_BIO, siisata_intr, sc); |
219 | if (csc->sc_ih == NULL) { |
220 | Cardbus_conf_write(ct, ca->ca_tag, SIISATA_CARDBUS_BAR0, 0); |
221 | (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, sc->sc_grh, |
222 | grsize); |
223 | Cardbus_conf_write(ct, ca->ca_tag, SIISATA_CARDBUS_BAR1, 0); |
224 | (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, sc->sc_prh, |
225 | prsize); |
226 | aprint_error("%s: couldn't establish interrupt\n" , |
227 | SIISATANAME(sc)); |
228 | return; |
229 | } |
230 | |
231 | /* fill in number of ports on this device */ |
232 | scp = siisata_cardbus_lookup(ca); |
233 | if (scp != NULL) |
234 | sc->sc_atac.atac_nchannels = scp->scp_ports; |
235 | else |
236 | /* _match() should prevent us from getting here */ |
237 | panic("siisata: the universe might be falling apart!\n" ); |
238 | |
239 | /* enable bus mastering in case the firmware didn't */ |
240 | csr = Cardbus_conf_read(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG); |
241 | csr |= PCI_COMMAND_MASTER_ENABLE; |
242 | csr |= PCI_COMMAND_MEM_ENABLE; |
243 | Cardbus_conf_write(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG, csr); |
244 | |
245 | gcreg = GRREAD(sc, GR_GC); |
246 | |
247 | /* CardBus supports only 32-bit 33MHz */ |
248 | KASSERT(!(gcreg & |
249 | (GR_GC_REQ64|GR_GC_DEVSEL|GR_GC_STOP|GR_GC_TRDY|GR_GC_M66EN))); |
250 | |
251 | aprint_normal("%s: SiI%d on 32-bit, 33MHz PCI (CardBus)." , |
252 | SIISATANAME(sc), scp->scp_chip); |
253 | if (gcreg & GR_GC_3GBPS) |
254 | aprint_normal(" 3.0Gb/s capable.\n" ); |
255 | else |
256 | aprint_normal("\n" ); |
257 | |
258 | siisata_attach(sc); |
259 | |
260 | if (!pmf_device_register(self, NULL, siisata_cardbus_resume)) |
261 | aprint_error_dev(self, "couldn't establish power handler\n" ); |
262 | } |
263 | |
264 | static int |
265 | siisata_cardbus_detach(device_t self, int flags) |
266 | { |
267 | struct siisata_cardbus_softc *csc = device_private(self); |
268 | struct siisata_softc *sc = &csc->si_sc; |
269 | struct cardbus_devfunc *ct = csc->sc_ct; |
270 | cardbus_chipset_tag_t cc = ct->ct_cc; |
271 | cardbus_function_tag_t cf = ct->ct_cf; |
272 | pcitag_t ctag = csc->sc_tag; |
273 | int rv; |
274 | |
275 | rv = siisata_detach(sc, flags); |
276 | if (rv) |
277 | return (rv); |
278 | if (csc->sc_ih != NULL) { |
279 | Cardbus_intr_disestablish(ct, csc->sc_ih); |
280 | csc->sc_ih = NULL; |
281 | } |
282 | if (csc->sc_grsize) { |
283 | Cardbus_conf_write(ct, ctag, SIISATA_CARDBUS_BAR0, 0); |
284 | (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, sc->sc_grh, |
285 | csc->sc_grsize); |
286 | csc->sc_grsize = 0; |
287 | } |
288 | if (csc->sc_prsize) { |
289 | Cardbus_conf_write(ct, ctag, SIISATA_CARDBUS_BAR1, 0); |
290 | (*cf->cardbus_space_free)(cc, csc->sc_rbus_memt, sc->sc_prh, |
291 | csc->sc_prsize); |
292 | csc->sc_prsize = 0; |
293 | } |
294 | return 0; |
295 | } |
296 | |
297 | static bool |
298 | siisata_cardbus_resume(device_t dv, const pmf_qual_t *qual) |
299 | { |
300 | struct siisata_cardbus_softc *csc = device_private(dv); |
301 | struct siisata_softc *sc = &csc->si_sc; |
302 | int s; |
303 | |
304 | s = splbio(); |
305 | siisata_resume(sc); |
306 | splx(s); |
307 | |
308 | return true; |
309 | } |
310 | |