1 | /****************************************************************************** |
2 | |
3 | Copyright (c) 2001-2012, Intel Corporation |
4 | All rights reserved. |
5 | |
6 | Redistribution and use in source and binary forms, with or without |
7 | modification, are permitted provided that the following conditions are met: |
8 | |
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10 | this list of conditions and the following disclaimer. |
11 | |
12 | 2. Redistributions in binary form must reproduce the above copyright |
13 | notice, this list of conditions and the following disclaimer in the |
14 | documentation and/or other materials provided with the distribution. |
15 | |
16 | 3. Neither the name of the Intel Corporation nor the names of its |
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18 | this software without specific prior written permission. |
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20 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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30 | POSSIBILITY OF SUCH DAMAGE. |
31 | |
32 | ******************************************************************************/ |
33 | /*$FreeBSD: head/sys/dev/ixgbe/ixv.h 257176 2013-10-26 17:58:36Z glebius $*/ |
34 | /*$NetBSD: ixv.h,v 1.7 2015/08/17 06:16:03 knakahara Exp $*/ |
35 | |
36 | |
37 | #ifndef _IXV_H_ |
38 | #define _IXV_H_ |
39 | |
40 | |
41 | #include <sys/param.h> |
42 | #include <sys/reboot.h> |
43 | #include <sys/systm.h> |
44 | #include <sys/mbuf.h> |
45 | #include <sys/protosw.h> |
46 | #include <sys/socket.h> |
47 | #include <sys/malloc.h> |
48 | #include <sys/kernel.h> |
49 | #include <sys/lock.h> |
50 | #include <sys/module.h> |
51 | #include <sys/mutex.h> |
52 | #include <sys/sockio.h> |
53 | |
54 | #include <net/if.h> |
55 | #include <net/if_arp.h> |
56 | #include <net/bpf.h> |
57 | #include <net/if_ether.h> |
58 | #include <net/if_dl.h> |
59 | #include <net/if_media.h> |
60 | |
61 | #include <net/bpf.h> |
62 | #include <net/if_types.h> |
63 | #include <net/if_vlanvar.h> |
64 | |
65 | #include <netinet/in_systm.h> |
66 | #include <netinet/in.h> |
67 | #include <netinet/ip.h> |
68 | #include <netinet/ip6.h> |
69 | #include <netinet/tcp.h> |
70 | #include <netinet/udp.h> |
71 | |
72 | #include <sys/bus.h> |
73 | #include <dev/pci/pcivar.h> |
74 | #include <dev/pci/pcireg.h> |
75 | #include <sys/proc.h> |
76 | #include <sys/sysctl.h> |
77 | #include <sys/endian.h> |
78 | #include <sys/interrupt.h> |
79 | |
80 | #include "ixgbe_netbsd.h" |
81 | #include "ixgbe_api.h" |
82 | #include "ixgbe_vf.h" |
83 | |
84 | /* Tunables */ |
85 | |
86 | /* |
87 | * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the |
88 | * number of transmit descriptors allocated by the driver. Increasing this |
89 | * value allows the driver to queue more transmits. Each descriptor is 16 |
90 | * bytes. Performance tests have show the 2K value to be optimal for top |
91 | * performance. |
92 | */ |
93 | #define DEFAULT_TXD 1024 |
94 | #define PERFORM_TXD 2048 |
95 | #define MAX_TXD 4096 |
96 | #define MIN_TXD 64 |
97 | |
98 | /* |
99 | * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the |
100 | * number of receive descriptors allocated for each RX queue. Increasing this |
101 | * value allows the driver to buffer more incoming packets. Each descriptor |
102 | * is 16 bytes. A receive buffer is also allocated for each descriptor. |
103 | * |
104 | * Note: with 8 rings and a dual port card, it is possible to bump up |
105 | * against the system mbuf pool limit, you can tune nmbclusters |
106 | * to adjust for this. |
107 | */ |
108 | #define DEFAULT_RXD 1024 |
109 | #define PERFORM_RXD 2048 |
110 | #define MAX_RXD 4096 |
111 | #define MIN_RXD 64 |
112 | |
113 | /* Alignment for rings */ |
114 | #define DBA_ALIGN 128 |
115 | |
116 | /* |
117 | * This parameter controls the maximum no of times the driver will loop in |
118 | * the isr. Minimum Value = 1 |
119 | */ |
120 | #define MAX_LOOP 10 |
121 | |
122 | /* |
123 | * This is the max watchdog interval, ie. the time that can |
124 | * pass between any two TX clean operations, such only happening |
125 | * when the TX hardware is functioning. |
126 | */ |
127 | #define IXV_WATCHDOG (10 * hz) |
128 | |
129 | /* |
130 | * This parameters control when the driver calls the routine to reclaim |
131 | * transmit descriptors. |
132 | */ |
133 | #define IXV_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8) |
134 | #define IXV_TX_OP_THRESHOLD (adapter->num_tx_desc / 32) |
135 | |
136 | #define IXV_MAX_FRAME_SIZE 0x3F00 |
137 | |
138 | /* Flow control constants */ |
139 | #define IXV_FC_PAUSE 0xFFFF |
140 | #define IXV_FC_HI 0x20000 |
141 | #define IXV_FC_LO 0x10000 |
142 | |
143 | /* Defines for printing debug information */ |
144 | #define DEBUG_INIT 0 |
145 | #define DEBUG_IOCTL 0 |
146 | #define DEBUG_HW 0 |
147 | |
148 | #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") |
149 | #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) |
150 | #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) |
151 | #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") |
152 | #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) |
153 | #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) |
154 | #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") |
155 | #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) |
156 | #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) |
157 | |
158 | #define MAX_NUM_MULTICAST_ADDRESSES 128 |
159 | #define IXV_EITR_DEFAULT 128 |
160 | #define IXV_SCATTER 32 |
161 | #define IXV_RX_HDR 128 |
162 | #define MSIX_BAR 3 |
163 | #define IXV_TSO_SIZE 65535 |
164 | #define IXV_BR_SIZE 4096 |
165 | #define IXV_LINK_ITR 2000 |
166 | #define TX_BUFFER_SIZE ((u32) 1514) |
167 | #define VFTA_SIZE 128 |
168 | |
169 | /* Offload bits in mbuf flag */ |
170 | #define M_CSUM_OFFLOAD \ |
171 | (M_CSUM_IPv4|M_CSUM_UDPv4|M_CSUM_TCPv4|M_CSUM_UDPv6|M_CSUM_TCPv6) |
172 | |
173 | /* |
174 | ***************************************************************************** |
175 | * vendor_info_array |
176 | * |
177 | * This array contains the list of Subvendor/Subdevice IDs on which the driver |
178 | * should load. |
179 | * |
180 | ***************************************************************************** |
181 | */ |
182 | typedef struct _ixv_vendor_info_t { |
183 | unsigned int vendor_id; |
184 | unsigned int device_id; |
185 | unsigned int subvendor_id; |
186 | unsigned int subdevice_id; |
187 | unsigned int index; |
188 | } ixv_vendor_info_t; |
189 | |
190 | |
191 | struct ixv_tx_buf { |
192 | u32 eop_index; |
193 | struct mbuf *m_head; |
194 | bus_dmamap_t map; |
195 | }; |
196 | |
197 | struct ixv_rx_buf { |
198 | struct mbuf *m_head; |
199 | struct mbuf *m_pack; |
200 | struct mbuf *fmp; |
201 | bus_dmamap_t hmap; |
202 | bus_dmamap_t pmap; |
203 | }; |
204 | |
205 | /* |
206 | * Bus dma allocation structure used by ixv_dma_malloc and ixv_dma_free. |
207 | */ |
208 | struct ixv_dma_alloc { |
209 | bus_addr_t dma_paddr; |
210 | void *dma_vaddr; |
211 | ixgbe_dma_tag_t *dma_tag; /* XXX s/ixgbe/ixv/ --msaitoh */ |
212 | bus_dmamap_t dma_map; |
213 | bus_dma_segment_t dma_seg; |
214 | bus_size_t dma_size; |
215 | int dma_nseg; |
216 | }; |
217 | |
218 | /* |
219 | ** Driver queue struct: this is the interrupt container |
220 | ** for the associated tx and rx ring. |
221 | */ |
222 | struct ix_queue { |
223 | struct adapter *adapter; |
224 | u32 msix; /* This queue's MSIX vector */ |
225 | u32 eims; /* This queue's EIMS bit */ |
226 | u32 eitr_setting; |
227 | u32 eitr; /* cached reg */ |
228 | struct resource *res; |
229 | void *tag; |
230 | struct tx_ring *txr; |
231 | struct rx_ring *rxr; |
232 | void *que_si; |
233 | u64 irqs; |
234 | }; |
235 | |
236 | /* |
237 | * The transmit ring, one per queue |
238 | */ |
239 | struct tx_ring { |
240 | struct adapter *adapter; |
241 | kmutex_t tx_mtx; |
242 | u32 me; |
243 | bool watchdog_check; |
244 | struct timeval watchdog_time; |
245 | union ixgbe_adv_tx_desc *tx_base; |
246 | struct ixv_dma_alloc txdma; |
247 | u32 next_avail_desc; |
248 | u32 next_to_clean; |
249 | struct ixv_tx_buf *tx_buffers; |
250 | volatile u16 tx_avail; |
251 | u32 txd_cmd; |
252 | ixgbe_dma_tag_t *txtag; |
253 | char mtx_name[16]; |
254 | struct buf_ring *br; |
255 | /* Soft Stats */ |
256 | u32 bytes; |
257 | u32 packets; |
258 | struct evcnt no_desc_avail; |
259 | struct evcnt total_packets; |
260 | }; |
261 | |
262 | |
263 | /* |
264 | * The Receive ring, one per rx queue |
265 | */ |
266 | struct rx_ring { |
267 | struct adapter *adapter; |
268 | kmutex_t rx_mtx; |
269 | u32 me; |
270 | union ixgbe_adv_rx_desc *rx_base; |
271 | struct ixv_dma_alloc rxdma; |
272 | #ifdef LRO |
273 | struct lro_ctrl lro; |
274 | #endif /* LRO */ |
275 | bool lro_enabled; |
276 | bool hdr_split; |
277 | bool discard; |
278 | u32 next_to_refresh; |
279 | u32 next_to_check; |
280 | char mtx_name[16]; |
281 | struct ixv_rx_buf *rx_buffers; |
282 | ixgbe_dma_tag_t *htag; |
283 | ixgbe_dma_tag_t *ptag; |
284 | |
285 | u32 bytes; /* Used for AIM calc */ |
286 | u32 packets; |
287 | |
288 | /* Soft stats */ |
289 | struct evcnt rx_irq; |
290 | struct evcnt rx_split_packets; |
291 | struct evcnt rx_packets; |
292 | struct evcnt rx_bytes; |
293 | struct evcnt rx_discarded; |
294 | struct evcnt no_jmbuf; |
295 | }; |
296 | |
297 | /* Our adapter structure */ |
298 | struct adapter { |
299 | struct ifnet *ifp; |
300 | struct ixgbe_hw hw; |
301 | |
302 | struct ixgbe_osdep osdep; |
303 | device_t dev; |
304 | |
305 | struct resource *pci_mem; |
306 | struct resource *msix_mem; |
307 | |
308 | /* |
309 | * Interrupt resources: this set is |
310 | * either used for legacy, or for Link |
311 | * when doing MSIX |
312 | */ |
313 | void *tag; |
314 | struct resource *res; |
315 | |
316 | struct ifmedia media; |
317 | struct callout timer; |
318 | int msix; |
319 | int if_flags; |
320 | |
321 | kmutex_t core_mtx; |
322 | |
323 | #if 0 |
324 | eventhandler_tag vlan_attach; |
325 | eventhandler_tag vlan_detach; |
326 | #endif |
327 | |
328 | u16 num_vlans; |
329 | u16 num_queues; |
330 | |
331 | /* Info about the board itself */ |
332 | bool link_active; |
333 | u16 max_frame_size; |
334 | u32 link_speed; |
335 | bool link_up; |
336 | u32 mbxvec; |
337 | |
338 | /* Mbuf cluster size */ |
339 | u32 rx_mbuf_sz; |
340 | |
341 | /* Support for pluggable optics */ |
342 | void *mbx_si; /* Mailbox tasklet */ |
343 | |
344 | /* |
345 | ** Queues: |
346 | ** This is the irq holder, it has |
347 | ** and RX/TX pair or rings associated |
348 | ** with it. |
349 | */ |
350 | struct ix_queue *queues; |
351 | |
352 | /* |
353 | * Transmit rings: |
354 | * Allocated at run time, an array of rings. |
355 | */ |
356 | struct tx_ring *tx_rings; |
357 | int num_tx_desc; |
358 | |
359 | /* |
360 | * Receive rings: |
361 | * Allocated at run time, an array of rings. |
362 | */ |
363 | struct rx_ring *rx_rings; |
364 | int num_rx_desc; |
365 | u64 que_mask; |
366 | u32 rx_process_limit; |
367 | |
368 | /* Misc stats maintained by the driver */ |
369 | struct evcnt dropped_pkts; |
370 | struct evcnt mbuf_defrag_failed; |
371 | struct evcnt ; |
372 | struct evcnt mbuf_packet_failed; |
373 | struct evcnt no_tx_map_avail; |
374 | struct evcnt no_tx_dma_setup; |
375 | |
376 | struct evcnt efbig_tx_dma_setup; |
377 | struct evcnt efbig2_tx_dma_setup; |
378 | struct evcnt m_defrag_failed; |
379 | struct evcnt einval_tx_dma_setup; |
380 | struct evcnt other_tx_dma_setup; |
381 | struct evcnt eagain_tx_dma_setup; |
382 | struct evcnt enomem_tx_dma_setup; |
383 | struct evcnt watchdog_events; |
384 | struct evcnt tso_err; |
385 | struct evcnt tso_tx; |
386 | struct evcnt mbx_irq; |
387 | struct evcnt req; |
388 | |
389 | struct ixgbevf_hw_stats stats; |
390 | struct sysctllog *sysctllog; |
391 | ixgbe_extmem_head_t jcl_head; |
392 | }; |
393 | |
394 | |
395 | #define IXV_CORE_LOCK_INIT(_sc, _name) \ |
396 | mutex_init(&(_sc)->core_mtx, MUTEX_DEFAULT, IPL_SOFTNET) |
397 | #define IXV_CORE_LOCK_DESTROY(_sc) mutex_destroy(&(_sc)->core_mtx) |
398 | #define IXV_TX_LOCK_DESTROY(_sc) mutex_destroy(&(_sc)->tx_mtx) |
399 | #define IXV_RX_LOCK_DESTROY(_sc) mutex_destroy(&(_sc)->rx_mtx) |
400 | #define IXV_CORE_LOCK(_sc) mutex_enter(&(_sc)->core_mtx) |
401 | #define IXV_TX_LOCK(_sc) mutex_enter(&(_sc)->tx_mtx) |
402 | #define IXV_TX_TRYLOCK(_sc) mutex_tryenter(&(_sc)->tx_mtx) |
403 | #define IXV_RX_LOCK(_sc) mutex_enter(&(_sc)->rx_mtx) |
404 | #define IXV_CORE_UNLOCK(_sc) mutex_exit(&(_sc)->core_mtx) |
405 | #define IXV_TX_UNLOCK(_sc) mutex_exit(&(_sc)->tx_mtx) |
406 | #define IXV_RX_UNLOCK(_sc) mutex_exit(&(_sc)->rx_mtx) |
407 | #define IXV_CORE_LOCK_ASSERT(_sc) KASSERT(mutex_owned(&(_sc)->core_mtx)) |
408 | #define IXV_TX_LOCK_ASSERT(_sc) KASSERT(mutex_owned(&(_sc)->tx_mtx)) |
409 | |
410 | /* Workaround to make 8.0 buildable */ |
411 | #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504 |
412 | static __inline int |
413 | drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br) |
414 | { |
415 | #ifdef ALTQ |
416 | if (ALTQ_IS_ENABLED(&ifp->if_snd)) |
417 | return (1); |
418 | #endif |
419 | return (!buf_ring_empty(br)); |
420 | } |
421 | #endif |
422 | |
423 | /* |
424 | ** Find the number of unrefreshed RX descriptors |
425 | */ |
426 | static inline u16 |
427 | ixv_rx_unrefreshed(struct rx_ring *rxr) |
428 | { |
429 | struct adapter *adapter = rxr->adapter; |
430 | |
431 | if (rxr->next_to_check > rxr->next_to_refresh) |
432 | return (rxr->next_to_check - rxr->next_to_refresh - 1); |
433 | else |
434 | return ((adapter->num_rx_desc + rxr->next_to_check) - |
435 | rxr->next_to_refresh - 1); |
436 | } |
437 | |
438 | #endif /* _IXV_H_ */ |
439 | |