1/* $NetBSD: emuxkivar.h,v 1.13 2011/11/23 23:07:35 jmcneill Exp $ */
2
3/*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Yannick Montulet.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#ifndef _DEV_PCI_EMU10K1VAR_H_
33#define _DEV_PCI_EMU10K1VAR_H_
34
35#define EMU_PCI_CBIO 0x10
36#define EMU_SUBSYS_APS 0x40011102
37
38/*
39 * DMA memory management
40 */
41
42struct dmamem {
43 bus_dma_tag_t dmat;
44 bus_size_t size;
45 bus_size_t align;
46 bus_size_t bound;
47 bus_dma_segment_t *segs;
48 int nsegs;
49 int rsegs;
50 void * kaddr;
51 bus_dmamap_t map;
52};
53
54#define KERNADDR(ptr) ((void *)((ptr)->kaddr))
55#define DMASEGADDR(ptr, segno) ((ptr)->segs[segno].ds_addr)
56#define DMAADDR(ptr) DMASEGADDR(ptr, 0)
57#define DMASIZE(ptr) ((ptr)->size)
58
59/*
60 * Emu10k1 hardware limits
61 */
62
63#define EMU_PTESIZE 4096
64#define EMU_MAXPTE ((EMU_CHAN_PSST_LOOPSTARTADDR_MASK + 1) / \
65 EMU_PTESIZE)
66#define EMU_NUMCHAN 64
67#define EMU_NUMRECSRCS 3
68
69#define EMU_DMA_ALIGN 4096
70#define EMU_DMAMEM_NSEG 1
71
72/*
73 * Emu10k1 memory management
74 */
75
76struct emuxki_mem {
77 LIST_ENTRY(emuxki_mem) next;
78 struct dmamem *dmamem;
79 uint16_t ptbidx;
80#define EMU_RMEM 0xFFFF /* recording memory */
81};
82
83/*
84 * Emu10k1 play channel params
85 */
86
87struct emuxki_chanparms_fxsend {
88 struct {
89 uint8_t level, dest;
90 } a, b, c, d, e, f, g, h;
91};
92
93struct emuxki_chanparms_pitch {
94 uint16_t initial;/* 4 bits of octave, 12 bits of fractional
95 * octave */
96 uint16_t current;/* 0x4000 == unity pitch shift */
97 uint16_t target; /* 0x4000 == unity pitch shift */
98 uint8_t envelope_amount; /* Signed 2's complement, +/-
99 * one octave peak extremes */
100};
101
102struct emuxki_chanparms_envelope {
103 uint16_t current_state; /* 0x8000-n == 666*n usec delay */
104 uint8_t hold_time; /* 127-n == n*(volume ? 88.2 :
105 * 42)msec */
106 uint8_t attack_time; /* 0 = infinite, 1 = (volume ? 11 :
107 * 10.9) msec, 0x7f = 5.5msec */
108 uint8_t sustain_level; /* 127 = full, 0 = off, 0.75dB
109 * increments */
110 uint8_t decay_time; /* 0 = 43.7msec, 1 = 21.8msec, 0x7f =
111 * 22msec */
112};
113
114struct emuxki_chanparms_volume {
115 uint16_t current, target;
116 struct emuxki_chanparms_envelope envelope;
117};
118
119struct emuxki_chanparms_filter {
120 uint16_t initial_cutoff_frequency;
121 /*
122 * 6 most significant bits are semitones, 2 least significant bits
123 * are fractions
124 */
125 uint16_t current_cutoff_frequency;
126 uint16_t target_cutoff_frequency;
127 uint8_t lowpass_resonance_height;
128 uint8_t interpolation_ROM; /* 1 = full band, 7 = low
129 * pass */
130 uint8_t envelope_amount; /* Signed 2's complement, +/-
131 * six octaves peak extremes */
132 uint8_t LFO_modulation_depth; /* Signed 2's complement, +/-
133 * three octave extremes */
134};
135
136struct emuxki_chanparms_loop {
137 uint32_t start; /* index in the PTB (in samples) */
138 uint32_t end; /* index in the PTB (in samples) */
139};
140
141struct emuxki_chanparms_modulation {
142 struct emuxki_chanparms_envelope envelope;
143 uint16_t LFO_state; /* 0x8000-n = 666*n usec delay */
144};
145
146struct emuxki_chanparms_vibrato_LFO {
147 uint16_t state; /* 0x8000-n == 666*n usec delay */
148 uint8_t modulation_depth; /* Signed 2's complement, +/-
149 * one octave extremes */
150 uint8_t vibrato_depth; /* Signed 2's complement, +/- one
151 * octave extremes */
152 uint8_t frequency; /* 0.039Hz steps, maximum of 9.85 Hz */
153};
154
155struct emuxki_channel {
156 uint8_t num; /* voice number */
157 struct emuxki_voice *voice;
158 struct emuxki_chanparms_fxsend fxsend;
159 struct emuxki_chanparms_pitch pitch;
160 uint16_t initial_attenuation; /* 0.375dB steps */
161 struct emuxki_chanparms_volume volume;
162 struct emuxki_chanparms_filter filter;
163 struct emuxki_chanparms_loop loop;
164 struct emuxki_chanparms_modulation modulation;
165 struct emuxki_chanparms_vibrato_LFO vibrato_LFO;
166 uint8_t tremolo_depth;
167};
168
169/*
170 * Voices, streams
171 */
172
173typedef enum {
174 EMU_RECSRC_MIC = 0,
175 EMU_RECSRC_ADC,
176 EMU_RECSRC_FX,
177 EMU_RECSRC_NOTSET
178} emuxki_recsrc_t;
179
180struct emuxki_voice {
181 struct emuxki_softc *sc; /* our softc */
182
183 uint8_t use;
184#define EMU_VOICE_USE_PLAY (1 << 0)
185 uint8_t state;
186#define EMU_VOICE_STATE_STARTED (1 << 0)
187 uint8_t stereo;
188#define EMU_VOICE_STEREO_NOTSET 0xFF
189 uint8_t b16;
190 uint32_t sample_rate;
191 union {
192 struct emuxki_channel *chan[2];
193 emuxki_recsrc_t source;
194 } dataloc;
195 struct emuxki_mem *buffer;
196 uint16_t blksize;/* in samples */
197 uint16_t trigblk;/* blk on which to trigger inth */
198 uint16_t blkmod; /* Modulo value to wrap trigblk */
199 uint16_t timerate;
200 void (*inth)(void *);
201 void *inthparam;
202 LIST_ENTRY(emuxki_voice) next;
203};
204
205#if 0 /* Not yet */
206/*
207 * I intend this to be able to manage things like AC-3
208 */
209struct emuxki_stream {
210 struct emu10k1 *emu;
211 uint8_t nmono;
212 uint8_t nstereo;
213 struct emuxki_voice *mono;
214 struct emuxki_voice *stereo;
215 LIST_ENTRY(emuxki_stream) next;
216};
217#endif /* Not yet */
218
219struct emuxki_softc {
220 device_t sc_dev;
221 audio_device_t sc_audv;
222 enum {
223 EMUXKI_SBLIVE = 0x00, EMUXKI_AUDIGY = 0x01,
224 EMUXKI_AUDIGY2 = 0x02, EMUXKI_LIVE_5_1 = 0x04,
225 EMUXKI_APS = 0x08
226 } sc_type;
227
228 /* Autoconfig parameters */
229 bus_space_tag_t sc_iot;
230 bus_space_handle_t sc_ioh;
231 bus_addr_t sc_iob;
232 bus_size_t sc_ios;
233 pci_chipset_tag_t sc_pc; /* PCI tag */
234 bus_dma_tag_t sc_dmat;
235 void *sc_ih; /* interrupt handler */
236 kmutex_t sc_intr_lock;
237 kmutex_t sc_lock;
238 kmutex_t sc_index_lock;
239 kmutex_t sc_ac97_index_lock;
240
241 /* EMU10K1 device structures */
242 LIST_HEAD(, emuxki_mem) mem;
243
244 struct dmamem *ptb;
245 struct dmamem *silentpage;
246
247 struct emuxki_channel *channel[EMU_NUMCHAN];
248 struct emuxki_voice *recsrc[EMU_NUMRECSRCS];
249
250 LIST_HEAD(, emuxki_voice) voices;
251 /* LIST_HEAD(, emuxki_stream) streams; */
252
253 uint8_t timerstate;
254#define EMU_TIMER_STATE_ENABLED 1
255
256 struct ac97_host_if hostif;
257 struct ac97_codec_if *codecif;
258 device_t sc_audev;
259
260 struct emuxki_voice *pvoice, *rvoice, *lvoice;
261};
262
263#endif /* !_DEV_PCI_EMU10K1VAR_H_ */
264