1 | /* $NetBSD: uhci_pci.c,v 1.60 2016/04/23 10:15:31 skrll Exp $ */ |
2 | |
3 | /* |
4 | * Copyright (c) 1998 The NetBSD Foundation, Inc. |
5 | * All rights reserved. |
6 | * |
7 | * This code is derived from software contributed to The NetBSD Foundation |
8 | * by Lennart Augustsson (lennart@augustsson.net) at |
9 | * Carlstedt Research & Technology. |
10 | * |
11 | * Redistribution and use in source and binary forms, with or without |
12 | * modification, are permitted provided that the following conditions |
13 | * are met: |
14 | * 1. Redistributions of source code must retain the above copyright |
15 | * notice, this list of conditions and the following disclaimer. |
16 | * 2. Redistributions in binary form must reproduce the above copyright |
17 | * notice, this list of conditions and the following disclaimer in the |
18 | * documentation and/or other materials provided with the distribution. |
19 | * |
20 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
21 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
22 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
23 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
24 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
25 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
26 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
27 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
28 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
29 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
30 | * POSSIBILITY OF SUCH DAMAGE. |
31 | */ |
32 | |
33 | #include <sys/cdefs.h> |
34 | __KERNEL_RCSID(0, "$NetBSD: uhci_pci.c,v 1.60 2016/04/23 10:15:31 skrll Exp $" ); |
35 | |
36 | #include "ehci.h" |
37 | |
38 | #include <sys/param.h> |
39 | #include <sys/systm.h> |
40 | #include <sys/kernel.h> |
41 | #include <sys/device.h> |
42 | #include <sys/proc.h> |
43 | #include <sys/queue.h> |
44 | |
45 | #include <sys/bus.h> |
46 | |
47 | #include <dev/pci/pcivar.h> |
48 | #include <dev/pci/usb_pci.h> |
49 | |
50 | #include <dev/usb/usb.h> |
51 | #include <dev/usb/usbdi.h> |
52 | #include <dev/usb/usbdivar.h> |
53 | #include <dev/usb/usb_mem.h> |
54 | |
55 | #include <dev/usb/uhcireg.h> |
56 | #include <dev/usb/uhcivar.h> |
57 | |
58 | static bool uhci_pci_resume(device_t, const pmf_qual_t *); |
59 | |
60 | struct uhci_pci_softc { |
61 | uhci_softc_t sc; |
62 | #if NEHCI > 0 |
63 | struct usb_pci sc_pci; |
64 | #endif |
65 | pci_chipset_tag_t sc_pc; |
66 | pcitag_t sc_tag; |
67 | void *sc_ih; /* interrupt vectoring */ |
68 | unsigned sc_initialized; |
69 | #define SC_INIT_UHCI 1 |
70 | #define SC_INIT_PMF 2 |
71 | }; |
72 | |
73 | static int |
74 | uhci_pci_match(device_t parent, cfdata_t match, void *aux) |
75 | { |
76 | struct pci_attach_args *pa = (struct pci_attach_args *) aux; |
77 | |
78 | if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS && |
79 | PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB && |
80 | PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_UHCI) |
81 | return 1; |
82 | |
83 | return 0; |
84 | } |
85 | |
86 | static void |
87 | uhci_pci_attach(device_t parent, device_t self, void *aux) |
88 | { |
89 | struct uhci_pci_softc *sc = device_private(self); |
90 | struct pci_attach_args *pa = (struct pci_attach_args *)aux; |
91 | pci_chipset_tag_t pc = pa->pa_pc; |
92 | pcitag_t tag = pa->pa_tag; |
93 | char const *intrstr; |
94 | pci_intr_handle_t ih; |
95 | pcireg_t csr; |
96 | int s; |
97 | char intrbuf[PCI_INTRSTR_LEN]; |
98 | |
99 | sc->sc.sc_dev = self; |
100 | sc->sc.sc_bus.ub_hcpriv = sc; |
101 | |
102 | pci_aprint_devinfo(pa, NULL); |
103 | |
104 | /* Map I/O registers */ |
105 | if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, |
106 | &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) { |
107 | aprint_error_dev(self, "can't map i/o space\n" ); |
108 | return; |
109 | } |
110 | |
111 | /* |
112 | * Disable interrupts, so we don't get any spurious ones. |
113 | * Acknowledge all pending interrupts. |
114 | */ |
115 | bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0); |
116 | bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_STS, |
117 | bus_space_read_2(sc->sc.iot, sc->sc.ioh, UHCI_STS)); |
118 | |
119 | sc->sc_pc = pc; |
120 | sc->sc_tag = tag; |
121 | sc->sc.sc_bus.ub_dmatag = pa->pa_dmat; |
122 | |
123 | /* Enable the device. */ |
124 | csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); |
125 | pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, |
126 | csr | PCI_COMMAND_MASTER_ENABLE); |
127 | |
128 | /* Map and establish the interrupt. */ |
129 | if (pci_intr_map(pa, &ih)) { |
130 | aprint_error_dev(self, "couldn't map interrupt\n" ); |
131 | return; |
132 | } |
133 | intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); |
134 | sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, uhci_intr, sc); |
135 | if (sc->sc_ih == NULL) { |
136 | aprint_error_dev(self, "couldn't establish interrupt" ); |
137 | if (intrstr != NULL) |
138 | aprint_error(" at %s" , intrstr); |
139 | aprint_error("\n" ); |
140 | return; |
141 | } |
142 | aprint_normal_dev(self, "interrupting at %s\n" , intrstr); |
143 | |
144 | /* |
145 | * Set LEGSUP register to its default value. |
146 | * This can re-enable or trigger interrupts, so protect against |
147 | * them and explicitly disable and ACK them afterwards. |
148 | */ |
149 | s = splhardusb(); |
150 | pci_conf_write(pc, tag, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN); |
151 | bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0); |
152 | bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_STS, |
153 | bus_space_read_2(sc->sc.iot, sc->sc.ioh, UHCI_STS)); |
154 | splx(s); |
155 | |
156 | switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) { |
157 | case PCI_USBREV_PRE_1_0: |
158 | sc->sc.sc_bus.ub_revision = USBREV_PRE_1_0; |
159 | break; |
160 | case PCI_USBREV_1_0: |
161 | sc->sc.sc_bus.ub_revision = USBREV_1_0; |
162 | break; |
163 | case PCI_USBREV_1_1: |
164 | sc->sc.sc_bus.ub_revision = USBREV_1_1; |
165 | break; |
166 | default: |
167 | sc->sc.sc_bus.ub_revision = USBREV_UNKNOWN; |
168 | break; |
169 | } |
170 | |
171 | /* Figure out vendor for root hub descriptor. */ |
172 | sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id); |
173 | pci_findvendor(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor), |
174 | sc->sc.sc_id_vendor); |
175 | int err = uhci_init(&sc->sc); |
176 | if (err) { |
177 | aprint_error_dev(self, "init failed, error=%d\n" , err); |
178 | return; |
179 | } |
180 | sc->sc_initialized = SC_INIT_UHCI; |
181 | |
182 | #if NEHCI > 0 |
183 | usb_pci_add(&sc->sc_pci, pa, self); |
184 | #endif |
185 | |
186 | if (!pmf_device_register(self, uhci_suspend, uhci_pci_resume)) |
187 | aprint_error_dev(self, "couldn't establish power handler\n" ); |
188 | else |
189 | sc->sc_initialized |= SC_INIT_PMF; |
190 | |
191 | /* Attach usb device. */ |
192 | sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint); |
193 | } |
194 | |
195 | static int |
196 | uhci_pci_detach(device_t self, int flags) |
197 | { |
198 | struct uhci_pci_softc *sc = device_private(self); |
199 | int rv; |
200 | |
201 | if (sc->sc_initialized & SC_INIT_UHCI) { |
202 | rv = uhci_detach(&sc->sc, flags); |
203 | if (rv) |
204 | return rv; |
205 | } |
206 | |
207 | if (sc->sc_initialized & SC_INIT_PMF) |
208 | pmf_device_deregister(self); |
209 | |
210 | /* disable interrupts and acknowledge any pending */ |
211 | bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0); |
212 | bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_STS, |
213 | bus_space_read_2(sc->sc.iot, sc->sc.ioh, UHCI_STS)); |
214 | |
215 | if (sc->sc_ih != NULL) { |
216 | pci_intr_disestablish(sc->sc_pc, sc->sc_ih); |
217 | sc->sc_ih = NULL; |
218 | } |
219 | if (sc->sc.sc_size) { |
220 | bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); |
221 | sc->sc.sc_size = 0; |
222 | } |
223 | #if NEHCI > 0 |
224 | usb_pci_rem(&sc->sc_pci); |
225 | #endif |
226 | return 0; |
227 | } |
228 | |
229 | static bool |
230 | uhci_pci_resume(device_t dv, const pmf_qual_t *qual) |
231 | { |
232 | struct uhci_pci_softc *sc = device_private(dv); |
233 | |
234 | /* Set LEGSUP register to its default value. */ |
235 | pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_LEGSUP, |
236 | PCI_LEGSUP_USBPIRQDEN); |
237 | |
238 | return uhci_resume(dv, qual); |
239 | } |
240 | |
241 | CFATTACH_DECL3_NEW(uhci_pci, sizeof(struct uhci_pci_softc), |
242 | uhci_pci_match, uhci_pci_attach, uhci_pci_detach, uhci_activate, |
243 | NULL, uhci_childdet, DVF_DETACH_SHUTDOWN); |
244 | |