1 | /* $NetBSD: if_ntwoc_pci.c,v 1.30 2016/07/14 10:19:06 msaitoh Exp $ */ |
2 | |
3 | /* |
4 | * Copyright (c) 1998 Vixie Enterprises |
5 | * All rights reserved. |
6 | * |
7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions |
9 | * are met: |
10 | * |
11 | * 1. Redistributions of source code must retain the above copyright |
12 | * notice, this list of conditions and the following disclaimer. |
13 | * 2. Redistributions in binary form must reproduce the above copyright |
14 | * notice, this list of conditions and the following disclaimer in the |
15 | * documentation and/or other materials provided with the distribution. |
16 | * 3. Neither the name of Vixie Enterprises nor the names |
17 | * of its contributors may be used to endorse or promote products derived |
18 | * from this software without specific prior written permission. |
19 | * |
20 | * THIS SOFTWARE IS PROVIDED BY VIXIE ENTERPRISES AND |
21 | * CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, |
22 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
23 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
24 | * DISCLAIMED. IN NO EVENT SHALL VIXIE ENTERPRISES OR |
25 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
26 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
27 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
28 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
29 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
31 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
32 | * SUCH DAMAGE. |
33 | * |
34 | * This software has been written for Vixie Enterprises by Michael Graff |
35 | * <explorer@flame.org>. To learn more about Vixie Enterprises, see |
36 | * ``http://www.vix.com''. |
37 | */ |
38 | |
39 | #include <sys/cdefs.h> |
40 | __KERNEL_RCSID(0, "$NetBSD: if_ntwoc_pci.c,v 1.30 2016/07/14 10:19:06 msaitoh Exp $" ); |
41 | |
42 | #include <sys/param.h> |
43 | #include <sys/systm.h> |
44 | #include <sys/device.h> |
45 | #include <sys/mbuf.h> |
46 | #include <sys/socket.h> |
47 | |
48 | #include <net/if.h> |
49 | |
50 | #include <sys/cpu.h> |
51 | #include <sys/bus.h> |
52 | #include <sys/intr.h> |
53 | |
54 | #include <dev/pci/pcivar.h> |
55 | #include <dev/pci/pcireg.h> |
56 | #include <dev/pci/pcidevs.h> |
57 | |
58 | #include <dev/ic/hd64570reg.h> |
59 | #include <dev/ic/hd64570var.h> |
60 | |
61 | #include <dev/pci/if_ntwoc_pcireg.h> |
62 | |
63 | #if 0 |
64 | #define NTWO_DEBUG |
65 | #endif |
66 | |
67 | #ifdef NTWO_DEBUG |
68 | #define NTWO_DPRINTF(x) printf x |
69 | #else |
70 | #define NTWO_DPRINTF(x) |
71 | #endif |
72 | |
73 | /* |
74 | * buffers per tx and rx channels, per port, and the size of each. |
75 | * Don't use these constants directly, as they are really only hints. |
76 | * Use the calculated values stored in struct sca_softc instead. |
77 | * |
78 | * Each must be at least 2, receive would be better at around 20 or so. |
79 | * |
80 | * XXX Due to a damned near impossible to track down bug, transmit buffers |
81 | * MUST be 2, no more, no less. |
82 | */ |
83 | #ifndef NTWOC_NtxBUFS |
84 | #define NTWOC_NtxBUFS 40 |
85 | #endif |
86 | #ifndef NTWOC_NrxBUFS |
87 | #define NTWOC_NrxBUFS 20 |
88 | #endif |
89 | |
90 | #if __NetBSD_Version__ >= 104160000 |
91 | static void ntwoc_pci_config_interrupts(device_t); |
92 | #else |
93 | #define SCA_BASECLOCK 16000000 |
94 | #endif |
95 | |
96 | /* |
97 | * Card specific config register location |
98 | */ |
99 | #define PCI_CBMA_ASIC PCI_BAR(0) /* Configuration Base Memory Address */ |
100 | #define PCI_CBMA_SCA PCI_BAR(2) |
101 | |
102 | struct ntwoc_pci_softc { |
103 | /* Generic device stuff */ |
104 | device_t sc_dev; /* Common to all devices */ |
105 | |
106 | /* PCI chipset glue */ |
107 | pci_intr_handle_t *sc_ih; /* Interrupt handler */ |
108 | pci_chipset_tag_t sc_sr; /* PCI chipset handle */ |
109 | |
110 | bus_space_tag_t sc_asic_iot; /* space cookie (for ASIC) */ |
111 | bus_space_handle_t sc_asic_ioh; /* bus space handle (for ASIC) */ |
112 | |
113 | struct sca_softc sc_sca; /* the SCA itself */ |
114 | }; |
115 | |
116 | static int ntwoc_pci_match(device_t, cfdata_t, void *); |
117 | static void ntwoc_pci_attach(device_t, device_t, void *); |
118 | |
119 | static int ntwoc_pci_alloc_dma(struct sca_softc *); |
120 | static void ntwoc_pci_clock_callback(void *, int, int); |
121 | static void ntwoc_pci_dtr_callback(void *, int, int); |
122 | static void ntwoc_pci_get_clock(struct sca_port *, u_int8_t, u_int8_t, |
123 | u_int8_t, u_int8_t); |
124 | static int ntwoc_pci_intr(void *); |
125 | static void ntwoc_pci_setup_dma(struct sca_softc *); |
126 | static void ntwoc_pci_shutdown(void *sc); |
127 | |
128 | CFATTACH_DECL_NEW(ntwoc_pci, sizeof(struct ntwoc_pci_softc), |
129 | ntwoc_pci_match, ntwoc_pci_attach, NULL, NULL); |
130 | |
131 | /* |
132 | * Names for daughter card types. These match the NTWOC_DB_* defines. |
133 | */ |
134 | const char *ntwoc_pci_db_names[] = { |
135 | "V.35" , "Unknown 0x01" , "Test" , "Unknown 0x03" , |
136 | "RS232" , "Unknown 0x05" , "RS422" , "None" |
137 | }; |
138 | |
139 | /* |
140 | * At least one implementation uses a somewhat strange register address |
141 | * mapping. If a card doesn't, define this to be a pass-through |
142 | * macro. (The ntwo driver needs this...) |
143 | */ |
144 | #define SCA_REG(y) (((y) & 0x0002) ? (((y) & 0x00fd) + 0x100) : (y)) |
145 | |
146 | /* |
147 | * functions that read and write to the sca registers |
148 | */ |
149 | static void |
150 | ntwoc_pci_sca_write_1(struct sca_softc *sc, u_int reg, u_int8_t val) |
151 | { |
152 | bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCA_REG(reg), val); |
153 | } |
154 | |
155 | static void |
156 | ntwoc_pci_sca_write_2(struct sca_softc *sc, u_int reg, u_int16_t val) |
157 | { |
158 | bus_space_write_2(sc->sc_iot, sc->sc_ioh, SCA_REG(reg), val); |
159 | } |
160 | |
161 | static u_int8_t |
162 | ntwoc_pci_sca_read_1(struct sca_softc *sc, u_int reg) |
163 | { |
164 | return |
165 | bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCA_REG(reg)); |
166 | } |
167 | |
168 | static u_int16_t |
169 | ntwoc_pci_sca_read_2(struct sca_softc *sc, u_int reg) |
170 | { |
171 | return |
172 | bus_space_read_2(sc->sc_iot, sc->sc_ioh, SCA_REG(reg)); |
173 | } |
174 | |
175 | |
176 | |
177 | static int |
178 | ntwoc_pci_match(device_t parent, cfdata_t match, void *aux) |
179 | { |
180 | struct pci_attach_args *pa = (struct pci_attach_args *)aux; |
181 | |
182 | if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RISCOM) |
183 | && (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_RISCOM_N2)) |
184 | return 1; |
185 | |
186 | return 0; |
187 | } |
188 | |
189 | static void |
190 | ntwoc_pci_attach(device_t parent, device_t self, void *aux) |
191 | { |
192 | struct ntwoc_pci_softc *sc = device_private(self); |
193 | struct pci_attach_args *pa = aux; |
194 | struct sca_softc *sca = &sc->sc_sca; |
195 | pci_intr_handle_t ih; |
196 | const char *intrstr; |
197 | pcireg_t csr; |
198 | u_int8_t tmc, rdiv, tdiv; |
199 | u_int16_t frontend_cr; |
200 | u_int16_t db0, db1; |
201 | u_int32_t flags; |
202 | u_int numports; |
203 | char intrbuf[PCI_INTRSTR_LEN]; |
204 | |
205 | aprint_naive("\n" ); |
206 | aprint_normal(": N2 Serial Interface\n" ); |
207 | flags = device_cfdata(self)->cf_flags; |
208 | |
209 | /* |
210 | * Map in the ASIC configuration space |
211 | */ |
212 | if (pci_mapreg_map(pa, PCI_CBMA_ASIC, PCI_MAPREG_TYPE_MEM, 0, |
213 | &sc->sc_asic_iot, &sc->sc_asic_ioh, NULL, NULL)) { |
214 | aprint_error_dev(self, "Can't map register space (ASIC)\n" ); |
215 | return; |
216 | } |
217 | /* |
218 | * Map in the serial controller configuration space |
219 | */ |
220 | if (pci_mapreg_map(pa, PCI_CBMA_SCA, PCI_MAPREG_TYPE_MEM, 0, |
221 | &sca->sc_iot, &sca->sc_ioh, NULL, NULL)) { |
222 | aprint_error_dev(self, "Can't map register space (SCA)\n" ); |
223 | return; |
224 | } |
225 | |
226 | /* |
227 | * Enable the card |
228 | */ |
229 | csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); |
230 | pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr); |
231 | |
232 | /* |
233 | * Map and establish the interrupt |
234 | */ |
235 | if (pci_intr_map(pa, &ih)) { |
236 | aprint_error_dev(self, "couldn't map interrupt\n" ); |
237 | return; |
238 | } |
239 | intrstr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf)); |
240 | sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_NET, ntwoc_pci_intr, |
241 | sc); |
242 | if (sc->sc_ih == NULL) { |
243 | aprint_error_dev(self, "couldn't establish interrupt" ); |
244 | if (intrstr != NULL) |
245 | aprint_error(" at %s" , intrstr); |
246 | aprint_error("\n" ); |
247 | return; |
248 | } |
249 | aprint_normal_dev(self, "interrupting at %s\n" , intrstr); |
250 | |
251 | /* |
252 | * Perform total black magic. This is not only extremely |
253 | * disgusting, but it should be explained a lot more in the |
254 | * card's documentation. |
255 | * |
256 | * From what I gather, this does nothing more than configure the |
257 | * PCI to ISA translator ASIC the N2pci card uses. |
258 | * |
259 | * From the FreeBSD driver: |
260 | * offset |
261 | * 0x00 - Map Range - Mem-mapped to locate anywhere |
262 | * 0x04 - Re-Map - PCI address decode enable |
263 | * 0x18 - Bus Region - 32-bit bus, ready enable |
264 | * 0x1c - Master Range - include all 16 MB |
265 | * 0x20 - Master RAM - Map SCA Base at 0 |
266 | * 0x28 - Master Remap - direct master memory enable |
267 | * 0x68 - Interrupt - Enable interrupt (0 to disable) |
268 | */ |
269 | bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh, |
270 | 0x00, 0xfffff000); |
271 | bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh, |
272 | 0x04, 1); |
273 | bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh, |
274 | 0x18, 0x40030043); |
275 | bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh, |
276 | 0x1c, 0xff000000); |
277 | bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh, |
278 | 0x20, 0); |
279 | bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh, |
280 | 0x28, 0xe9); |
281 | bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh, |
282 | 0x68, 0x10900); |
283 | |
284 | /* |
285 | * pass the DMA tag to the SCA |
286 | */ |
287 | sca->sc_usedma = 1; |
288 | sca->scu_dmat = pa->pa_dmat; |
289 | |
290 | /* |
291 | * Read the configuration information off the daughter card. |
292 | */ |
293 | frontend_cr = bus_space_read_2(sca->sc_iot, sca->sc_ioh, NTWOC_FECR); |
294 | NTWO_DPRINTF(("%s: frontend_cr = 0x%04x\n" , |
295 | device_xname(self), frontend_cr)); |
296 | |
297 | db0 = (frontend_cr & NTWOC_FECR_ID0) >> NTWOC_FECR_ID0_SHIFT; |
298 | db1 = (frontend_cr & NTWOC_FECR_ID1) >> NTWOC_FECR_ID1_SHIFT; |
299 | |
300 | /* |
301 | * Port 1 HAS to be present. If it isn't, don't attach anything. |
302 | */ |
303 | if (db0 == NTWOC_FE_ID_NONE) { |
304 | aprint_error_dev(self, "no ports available\n" ); |
305 | return; |
306 | } |
307 | |
308 | /* |
309 | * Port 1 is present. Now, check to see if port 2 is also |
310 | * present. |
311 | */ |
312 | numports = 1; |
313 | if (db1 != NTWOC_FE_ID_NONE) |
314 | numports++; |
315 | |
316 | aprint_normal_dev(self, "%d port%s\n" , numports, |
317 | (numports > 1 ? "s" : "" )); |
318 | aprint_normal_dev(self, "port 0 interface card: %s\n" , |
319 | ntwoc_pci_db_names[db0]); |
320 | if (numports > 1) |
321 | aprint_normal_dev(self, "port 1 interface card: %s\n" , |
322 | ntwoc_pci_db_names[db1]); |
323 | |
324 | /* |
325 | * enable the RS422 tristate transmit |
326 | * diable clock output (use receiver clock for both) |
327 | */ |
328 | frontend_cr |= (NTWOC_FECR_TE0 | NTWOC_FECR_TE1); |
329 | frontend_cr &= ~(NTWOC_FECR_ETC0 | NTWOC_FECR_ETC1); |
330 | bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh, |
331 | NTWOC_FECR, frontend_cr); |
332 | |
333 | /* |
334 | * initialize the SCA. This will allocate DMAable memory based |
335 | * on the number of ports we passed in, the size of each |
336 | * buffer, and the number of buffers per port. |
337 | */ |
338 | sca->sc_parent = self; |
339 | sca->sc_read_1 = ntwoc_pci_sca_read_1; |
340 | sca->sc_read_2 = ntwoc_pci_sca_read_2; |
341 | sca->sc_write_1 = ntwoc_pci_sca_write_1; |
342 | sca->sc_write_2 = ntwoc_pci_sca_write_2; |
343 | sca->sc_dtr_callback = ntwoc_pci_dtr_callback; |
344 | sca->sc_clock_callback = ntwoc_pci_clock_callback; |
345 | sca->sc_aux = sc; |
346 | sca->sc_numports = numports; |
347 | |
348 | /* |
349 | * get clock information from user |
350 | */ |
351 | rdiv = (flags & NTWOC_FLAGS_RXDIV_MASK) >> NTWOC_FLAGS_RXDIV_SHIFT; |
352 | if (rdiv > 9) |
353 | panic("bad rx divisor in flags" ); |
354 | |
355 | tdiv = (flags & NTWOC_FLAGS_TXDIV_MASK) >> NTWOC_FLAGS_TXDIV_SHIFT; |
356 | if (tdiv > 9) |
357 | panic("bad tx divisor in flags" ); |
358 | tmc = (flags & NTWOC_FLAGS_TMC_MASK) >> NTWOC_FLAGS_TMC_SHIFT; |
359 | |
360 | ntwoc_pci_get_clock(&sca->sc_ports[0], flags & NTWOC_FLAGS_CLK0_MASK, |
361 | tmc, rdiv, tdiv); |
362 | if (sca->sc_numports > 1) |
363 | ntwoc_pci_get_clock(&sca->sc_ports[1], |
364 | (flags & NTWOC_FLAGS_CLK1_MASK) >> NTWOC_FLAGS_CLK1_SHIFT, |
365 | tmc, rdiv, tdiv); |
366 | |
367 | /* allocate DMA'able memory for card to use */ |
368 | ntwoc_pci_alloc_dma(sca); |
369 | ntwoc_pci_setup_dma(sca); |
370 | |
371 | sca_init(sca); |
372 | |
373 | /* |
374 | * always initialize port 0, since we have to have found it to |
375 | * get this far. If we have two ports, attach the second |
376 | * as well. |
377 | */ |
378 | sca_port_attach(sca, 0); |
379 | if (numports == 2) |
380 | sca_port_attach(sca, 1); |
381 | |
382 | /* |
383 | * Add shutdown hook so that DMA is disabled prior to reboot. Not |
384 | * doing do could allow DMA to corrupt kernel memory during the |
385 | * reboot before the driver initializes. |
386 | */ |
387 | shutdownhook_establish(ntwoc_pci_shutdown, sc); |
388 | |
389 | #if __NetBSD_Version__ >= 104160000 |
390 | /* |
391 | * defer getting the base clock until interrupts are enabled |
392 | * (and thus we have microtime()) |
393 | */ |
394 | config_interrupts(self, ntwoc_pci_config_interrupts); |
395 | #else |
396 | sca->sc_baseclock = SCA_BASECLOCK; |
397 | sca_print_clock_info(&sc->sc_sca); |
398 | #endif |
399 | } |
400 | |
401 | /* |
402 | * extract the clock information for a port from the flags field |
403 | */ |
404 | static void |
405 | ntwoc_pci_get_clock(struct sca_port *scp, u_int8_t flags, u_int8_t tmc, |
406 | u_int8_t rdiv, u_int8_t tdiv) |
407 | { |
408 | scp->sp_eclock = |
409 | (flags & NTWOC_FLAGS_ECLOCK_MASK) >> NTWOC_FLAGS_ECLOCK_SHIFT; |
410 | scp->sp_rxs = rdiv; |
411 | scp->sp_txs = tdiv; |
412 | scp->sp_tmc = tmc; |
413 | |
414 | /* get rx source */ |
415 | switch ((flags & NTWOC_FLAGS_RXS_MASK) >> NTWOC_FLAGS_RXS_SHIFT) { |
416 | case NTWOC_FLAGS_RXS_LINE: |
417 | scp->sp_rxs = 0; |
418 | break; |
419 | case NTWOC_FLAGS_RXS_LINE_SN: |
420 | scp->sp_rxs |= SCA_RXS_CLK_LINE_SN; |
421 | break; |
422 | case NTWOC_FLAGS_RXS_INTERNAL: |
423 | scp->sp_rxs |= SCA_RXS_CLK_INTERNAL; |
424 | break; |
425 | case NTWOC_FLAGS_RXS_ADPLL_OUT: |
426 | scp->sp_rxs |= SCA_RXS_CLK_ADPLL_OUT; |
427 | break; |
428 | case NTWOC_FLAGS_RXS_ADPLL_IN: |
429 | scp->sp_rxs |= SCA_RXS_CLK_ADPLL_IN; |
430 | break; |
431 | default: |
432 | panic("bad rx source in flags" ); |
433 | } |
434 | |
435 | /* get tx source */ |
436 | switch ((flags & NTWOC_FLAGS_TXS_MASK) >> NTWOC_FLAGS_TXS_SHIFT) { |
437 | case NTWOC_FLAGS_TXS_LINE: |
438 | scp->sp_txs = 0; |
439 | break; |
440 | case NTWOC_FLAGS_TXS_INTERNAL: |
441 | scp->sp_txs |= SCA_TXS_CLK_INTERNAL; |
442 | break; |
443 | case NTWOC_FLAGS_TXS_RXCLOCK: |
444 | scp->sp_txs |= SCA_TXS_CLK_RXCLK; |
445 | break; |
446 | default: |
447 | panic("bad rx source in flags" ); |
448 | } |
449 | } |
450 | |
451 | |
452 | static int |
453 | ntwoc_pci_intr(void *arg) |
454 | { |
455 | struct ntwoc_pci_softc *sc = (struct ntwoc_pci_softc *)arg; |
456 | |
457 | return sca_hardintr(&sc->sc_sca); |
458 | } |
459 | |
460 | /* |
461 | * shut down interrupts and DMA, so we don't trash the kernel on warm |
462 | * boot. Also, lower DTR on each port and disable card interrupts. |
463 | */ |
464 | static void |
465 | ntwoc_pci_shutdown(void *aux) |
466 | { |
467 | struct ntwoc_pci_softc *sc = aux; |
468 | u_int16_t fecr; |
469 | |
470 | /* |
471 | * shut down the SCA ports |
472 | */ |
473 | sca_shutdown(&sc->sc_sca); |
474 | |
475 | /* |
476 | * disable interrupts for the whole card. Black magic, see comment |
477 | * above. |
478 | */ |
479 | bus_space_write_4(sc->sc_asic_iot, sc->sc_asic_ioh, |
480 | 0x68, 0x10900); |
481 | |
482 | /* |
483 | * lower DTR on both ports |
484 | */ |
485 | fecr = bus_space_read_2(sc->sc_sca.sc_iot, |
486 | sc->sc_sca.sc_ioh, NTWOC_FECR); |
487 | fecr |= (NTWOC_FECR_DTR0 | NTWOC_FECR_DTR1); |
488 | bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh, |
489 | NTWOC_FECR, fecr); |
490 | } |
491 | |
492 | static void |
493 | ntwoc_pci_dtr_callback(void *aux, int port, int state) |
494 | { |
495 | struct ntwoc_pci_softc *sc = aux; |
496 | u_int16_t fecr; |
497 | |
498 | fecr = bus_space_read_2(sc->sc_sca.sc_iot, |
499 | sc->sc_sca.sc_ioh, NTWOC_FECR); |
500 | |
501 | NTWO_DPRINTF(("dtr: port == %d, state == %d, old fecr: 0x%04x\n" , |
502 | port, state, fecr)); |
503 | |
504 | if (port == 0) { |
505 | if (state == 0) |
506 | fecr |= NTWOC_FECR_DTR0; |
507 | else |
508 | fecr &= ~NTWOC_FECR_DTR0; |
509 | } else { |
510 | if (state == 0) |
511 | fecr |= NTWOC_FECR_DTR1; |
512 | else |
513 | fecr &= ~NTWOC_FECR_DTR1; |
514 | } |
515 | |
516 | NTWO_DPRINTF(("new fecr: 0x%04x\n" , fecr)); |
517 | |
518 | bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh, |
519 | NTWOC_FECR, fecr); |
520 | } |
521 | |
522 | static void |
523 | ntwoc_pci_clock_callback(void *aux, int port, int enable) |
524 | { |
525 | struct ntwoc_pci_softc *sc = aux; |
526 | u_int16_t fecr; |
527 | |
528 | fecr = bus_space_read_2(sc->sc_sca.sc_iot, |
529 | sc->sc_sca.sc_ioh, NTWOC_FECR); |
530 | |
531 | NTWO_DPRINTF(("clk: port == %d, enable == %d, old fecr: 0x%04x\n" , |
532 | port, enable, fecr)); |
533 | |
534 | if (port == 0) { |
535 | if (enable) |
536 | fecr |= NTWOC_FECR_ETC0; |
537 | else |
538 | fecr &= ~NTWOC_FECR_ETC0; |
539 | } else { |
540 | if (enable) |
541 | fecr |= NTWOC_FECR_ETC1; |
542 | else |
543 | fecr &= ~NTWOC_FECR_ETC1; |
544 | } |
545 | |
546 | NTWO_DPRINTF(("new fecr: 0x%04x\n" , fecr)); |
547 | |
548 | bus_space_write_2(sc->sc_sca.sc_iot, sc->sc_sca.sc_ioh, |
549 | NTWOC_FECR, fecr); |
550 | } |
551 | |
552 | static int |
553 | ntwoc_pci_alloc_dma(struct sca_softc *sc) |
554 | { |
555 | u_int allocsize; |
556 | int err; |
557 | int rsegs; |
558 | u_int bpp; |
559 | |
560 | /* first initialize the number of descriptors */ |
561 | sc->sc_ports[0].sp_nrxdesc = NTWOC_NrxBUFS; |
562 | sc->sc_ports[0].sp_ntxdesc = NTWOC_NtxBUFS; |
563 | if (sc->sc_numports == 2) { |
564 | sc->sc_ports[1].sp_nrxdesc = NTWOC_NrxBUFS; |
565 | sc->sc_ports[1].sp_ntxdesc = NTWOC_NtxBUFS; |
566 | } |
567 | |
568 | NTWO_DPRINTF(("sizeof sca_desc_t: %d bytes\n" , sizeof (sca_desc_t))); |
569 | |
570 | bpp = sc->sc_numports * (NTWOC_NtxBUFS + NTWOC_NrxBUFS); |
571 | |
572 | allocsize = bpp * (SCA_BSIZE + sizeof (sca_desc_t)); |
573 | |
574 | /* |
575 | * sanity checks: |
576 | * |
577 | * Check the total size of the data buffers, and so on. The total |
578 | * DMAable space needs to fit within a single 16M region, and the |
579 | * descriptors need to fit within a 64K region. |
580 | */ |
581 | if (allocsize > 16 * 1024 * 1024) |
582 | return 1; |
583 | if (bpp * sizeof (sca_desc_t) > 64 * 1024) |
584 | return 1; |
585 | |
586 | sc->scu_allocsize = allocsize; |
587 | |
588 | /* |
589 | * Allocate one huge chunk of memory. |
590 | */ |
591 | if (bus_dmamem_alloc(sc->scu_dmat, |
592 | allocsize, |
593 | SCA_DMA_ALIGNMENT, |
594 | SCA_DMA_BOUNDARY, |
595 | &sc->scu_seg, 1, &rsegs, BUS_DMA_NOWAIT) != 0) { |
596 | printf("Could not allocate DMA memory\n" ); |
597 | return 1; |
598 | } |
599 | NTWO_DPRINTF(("DMA memory allocated: %d bytes\n" , allocsize)); |
600 | |
601 | if (bus_dmamem_map(sc->scu_dmat, &sc->scu_seg, 1, allocsize, |
602 | &sc->scu_dma_addr, BUS_DMA_NOWAIT) != 0) { |
603 | printf("Could not map DMA memory into kernel space\n" ); |
604 | return 1; |
605 | } |
606 | NTWO_DPRINTF(("DMA memory mapped\n" )); |
607 | |
608 | if (bus_dmamap_create(sc->scu_dmat, allocsize, 2, |
609 | allocsize, SCA_DMA_BOUNDARY, |
610 | BUS_DMA_NOWAIT, &sc->scu_dmam) != 0) { |
611 | printf("Could not create DMA map\n" ); |
612 | return 1; |
613 | } |
614 | NTWO_DPRINTF(("DMA map created\n" )); |
615 | |
616 | err = bus_dmamap_load(sc->scu_dmat, sc->scu_dmam, sc->scu_dma_addr, |
617 | allocsize, NULL, BUS_DMA_NOWAIT); |
618 | if (err != 0) { |
619 | printf("Could not load DMA segment: %d\n" , err); |
620 | return 1; |
621 | } |
622 | NTWO_DPRINTF(("DMA map loaded\n" )); |
623 | |
624 | return 0; |
625 | } |
626 | |
627 | /* |
628 | * Take the memory allocated with sca_alloc_dma() and divide it among the |
629 | * two ports. |
630 | */ |
631 | static void |
632 | ntwoc_pci_setup_dma(struct sca_softc *sc) |
633 | { |
634 | sca_port_t *scp0, *scp1; |
635 | u_int8_t *vaddr0; |
636 | u_int32_t paddr0; |
637 | u_long addroff; |
638 | |
639 | /* |
640 | * remember the physical address to 24 bits only, since the upper |
641 | * 8 bits is programed into the device at a different layer. |
642 | */ |
643 | paddr0 = (sc->scu_dmam->dm_segs[0].ds_addr & 0x00ffffff); |
644 | vaddr0 = sc->scu_dma_addr; |
645 | |
646 | /* |
647 | * if we have only one port it gets the full range. If we have |
648 | * two we need to do a little magic to divide things up. |
649 | * |
650 | * The descriptors will all end up in the front of the area, while |
651 | * the remainder of the buffer is used for transmit and receive |
652 | * data. |
653 | * |
654 | * -------------------- start of memory |
655 | * tx desc port 0 |
656 | * rx desc port 0 |
657 | * tx desc port 1 |
658 | * rx desc port 1 |
659 | * tx buffer port 0 |
660 | * rx buffer port 0 |
661 | * tx buffer port 1 |
662 | * rx buffer port 1 |
663 | * -------------------- end of memory |
664 | */ |
665 | scp0 = &sc->sc_ports[0]; |
666 | scp1 = &sc->sc_ports[1]; |
667 | |
668 | scp0->sp_txdesc_p = paddr0; |
669 | scp0->sp_txdesc = (sca_desc_t *)vaddr0; |
670 | addroff = sizeof(sca_desc_t) * scp0->sp_ntxdesc; |
671 | |
672 | /* |
673 | * point to the range following the tx descriptors, and |
674 | * set the rx descriptors there. |
675 | */ |
676 | scp0->sp_rxdesc_p = paddr0 + addroff; |
677 | scp0->sp_rxdesc = (sca_desc_t *)(vaddr0 + addroff); |
678 | addroff += sizeof(sca_desc_t) * scp0->sp_nrxdesc; |
679 | |
680 | if (sc->sc_numports == 2) { |
681 | scp1->sp_txdesc_p = paddr0 + addroff; |
682 | scp1->sp_txdesc = (sca_desc_t *)(vaddr0 + addroff); |
683 | addroff += sizeof(sca_desc_t) * scp1->sp_ntxdesc; |
684 | |
685 | scp1->sp_rxdesc_p = paddr0 + addroff; |
686 | scp1->sp_rxdesc = (sca_desc_t *)(vaddr0 + addroff); |
687 | addroff += sizeof(sca_desc_t) * scp1->sp_nrxdesc; |
688 | } |
689 | |
690 | /* |
691 | * point to the memory following the descriptors, and set the |
692 | * transmit buffer there. |
693 | */ |
694 | scp0->sp_txbuf_p = paddr0 + addroff; |
695 | scp0->sp_txbuf = vaddr0 + addroff; |
696 | addroff += SCA_BSIZE * scp0->sp_ntxdesc; |
697 | |
698 | /* |
699 | * lastly, skip over the transmit buffer and set up pointers into |
700 | * the receive buffer. |
701 | */ |
702 | scp0->sp_rxbuf_p = paddr0 + addroff; |
703 | scp0->sp_rxbuf = vaddr0 + addroff; |
704 | addroff += SCA_BSIZE * scp0->sp_nrxdesc; |
705 | |
706 | if (sc->sc_numports == 2) { |
707 | scp1->sp_txbuf_p = paddr0 + addroff; |
708 | scp1->sp_txbuf = vaddr0 + addroff; |
709 | addroff += SCA_BSIZE * scp1->sp_ntxdesc; |
710 | |
711 | scp1->sp_rxbuf_p = paddr0 + addroff; |
712 | scp1->sp_rxbuf = vaddr0 + addroff; |
713 | addroff += SCA_BSIZE * scp1->sp_nrxdesc; |
714 | } |
715 | |
716 | /* |
717 | * as a consistancy check, addroff should be equal to the allocation |
718 | * size. |
719 | */ |
720 | if (sc->scu_allocsize != addroff) |
721 | printf("ERROR: scu_allocsize != addroff: %lu != %lu\n" , |
722 | (u_long)sc->scu_allocsize, addroff); |
723 | } |
724 | |
725 | #if __NetBSD_Version__ >= 104160000 |
726 | static void |
727 | ntwoc_pci_config_interrupts(device_t self) |
728 | { |
729 | struct ntwoc_pci_softc *sc; |
730 | |
731 | sc = device_private(self); |
732 | sca_get_base_clock(&sc->sc_sca); |
733 | sca_print_clock_info(&sc->sc_sca); |
734 | } |
735 | #endif |
736 | |