1/*
2 * Copyright 2011 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Alex Deucher
23 *
24 */
25#include <drm/drmP.h>
26#include <drm/radeon_drm.h>
27#include "radeon.h"
28#include "atom.h"
29
30#define TARGET_HW_I2C_CLOCK 50
31
32/* these are a limitation of ProcessI2cChannelTransaction not the hw */
33#define ATOM_MAX_HW_I2C_WRITE 3
34#define ATOM_MAX_HW_I2C_READ 255
35
36static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan,
37 u8 slave_addr, u8 flags,
38 u8 *buf, u8 num)
39{
40 struct drm_device *dev = chan->dev;
41 struct radeon_device *rdev = dev->dev_private;
42 PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;
43 int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);
44 unsigned char *base;
45 u16 out = cpu_to_le16(0);
46
47 memset(&args, 0, sizeof(args));
48
49 base = (unsigned char *)rdev->mode_info.atom_context->scratch;
50
51 if (flags & HW_I2C_WRITE) {
52 if (num > ATOM_MAX_HW_I2C_WRITE) {
53 DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num);
54 return -EINVAL;
55 }
56 if (buf == NULL)
57 args.ucRegIndex = 0;
58 else
59 args.ucRegIndex = buf[0];
60 if (num)
61 num--;
62 if (num)
63 memcpy(&out, &buf[1], num);
64 args.lpI2CDataOut = cpu_to_le16(out);
65 } else {
66 CTASSERT(ATOM_MAX_HW_I2C_READ <
67 (uintmax_t)1 << (CHAR_BIT*sizeof(num)));
68 args.ucRegIndex = 0;
69 args.lpI2CDataOut = 0;
70 }
71
72 args.ucFlag = flags;
73 args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;
74 args.ucTransBytes = num;
75 args.ucSlaveAddr = slave_addr << 1;
76 args.ucLineNumber = chan->rec.i2c_id;
77
78 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
79
80 /* error */
81 if (args.ucStatus != HW_ASSISTED_I2C_STATUS_SUCCESS) {
82 DRM_DEBUG_KMS("hw_i2c error\n");
83 return -EIO;
84 }
85
86 if (!(flags & HW_I2C_WRITE))
87 radeon_atom_copy_swap(buf, base, num, false);
88
89 return 0;
90}
91
92int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap,
93 struct i2c_msg *msgs, int num)
94{
95 struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);
96 struct i2c_msg *p;
97 int i, remaining, current_count, buffer_offset, max_bytes, ret;
98 u8 flags;
99
100 /* check for bus probe */
101 p = &msgs[0];
102 if ((num == 1) && (p->len == 0)) {
103 ret = radeon_process_i2c_ch(i2c,
104 p->addr, HW_I2C_WRITE,
105 NULL, 0);
106 if (ret)
107 return ret;
108 else
109 return num;
110 }
111
112 for (i = 0; i < num; i++) {
113 p = &msgs[i];
114 remaining = p->len;
115 buffer_offset = 0;
116 /* max_bytes are a limitation of ProcessI2cChannelTransaction not the hw */
117 if (p->flags & I2C_M_RD) {
118 max_bytes = ATOM_MAX_HW_I2C_READ;
119 flags = HW_I2C_READ;
120 } else {
121 max_bytes = ATOM_MAX_HW_I2C_WRITE;
122 flags = HW_I2C_WRITE;
123 }
124 while (remaining) {
125 if (remaining > max_bytes)
126 current_count = max_bytes;
127 else
128 current_count = remaining;
129 ret = radeon_process_i2c_ch(i2c,
130 p->addr, flags,
131 &p->buf[buffer_offset], current_count);
132 if (ret)
133 return ret;
134 remaining -= current_count;
135 buffer_offset += current_count;
136 }
137 }
138
139 return num;
140}
141
142u32 radeon_atom_hw_i2c_func(struct i2c_adapter *adap)
143{
144 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
145}
146
147