1 | /* $NetBSD: rtwvar.h,v 1.44 2016/09/15 21:45:37 jdolecek Exp $ */ |
2 | /*- |
3 | * Copyright (c) 2004, 2005 David Young. All rights reserved. |
4 | * |
5 | * Driver for the Realtek RTL8180 802.11 MAC/BBP by David Young. |
6 | * |
7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions |
9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * 2. Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
15 | * |
16 | * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY |
17 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, |
18 | * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A |
19 | * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David |
20 | * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
21 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED |
22 | * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
24 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
25 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
26 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY |
27 | * OF SUCH DAMAGE. |
28 | */ |
29 | |
30 | #ifndef _DEV_IC_RTWVAR_H_ |
31 | #define _DEV_IC_RTWVAR_H_ |
32 | |
33 | #include <sys/queue.h> |
34 | #include <sys/callout.h> |
35 | |
36 | #ifdef RTW_DEBUG |
37 | #define RTW_DEBUG_TUNE 0x0000001 |
38 | #define RTW_DEBUG_PKTFILT 0x0000002 |
39 | #define RTW_DEBUG_XMIT 0x0000004 |
40 | #define RTW_DEBUG_XMIT_DESC 0x0000008 |
41 | #define RTW_DEBUG_NODE 0x0000010 |
42 | #define RTW_DEBUG_PWR 0x0000020 |
43 | #define RTW_DEBUG_ATTACH 0x0000040 |
44 | #define RTW_DEBUG_REGDUMP 0x0000080 |
45 | #define RTW_DEBUG_ACCESS 0x0000100 |
46 | #define RTW_DEBUG_RESET 0x0000200 |
47 | #define RTW_DEBUG_INIT 0x0000400 |
48 | #define RTW_DEBUG_IOSTATE 0x0000800 |
49 | #define RTW_DEBUG_RECV 0x0001000 |
50 | #define RTW_DEBUG_RECV_DESC 0x0002000 |
51 | #define RTW_DEBUG_IO_KICK 0x0004000 |
52 | #define RTW_DEBUG_INTR 0x0008000 |
53 | #define RTW_DEBUG_PHY 0x0010000 |
54 | #define RTW_DEBUG_PHYIO 0x0020000 |
55 | #define RTW_DEBUG_PHYBITIO 0x0040000 |
56 | #define RTW_DEBUG_TIMEOUT 0x0080000 |
57 | #define RTW_DEBUG_BUGS 0x0100000 |
58 | #define RTW_DEBUG_BEACON 0x0200000 |
59 | #define RTW_DEBUG_LED 0x0400000 |
60 | #define RTW_DEBUG_KEY 0x0800000 |
61 | #define RTW_DEBUG_XMIT_RSRC 0x1000000 |
62 | #define RTW_DEBUG_OACTIVE 0x2000000 |
63 | #define RTW_DEBUG_MAX 0x3ffffff |
64 | |
65 | extern int rtw_debug; |
66 | #define RTW_DPRINTF(__flags, __x) \ |
67 | if ((rtw_debug & (__flags)) != 0) printf __x |
68 | #define DPRINTF(__sc, __flags, __x) \ |
69 | if (((__sc)->sc_if.if_flags & IFF_DEBUG) != 0) \ |
70 | RTW_DPRINTF(__flags, __x) |
71 | #define RTW_PRINT_REGS(__regs, __dvname, __where) \ |
72 | rtw_print_regs((__regs), (__dvname), (__where)) |
73 | #else /* RTW_DEBUG */ |
74 | #define RTW_DPRINTF(__flags, __x) |
75 | #define DPRINTF(__sc, __flags, __x) |
76 | #define RTW_PRINT_REGS(__regs, __dvname, __where) |
77 | #endif /* RTW_DEBUG */ |
78 | |
79 | enum rtw_locale { |
80 | RTW_LOCALE_USA = 0, |
81 | RTW_LOCALE_EUROPE, |
82 | RTW_LOCALE_JAPAN, |
83 | RTW_LOCALE_UNKNOWN |
84 | }; |
85 | |
86 | enum rtw_rfchipid { |
87 | RTW_RFCHIPID_RESERVED = 0, |
88 | RTW_RFCHIPID_INTERSIL = 1, |
89 | RTW_RFCHIPID_RFMD = 2, |
90 | RTW_RFCHIPID_PHILIPS = 3, |
91 | RTW_RFCHIPID_MAXIM = 4, |
92 | RTW_RFCHIPID_GCT = 5 |
93 | }; |
94 | /* sc_flags */ |
95 | #define RTW_F_DIGPHY 0x00000002 /* digital PHY */ |
96 | #define RTW_F_DFLANTB 0x00000004 /* B antenna is default */ |
97 | #define RTW_F_ANTDIV 0x00000010 /* h/w antenna diversity */ |
98 | #define RTW_F_9356SROM 0x00000020 /* 93c56 SROM */ |
99 | #define RTW_F_DK_VALID 0x00000040 /* keys in DK0-DK3 are valid */ |
100 | #define RTW_C_RXWEP_40 0x00000080 /* h/w decrypts 40-bit WEP */ |
101 | #define RTW_C_RXWEP_104 0x00000100 /* h/w decrypts 104-bit WEP */ |
102 | /* all PHY flags */ |
103 | #define RTW_F_ALLPHY (RTW_F_DIGPHY|RTW_F_DFLANTB|RTW_F_ANTDIV) |
104 | enum rtw_access {RTW_ACCESS_NONE = 0, |
105 | RTW_ACCESS_CONFIG = 1, |
106 | RTW_ACCESS_ANAPARM = 2}; |
107 | |
108 | struct rtw_regs { |
109 | bus_space_tag_t r_bt; |
110 | bus_space_handle_t r_bh; |
111 | bus_size_t r_sz; |
112 | enum rtw_access r_access; |
113 | }; |
114 | |
115 | /* |
116 | * Bus barrier |
117 | * |
118 | * Complete outstanding read and/or write ops on [reg0, reg1] |
119 | * ([reg1, reg0]) before starting new ops on the same region. See |
120 | * acceptable bus_space_barrier(9) for the flag definitions. |
121 | */ |
122 | static inline void |
123 | rtw_barrier(const struct rtw_regs *r, int reg0, int reg1, int flags) |
124 | { |
125 | bus_space_barrier(r->r_bt, r->r_bh, MIN(reg0, reg1), |
126 | MAX(reg0, reg1) - MIN(reg0, reg1) + 4, flags); |
127 | } |
128 | |
129 | /* |
130 | * Barrier convenience macros. |
131 | */ |
132 | /* sync */ |
133 | #define RTW_SYNC(regs, reg0, reg1) \ |
134 | rtw_barrier(regs, reg0, reg1, BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) |
135 | |
136 | /* write-before-write */ |
137 | #define RTW_WBW(regs, reg0, reg1) \ |
138 | rtw_barrier(regs, reg0, reg1, BUS_SPACE_BARRIER_WRITE) |
139 | |
140 | /* write-before-read */ |
141 | #define RTW_WBR(regs, reg0, reg1) \ |
142 | rtw_barrier(regs, reg0, reg1, BUS_SPACE_BARRIER_WRITE) |
143 | |
144 | /* read-before-read */ |
145 | #define RTW_RBR(regs, reg0, reg1) \ |
146 | rtw_barrier(regs, reg0, reg1, BUS_SPACE_BARRIER_READ) |
147 | |
148 | /* read-before-write */ |
149 | #define RTW_RBW(regs, reg0, reg1) \ |
150 | rtw_barrier(regs, reg0, reg1, BUS_SPACE_BARRIER_READ) |
151 | |
152 | #define RTW_WBRW(regs, reg0, reg1) \ |
153 | rtw_barrier(regs, reg0, reg1, \ |
154 | BUS_SPACE_BARRIER_WRITE) |
155 | |
156 | #define RTW_SR_GET(sr, ofs) \ |
157 | (((sr)->sr_content[(ofs)/2] >> (((ofs) % 2 == 0) ? 0 : 8)) & 0xff) |
158 | |
159 | #define RTW_SR_GET16(sr, ofs) \ |
160 | (RTW_SR_GET((sr), (ofs)) | (RTW_SR_GET((sr), (ofs) + 1) << 8)) |
161 | |
162 | struct rtw_srom { |
163 | uint16_t *sr_content; |
164 | uint16_t sr_size; |
165 | }; |
166 | |
167 | struct rtw_rxsoft { |
168 | struct mbuf *rs_mbuf; |
169 | bus_dmamap_t rs_dmamap; |
170 | }; |
171 | |
172 | struct rtw_txsoft { |
173 | SIMPLEQ_ENTRY(rtw_txsoft) ts_q; |
174 | struct mbuf *ts_mbuf; |
175 | bus_dmamap_t ts_dmamap; |
176 | struct ieee80211_node *ts_ni; /* destination node */ |
177 | u_int ts_first; /* 1st hw descriptor */ |
178 | u_int ts_last; /* last hw descriptor */ |
179 | struct ieee80211_duration ts_d0; |
180 | struct ieee80211_duration ts_dn; |
181 | }; |
182 | |
183 | #define RTW_NTXPRI 4 /* number of Tx priorities */ |
184 | #define RTW_TXPRILO 0 |
185 | #define RTW_TXPRIMD 1 |
186 | #define RTW_TXPRIHI 2 |
187 | #define RTW_TXPRIBCN 3 /* beacon priority */ |
188 | |
189 | #define RTW_MAXPKTSEGS 64 /* Max 64 segments per Tx packet */ |
190 | |
191 | #define CASSERT(cond, complaint) complaint[(cond) ? 0 : -1] = complaint[(cond) ? 0 : -1] |
192 | |
193 | /* Note well: the descriptor rings must begin on RTW_DESC_ALIGNMENT |
194 | * boundaries. I allocate them consecutively from one buffer, so |
195 | * just round up. |
196 | */ |
197 | #define RTW_TXQLENLO 64 /* low-priority queue length */ |
198 | #define RTW_TXQLENMD 64 /* medium-priority */ |
199 | #define RTW_TXQLENHI 64 /* high-priority */ |
200 | #define RTW_TXQLENBCN 8 /* beacon */ |
201 | |
202 | #define RTW_NTXDESCLO RTW_TXQLENLO |
203 | #define RTW_NTXDESCMD RTW_TXQLENMD |
204 | #define RTW_NTXDESCHI RTW_TXQLENHI |
205 | #define RTW_NTXDESCBCN RTW_TXQLENBCN |
206 | |
207 | #define RTW_NTXDESCTOTAL (RTW_NTXDESCLO + RTW_NTXDESCMD + \ |
208 | RTW_NTXDESCHI + RTW_NTXDESCBCN) |
209 | |
210 | #define RTW_RXQLEN 64 |
211 | |
212 | struct rtw_rxdesc_blk { |
213 | u_int rdb_ndesc; |
214 | u_int rdb_next; |
215 | bus_dma_tag_t rdb_dmat; |
216 | bus_dmamap_t rdb_dmamap; |
217 | struct rtw_rxdesc *rdb_desc; |
218 | }; |
219 | |
220 | struct rtw_txdesc_blk { |
221 | u_int tdb_ndesc; |
222 | u_int tdb_next; |
223 | u_int tdb_nfree; |
224 | bus_dma_tag_t tdb_dmat; |
225 | bus_dmamap_t tdb_dmamap; |
226 | bus_addr_t tdb_physbase; |
227 | bus_addr_t tdb_ofs; |
228 | bus_size_t tdb_basereg; |
229 | uint32_t tdb_base; |
230 | struct rtw_txdesc *tdb_desc; |
231 | }; |
232 | |
233 | #define RTW_NEXT_IDX(__htc, __idx) (((__idx) + 1) % (__htc)->tdb_ndesc) |
234 | |
235 | #define RTW_NEXT_DESC(__htc, __idx) \ |
236 | ((__htc)->tdb_physbase + \ |
237 | sizeof(struct rtw_txdesc) * RTW_NEXT_IDX((__htc), (__idx))) |
238 | |
239 | SIMPLEQ_HEAD(rtw_txq, rtw_txsoft); |
240 | |
241 | struct rtw_txsoft_blk { |
242 | /* dirty/free s/w descriptors */ |
243 | struct rtw_txq tsb_dirtyq; |
244 | struct rtw_txq tsb_freeq; |
245 | u_int tsb_ndesc; |
246 | int tsb_tx_timer; |
247 | struct rtw_txsoft *tsb_desc; |
248 | uint8_t tsb_poll; |
249 | }; |
250 | |
251 | struct rtw_descs { |
252 | struct rtw_txdesc hd_txlo[RTW_NTXDESCLO]; |
253 | struct rtw_txdesc hd_txmd[RTW_NTXDESCMD]; |
254 | struct rtw_txdesc hd_txhi[RTW_NTXDESCMD]; |
255 | struct rtw_rxdesc hd_rx[RTW_RXQLEN]; |
256 | struct rtw_txdesc hd_bcn[RTW_NTXDESCBCN]; |
257 | }; |
258 | #define RTW_DESC_OFFSET(ring, i) offsetof(struct rtw_descs, ring[i]) |
259 | #define RTW_RING_OFFSET(ring) RTW_DESC_OFFSET(ring, 0) |
260 | #define RTW_RING_BASE(sc, ring) ((sc)->sc_desc_physaddr + \ |
261 | RTW_RING_OFFSET(ring)) |
262 | |
263 | /* Radio capture format for RTL8180. */ |
264 | |
265 | #define RTW_RX_RADIOTAP_PRESENT \ |
266 | ((1 << IEEE80211_RADIOTAP_TSFT) | \ |
267 | (1 << IEEE80211_RADIOTAP_FLAGS) | \ |
268 | (1 << IEEE80211_RADIOTAP_RATE) | \ |
269 | (1 << IEEE80211_RADIOTAP_CHANNEL) | \ |
270 | (1 << IEEE80211_RADIOTAP_LOCK_QUALITY) | \ |
271 | (1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL) | \ |
272 | 0) |
273 | |
274 | #define RTW_PHILIPS_RX_RADIOTAP_PRESENT \ |
275 | ((1 << IEEE80211_RADIOTAP_TSFT) | \ |
276 | (1 << IEEE80211_RADIOTAP_FLAGS) | \ |
277 | (1 << IEEE80211_RADIOTAP_RATE) | \ |
278 | (1 << IEEE80211_RADIOTAP_CHANNEL) | \ |
279 | (1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL) | \ |
280 | 0) |
281 | |
282 | struct { |
283 | struct ieee80211_radiotap_header ; |
284 | uint64_t ; |
285 | uint8_t ; |
286 | uint8_t ; |
287 | uint16_t ; |
288 | uint16_t ; |
289 | union { |
290 | struct { |
291 | uint16_t ; |
292 | uint8_t ; |
293 | } ; |
294 | struct { |
295 | uint8_t ; |
296 | } ; |
297 | } ; |
298 | } __packed; |
299 | |
300 | #define RTW_TX_RADIOTAP_PRESENT \ |
301 | ((1 << IEEE80211_RADIOTAP_RATE) | \ |
302 | (1 << IEEE80211_RADIOTAP_CHANNEL) | \ |
303 | 0) |
304 | |
305 | struct { |
306 | struct ieee80211_radiotap_header ; |
307 | uint8_t ; |
308 | uint8_t ; |
309 | uint16_t ; |
310 | uint16_t ; |
311 | } __packed; |
312 | |
313 | enum rtw_attach_state {FINISHED, FINISH_DESCMAP_LOAD, FINISH_DESCMAP_CREATE, |
314 | FINISH_DESC_MAP, FINISH_DESC_ALLOC, FINISH_RXMAPS_CREATE, |
315 | FINISH_TXMAPS_CREATE, FINISH_RESET, FINISH_READ_SROM, FINISH_PARSE_SROM, |
316 | FINISH_RF_ATTACH, FINISH_ID_STA, FINISH_TXDESCBLK_SETUP, |
317 | FINISH_TXCTLBLK_SETUP, DETACHED}; |
318 | |
319 | struct rtw_mtbl { |
320 | int (*mt_newstate)(struct ieee80211com *, |
321 | enum ieee80211_state, int); |
322 | void (*mt_recv_mgmt)(struct ieee80211com *, |
323 | struct mbuf *, struct ieee80211_node *, |
324 | int, int, uint32_t); |
325 | struct ieee80211_node *(*mt_node_alloc)(struct ieee80211_node_table*); |
326 | void (*mt_node_free)(struct ieee80211_node *); |
327 | }; |
328 | |
329 | enum rtw_pwrstate { RTW_OFF = 0, RTW_SLEEP, RTW_ON }; |
330 | |
331 | typedef void (*rtw_continuous_tx_cb_t)(void *arg, int); |
332 | |
333 | struct rtw_phy { |
334 | struct rtw_rf *p_rf; |
335 | struct rtw_regs *p_regs; |
336 | }; |
337 | |
338 | struct rtw_bbpset { |
339 | u_int bb_antatten; |
340 | u_int bb_chestlim; |
341 | u_int bb_chsqlim; |
342 | u_int bb_ifagcdet; |
343 | u_int bb_ifagcini; |
344 | u_int bb_ifagclimit; |
345 | u_int bb_lnadet; |
346 | u_int bb_sys1; |
347 | u_int bb_sys2; |
348 | u_int bb_sys3; |
349 | u_int bb_trl; |
350 | u_int bb_txagc; |
351 | }; |
352 | |
353 | struct rtw_rf { |
354 | void (*rf_destroy)(struct rtw_rf *); |
355 | /* args: frequency, txpower, power state */ |
356 | int (*rf_init)(struct rtw_rf *, u_int, uint8_t, |
357 | enum rtw_pwrstate); |
358 | /* arg: power state */ |
359 | int (*rf_pwrstate)(struct rtw_rf *, enum rtw_pwrstate); |
360 | /* arg: frequency */ |
361 | int (*rf_tune)(struct rtw_rf *, u_int); |
362 | /* arg: txpower */ |
363 | int (*rf_txpower)(struct rtw_rf *, uint8_t); |
364 | rtw_continuous_tx_cb_t rf_continuous_tx_cb; |
365 | void *rf_continuous_tx_arg; |
366 | struct rtw_bbpset rf_bbpset; |
367 | }; |
368 | |
369 | static __inline void |
370 | rtw_rf_destroy(struct rtw_rf *rf) |
371 | { |
372 | (*rf->rf_destroy)(rf); |
373 | } |
374 | |
375 | static __inline int |
376 | rtw_rf_init(struct rtw_rf *rf, u_int freq, uint8_t opaque_txpower, |
377 | enum rtw_pwrstate power) |
378 | { |
379 | return (*rf->rf_init)(rf, freq, opaque_txpower, power); |
380 | } |
381 | |
382 | static __inline int |
383 | rtw_rf_pwrstate(struct rtw_rf *rf, enum rtw_pwrstate power) |
384 | { |
385 | return (*rf->rf_pwrstate)(rf, power); |
386 | } |
387 | |
388 | static __inline int |
389 | rtw_rf_tune(struct rtw_rf *rf, u_int freq) |
390 | { |
391 | return (*rf->rf_tune)(rf, freq); |
392 | } |
393 | |
394 | static __inline int |
395 | rtw_rf_txpower(struct rtw_rf *rf, uint8_t opaque_txpower) |
396 | { |
397 | return (*rf->rf_txpower)(rf, opaque_txpower); |
398 | } |
399 | |
400 | typedef int (*rtw_rf_write_t)(struct rtw_regs *, enum rtw_rfchipid, u_int, |
401 | uint32_t); |
402 | |
403 | struct rtw_rfbus { |
404 | struct rtw_regs *b_regs; |
405 | rtw_rf_write_t b_write; |
406 | }; |
407 | |
408 | static __inline int |
409 | rtw_rfbus_write(struct rtw_rfbus *bus, enum rtw_rfchipid rfchipid, u_int addr, |
410 | uint32_t val) |
411 | { |
412 | return (*bus->b_write)(bus->b_regs, rfchipid, addr, val); |
413 | } |
414 | |
415 | struct rtw_max2820 { |
416 | struct rtw_rf mx_rf; |
417 | struct rtw_rfbus mx_bus; |
418 | int mx_is_a; /* 1: MAX2820A/MAX2821A */ |
419 | }; |
420 | |
421 | struct rtw_grf5101 { |
422 | struct rtw_rf gr_rf; |
423 | struct rtw_rfbus gr_bus; |
424 | }; |
425 | |
426 | struct rtw_sa2400 { |
427 | struct rtw_rf sa_rf; |
428 | struct rtw_rfbus sa_bus; |
429 | int sa_digphy; /* 1: digital PHY */ |
430 | }; |
431 | |
432 | typedef void (*rtw_pwrstate_t)(struct rtw_regs *, enum rtw_pwrstate, int, int); |
433 | |
434 | union rtw_keys { |
435 | uint8_t rk_keys[4][16]; |
436 | uint32_t rk_words[16]; |
437 | }; |
438 | |
439 | #define RTW_LED_SLOW_TICKS MAX(1, hz/2) |
440 | #define RTW_LED_FAST_TICKS MAX(1, hz/10) |
441 | |
442 | struct rtw_led_state { |
443 | #define RTW_LED0 0x1 |
444 | #define RTW_LED1 0x2 |
445 | uint8_t ls_slowblink:2; |
446 | uint8_t ls_actblink:2; |
447 | uint8_t ls_default:2; |
448 | uint8_t ls_state; |
449 | uint8_t ls_event; |
450 | #define RTW_LED_S_RX 0x1 |
451 | #define RTW_LED_S_TX 0x2 |
452 | #define RTW_LED_S_SLOW 0x4 |
453 | struct callout ls_slow_ch; |
454 | struct callout ls_fast_ch; |
455 | }; |
456 | |
457 | struct rtw_softc { |
458 | device_t sc_dev; |
459 | device_suspensor_t sc_suspensor; |
460 | pmf_qual_t sc_qual; |
461 | |
462 | struct ethercom sc_ec; |
463 | struct ieee80211com sc_ic; |
464 | struct rtw_regs sc_regs; |
465 | bus_dma_tag_t sc_dmat; |
466 | uint32_t sc_flags; |
467 | |
468 | enum rtw_attach_state sc_attach_state; |
469 | enum rtw_rfchipid sc_rfchipid; |
470 | enum rtw_locale sc_locale; |
471 | uint8_t sc_phydelay; |
472 | |
473 | /* s/w Tx/Rx descriptors */ |
474 | struct rtw_txsoft_blk sc_txsoft_blk[RTW_NTXPRI]; |
475 | struct rtw_txdesc_blk sc_txdesc_blk[RTW_NTXPRI]; |
476 | |
477 | struct rtw_rxsoft sc_rxsoft[RTW_RXQLEN]; |
478 | struct rtw_rxdesc_blk sc_rxdesc_blk; |
479 | |
480 | struct rtw_descs *sc_descs; |
481 | |
482 | bus_dma_segment_t sc_desc_segs; |
483 | int sc_desc_nsegs; |
484 | bus_dmamap_t sc_desc_dmamap; |
485 | #define sc_desc_physaddr sc_desc_dmamap->dm_segs[0].ds_addr |
486 | |
487 | struct rtw_srom sc_srom; |
488 | |
489 | enum rtw_pwrstate sc_pwrstate; |
490 | |
491 | rtw_pwrstate_t sc_pwrstate_cb; |
492 | |
493 | struct rtw_rf *sc_rf; |
494 | |
495 | uint16_t sc_inten; |
496 | |
497 | /* interrupt acknowledge hook */ |
498 | void (*sc_intr_ack)(struct rtw_regs *); |
499 | |
500 | struct rtw_mtbl sc_mtbl; |
501 | |
502 | struct bpf_if * sc_radiobpf; |
503 | |
504 | struct callout sc_scan_ch; |
505 | u_int sc_cur_chan; |
506 | |
507 | uint32_t sc_tsfth; /* most significant TSFT bits */ |
508 | uint32_t sc_rcr; /* RTW_RCR */ |
509 | uint8_t sc_csthr; /* carrier-sense threshold */ |
510 | |
511 | int sc_do_tick; /* indicate 1s ticks */ |
512 | struct timeval sc_tick0; /* first tick */ |
513 | |
514 | uint8_t sc_rev; /* PCI/Cardbus revision */ |
515 | |
516 | uint32_t sc_anaparm; /* register RTW_ANAPARM */ |
517 | |
518 | union { |
519 | struct rtw_rx_radiotap_header tap; |
520 | uint8_t pad[64]; |
521 | } sc_rxtapu; |
522 | union { |
523 | struct rtw_tx_radiotap_header tap; |
524 | uint8_t pad[64]; |
525 | } sc_txtapu; |
526 | union rtw_keys sc_keys; |
527 | struct ifqueue sc_beaconq; |
528 | struct rtw_led_state sc_led_state; |
529 | int sc_hwverid; |
530 | }; |
531 | |
532 | #define sc_if sc_ec.ec_if |
533 | #define sc_rxtap sc_rxtapu.tap |
534 | #define sc_txtap sc_txtapu.tap |
535 | |
536 | void rtw_txdac_enable(struct rtw_softc *, int); |
537 | void rtw_anaparm_enable(struct rtw_regs *, int); |
538 | void rtw_config0123_enable(struct rtw_regs *, int); |
539 | void rtw_continuous_tx_enable(struct rtw_softc *, int); |
540 | void rtw_set_access(struct rtw_regs *, enum rtw_access); |
541 | |
542 | void rtw_attach(struct rtw_softc *); |
543 | int rtw_detach(struct rtw_softc *); |
544 | int rtw_intr(void *); |
545 | |
546 | bool rtw_suspend(device_t, const pmf_qual_t *); |
547 | bool rtw_resume(device_t, const pmf_qual_t *); |
548 | |
549 | int rtw_activate(device_t, enum devact); |
550 | |
551 | const char *rtw_pwrstate_string(enum rtw_pwrstate); |
552 | |
553 | #endif /* _DEV_IC_RTWVAR_H_ */ |
554 | |