1 | /* $NetBSD: if_atureg.h,v 1.11 2016/04/23 10:15:31 skrll Exp $ */ |
2 | /* $OpenBSD: if_atureg.h,v 1.21 2004/12/23 13:19:38 dlg Exp $ */ |
3 | /* |
4 | * Copyright (c) 2003 |
5 | * Daan Vreeken <Danovitsch@Vitsch.net>. All rights reserved. |
6 | * |
7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions |
9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * 2. Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
15 | * 3. All advertising materials mentioning features or use of this software |
16 | * must display the following acknowledgement: |
17 | * This product includes software developed by Daan Vreeken. |
18 | * 4. Neither the name of the author nor the names of any co-contributors |
19 | * may be used to endorse or promote products derived from this software |
20 | * without specific prior written permission. |
21 | * |
22 | * THIS SOFTWARE IS PROVIDED BY DAAN VREEKEN AND CONTRIBUTORS ``AS IS'' AND |
23 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
25 | * ARE DISCLAIMED. IN NO EVENT SHALL Daan Vreeken OR THE VOICES IN HIS HEAD |
26 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
28 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
29 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
30 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
31 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF |
32 | * THE POSSIBILITY OF SUCH DAMAGE. |
33 | * |
34 | */ |
35 | |
36 | #define ATU_CONFIG_NO 1 |
37 | #define ATU_IFACE_IDX 0 |
38 | |
39 | /* the number of simultaneously requested RX transfers */ |
40 | #define ATU_RX_LIST_CNT 1 |
41 | |
42 | /* |
43 | * the number of simultaneously started TX transfers |
44 | * my measurements : |
45 | * 1 430.82 KB/sec |
46 | * 2 534.66 KB/sec |
47 | * 3 536.23 KB/sec |
48 | * 4 537.80 KB/sec |
49 | * 6 537.30 KB/sec |
50 | * 8 535.31 KB/sec |
51 | * 16 535.68 KB/sec |
52 | * 128 535.67 KB/sec (before you ask : yes, 128 is silly :) |
53 | * (+/- 24% increase) |
54 | */ |
55 | #define ATU_TX_LIST_CNT 8 |
56 | |
57 | /* |
58 | * According to the 802.11 spec (7.1.2) the frame body can be up to 2312 bytes |
59 | */ |
60 | #define ATU_RX_BUFSZ (ATU_RX_HDRLEN + \ |
61 | sizeof(struct ieee80211_frame_addr4) + 2312 + 4) |
62 | /* BE CAREFULL! should add ATU_TX_PADDING */ |
63 | #define ATU_TX_BUFSZ (ATU_TX_HDRLEN + \ |
64 | sizeof(struct ieee80211_frame_addr4) + 2312) |
65 | |
66 | #define ATU_MIN_FRAMELEN 60 |
67 | |
68 | /* |
69 | * Sending packets of more than 1500 bytes confuses some access points, so the |
70 | * default MTU is set to 1500 but can be increased up to 2310 bytes using |
71 | * ifconfig |
72 | */ |
73 | #define ATU_DEFAULT_MTU 1500 |
74 | #define ATU_MAX_MTU (2312 - 2) |
75 | |
76 | #define ATU_ENDPT_RX 0x0 |
77 | #define ATU_ENDPT_TX 0x1 |
78 | #define ATU_ENDPT_MAX 0x2 |
79 | |
80 | #define ATU_TX_TIMEOUT 10000 |
81 | #define ATU_JOIN_TIMEOUT 2000 |
82 | |
83 | #define ATU_NO_QUIRK 0x0000 |
84 | #define ATU_QUIRK_NO_REMAP 0x0001 |
85 | #define ATU_QUIRK_FW_DELAY 0x0002 |
86 | |
87 | #define ATU_DEFAULT_SSID "" |
88 | #define ATU_DEFAULT_CHANNEL 10 |
89 | |
90 | enum atu_radio_type { |
91 | RadioRFMD = 0, |
92 | RadioRFMD2958, |
93 | RadioRFMD2958_SMC, |
94 | RadioIntersil, |
95 | AT76C503_i3863, |
96 | AT76C503_rfmd_acc, |
97 | AT76C505_rfmd |
98 | }; |
99 | |
100 | struct atu_type { |
101 | uint16_t atu_vid; |
102 | uint16_t atu_pid; |
103 | enum atu_radio_type atu_radio; |
104 | uint16_t atu_quirk; |
105 | }; |
106 | |
107 | struct atu_softc; |
108 | |
109 | struct atu_chain { |
110 | struct atu_softc *atu_sc; |
111 | struct usbd_xfer *atu_xfer; |
112 | char *atu_buf; |
113 | struct mbuf *atu_mbuf; |
114 | uint8_t atu_idx; |
115 | uint16_t atu_length; |
116 | int atu_in_xfer; |
117 | SLIST_ENTRY(atu_chain) atu_list; |
118 | }; |
119 | |
120 | struct atu_cdata { |
121 | struct atu_chain atu_tx_chain[ATU_TX_LIST_CNT]; |
122 | struct atu_chain atu_rx_chain[ATU_RX_LIST_CNT]; |
123 | |
124 | SLIST_HEAD(atu_list_head, atu_chain) atu_rx_free; |
125 | struct atu_list_head atu_tx_free; |
126 | |
127 | uint8_t atu_tx_inuse; |
128 | uint8_t atu_tx_last_idx; |
129 | }; |
130 | |
131 | #define MAX_SSID_LEN 32 |
132 | #define ATU_AVG_TIME 20 |
133 | |
134 | struct atu_softc { |
135 | device_t atu_dev; |
136 | struct ethercom sc_ec; |
137 | struct ieee80211com sc_ic; |
138 | int (*sc_newstate)(struct ieee80211com *, |
139 | enum ieee80211_state, int); |
140 | |
141 | char sc_state; |
142 | #define ATU_S_DEAD 0 |
143 | #define ATU_S_OK 1 |
144 | #define ATU_S_UNCONFIG 2 |
145 | char sc_cmd; |
146 | #define ATU_C_NONE 0 |
147 | #define ATU_C_SCAN 1 |
148 | #define ATU_C_JOIN 2 |
149 | struct usb_task sc_task; |
150 | |
151 | struct usbd_device *atu_udev; |
152 | struct usbd_interface *atu_iface; |
153 | struct ethercom atu_ec; |
154 | struct ifmedia atu_media; |
155 | int atu_ed[ATU_ENDPT_MAX]; |
156 | struct usbd_pipe *atu_ep[ATU_ENDPT_MAX]; |
157 | int atu_unit; |
158 | int atu_if_flags; |
159 | |
160 | struct atu_cdata atu_cdata; |
161 | |
162 | struct timeval atu_rx_notice; |
163 | |
164 | uint8_t atu_bssid[ETHER_ADDR_LEN]; |
165 | enum atu_radio_type atu_radio; |
166 | uint16_t atu_quirk; |
167 | |
168 | uint8_t atu_channel; |
169 | uint16_t atu_desired_channel; |
170 | uint8_t atu_mode; |
171 | #define NO_MODE_YET 0 |
172 | #define AD_HOC_MODE 1 |
173 | #define INFRASTRUCTURE_MODE 2 |
174 | |
175 | uint8_t atu_radio_on; |
176 | uint8_t atu_encrypt; |
177 | #define ATU_WEP_RX 0x01 |
178 | #define ATU_WEP_TX 0x02 |
179 | #define ATU_WEP_TXRX (ATU_WEP_RX | ATU_WEP_TX) |
180 | int atu_wepkey; |
181 | int atu_wepkeylen; |
182 | uint8_t atu_wepkeys[4][13]; |
183 | }; |
184 | |
185 | #define sc_if sc_ec.ec_if |
186 | |
187 | /* Commands for uploading the firmware (standard DFU interface) */ |
188 | #define DFU_DNLOAD UT_WRITE_CLASS_INTERFACE, 0x01 |
189 | #define DFU_GETSTATUS UT_READ_CLASS_INTERFACE, 0x03 |
190 | #define DFU_GETSTATE UT_READ_CLASS_INTERFACE, 0x05 |
191 | #define DFU_REMAP UT_WRITE_VENDOR_INTERFACE, 0x0a |
192 | |
193 | /* DFU states */ |
194 | #define DFUState_AppIdle 0 |
195 | #define DFUState_AppDetach 1 |
196 | #define DFUState_DFUIdle 2 |
197 | #define DFUState_DnLoadSync 3 |
198 | #define DFUState_DnLoadBusy 4 |
199 | #define DFUState_DnLoadIdle 5 |
200 | #define DFUState_ManifestSync 6 |
201 | #define DFUState_Manifest 7 |
202 | #define DFUState_ManifestWait 8 |
203 | #define DFUState_UploadIdle 9 |
204 | #define DFUState_DFUError 10 |
205 | |
206 | #define DFU_MaxBlockSize 1024 |
207 | |
208 | /* AT76c503 operating modes */ |
209 | #define MODE_NONE 0x00 |
210 | #define MODE_NETCARD 0x01 |
211 | #define MODE_CONFIG 0x02 |
212 | #define MODE_DFU 0x03 |
213 | #define MODE_NOFLASHNETCARD 0x04 |
214 | |
215 | /* AT76c503 commands */ |
216 | #define CMD_SET_MIB 0x01 |
217 | #define CMD_START_SCAN 0x03 |
218 | #define CMD_JOIN 0x04 |
219 | #define CMD_START_IBSS 0x05 |
220 | #define CMD_RADIO 0x06 |
221 | #define CMD_RADIO_ON 0x06 |
222 | #define CMD_RADIO_OFF 0x07 |
223 | #define CMD_STARTUP 0x0b |
224 | |
225 | /* AT76c503 status messages - used in atu_wait_completion */ |
226 | #define STATUS_IDLE 0x00 |
227 | #define STATUS_COMPLETE 0x01 |
228 | #define STATUS_UNKNOWN 0x02 |
229 | #define STATUS_INVALID_PARAMETER 0x03 |
230 | #define STATUS_FUNCTION_NOT_SUPPORTED 0x04 |
231 | #define STATUS_TIME_OUT 0x07 |
232 | #define STATUS_IN_PROGRESS 0x08 |
233 | #define STATUS_HOST_FAILURE 0xff |
234 | #define STATUS_SCAN_FAILED 0xf0 |
235 | |
236 | /* AT76c503 command header */ |
237 | struct atu_cmd { |
238 | uByte Cmd; |
239 | uByte Reserved; |
240 | uWord Size; |
241 | } UPACKED; |
242 | |
243 | /* CMD_SET_MIB command (0x01) */ |
244 | struct atu_cmd_set_mib { |
245 | /* AT76c503 command header */ |
246 | uByte AtCmd; |
247 | uByte AtReserved; |
248 | uWord AtSize; |
249 | |
250 | /* MIB header */ |
251 | uByte MIBType; |
252 | uByte MIBSize; |
253 | uByte MIBIndex; |
254 | uByte MIBReserved; |
255 | |
256 | /* MIB data */ |
257 | uByte data[72]; |
258 | } UPACKED; |
259 | |
260 | /* CMD_STARTUP command (0x0b) */ |
261 | struct atu_cmd_card_config { |
262 | uByte Cmd; |
263 | uByte Reserved; |
264 | uWord Size; |
265 | |
266 | uByte ExcludeUnencrypted; |
267 | uByte PromiscuousMode; |
268 | uByte ShortRetryLimit; |
269 | uByte EncryptionType; |
270 | uWord RTS_Threshold; |
271 | uWord FragThreshold; /* 256 .. 2346 */ |
272 | uByte BasicRateSet[4]; |
273 | uByte AutoRateFallback; |
274 | uByte Channel; |
275 | uByte PrivacyInvoked; /* wep */ |
276 | uByte WEP_DefaultKeyID; /* 0 .. 3 */ |
277 | uByte SSID[MAX_SSID_LEN]; |
278 | uByte WEP_DefaultKey[4][13]; |
279 | uByte SSID_Len; |
280 | uByte ShortPreamble; |
281 | uWord BeaconPeriod; |
282 | } UPACKED; |
283 | |
284 | /* CMD_SCAN command (0x03) */ |
285 | struct atu_cmd_do_scan { |
286 | uByte Cmd; |
287 | uByte Reserved; |
288 | uWord Size; |
289 | |
290 | uByte BSSID[ETHER_ADDR_LEN]; |
291 | uByte SSID[MAX_SSID_LEN]; |
292 | uByte ScanType; |
293 | uByte Channel; |
294 | uWord ProbeDelay; |
295 | uWord MinChannelTime; |
296 | uWord MaxChannelTime; |
297 | uByte SSID_Len; |
298 | uByte InternationalScan; |
299 | } UPACKED; |
300 | |
301 | #define ATU_SCAN_ACTIVE 0x00 |
302 | #define ATU_SCAN_PASSIVE 0x01 |
303 | |
304 | /* CMD_JOIN command (0x04) */ |
305 | struct atu_cmd_join { |
306 | uByte Cmd; |
307 | uByte Reserved; |
308 | uWord Size; |
309 | |
310 | uByte bssid[ETHER_ADDR_LEN]; |
311 | uByte essid[32]; |
312 | uByte bss_type; |
313 | uByte channel; |
314 | uWord timeout; |
315 | uByte essid_size; |
316 | uByte reserved; |
317 | } UPACKED; |
318 | |
319 | /* CMD_START_IBSS (0x05) */ |
320 | struct atu_cmd_start_ibss { |
321 | uByte Cmd; |
322 | uByte Reserved; |
323 | uWord Size; |
324 | |
325 | uByte BSSID[ETHER_ADDR_LEN]; |
326 | uByte SSID[32]; |
327 | uByte BSSType; |
328 | uByte Channel; |
329 | uByte SSIDSize; |
330 | uByte Res[3]; |
331 | } UPACKED; |
332 | |
333 | /* |
334 | * The At76c503 adapters come with different types of radios on them. |
335 | * At this moment the driver supports adapters with RFMD and Intersil radios. |
336 | */ |
337 | |
338 | /* The config structure of an RFMD radio */ |
339 | struct atu_rfmd_conf { |
340 | uint8_t CR20[14]; |
341 | uint8_t CR21[14]; |
342 | uint8_t BB_CR[14]; |
343 | uint8_t PidVid[4]; |
344 | uint8_t MACAddr[ETHER_ADDR_LEN]; |
345 | uint8_t RegulatoryDomain; |
346 | uint8_t LowPowerValues[14]; |
347 | uint8_t NormalPowerValues[14]; |
348 | uint8_t Reserved[3]; |
349 | /* then we have 84 bytes, somehow Windows reads 95?? */ |
350 | uint8_t Rest[11]; |
351 | } UPACKED; |
352 | |
353 | /* The config structure of an Intersil radio */ |
354 | struct atu_intersil_conf { |
355 | uint8_t MACAddr[ETHER_ADDR_LEN]; |
356 | /* From the HFA3861B manual : */ |
357 | /* Manual TX power control (7bit : -64 to 63) */ |
358 | uint8_t CR31[14]; |
359 | /* TX power measurement */ |
360 | uint8_t CR58[14]; |
361 | uint8_t PidVid[4]; |
362 | uint8_t RegulatoryDomain; |
363 | uint8_t Reserved[1]; |
364 | } UPACKED; |
365 | |
366 | |
367 | /* Firmware information request */ |
368 | struct atu_fw { |
369 | uint8_t major; |
370 | uint8_t minor; |
371 | uint8_t patch; |
372 | uint8_t build; |
373 | } UPACKED; |
374 | |
375 | /* |
376 | * The header the AT76c503 puts in front of RX packets (for both managment & |
377 | * data) |
378 | */ |
379 | struct atu_rx_hdr { |
380 | uWord length; |
381 | uByte rx_rate; |
382 | uByte newbss; |
383 | uByte fragmentation; |
384 | uByte ; |
385 | uByte link_quality; |
386 | uByte noise_level; |
387 | uDWord rx_time; |
388 | } UPACKED; |
389 | #define ATU_RX_HDRLEN sizeof(struct atu_rx_hdr) |
390 | |
391 | /* |
392 | * The header we have to put in front of a TX packet before sending it to the |
393 | * AT76c503 |
394 | */ |
395 | struct atu_tx_hdr { |
396 | uWord length; |
397 | uByte tx_rate; |
398 | uByte padding; |
399 | uByte reserved[4]; |
400 | } UPACKED; |
401 | #define ATU_TX_HDRLEN sizeof(struct atu_tx_hdr) |
402 | |
403 | #define NR(x) (void *)((long)x) |
404 | |
405 | /* |
406 | * The linux driver uses separate routines for every mib request they do |
407 | * (eg. set_radio / set_preamble / set_frag / etc etc ) |
408 | * We just define a list of types, sizes and offsets and use those |
409 | */ |
410 | |
411 | /* Name Type Size Index */ |
412 | #define MIB_LOCAL 0x01 |
413 | #define MIB_LOCAL__BEACON_ENABLE MIB_LOCAL, 1, 2 |
414 | #define MIB_LOCAL__AUTO_RATE_FALLBACK MIB_LOCAL, 1, 3 |
415 | #define MIB_LOCAL__SSID_SIZE MIB_LOCAL, 1, 5 |
416 | #define MIB_LOCAL__PREAMBLE MIB_LOCAL, 1, 9 |
417 | #define MIB_MAC_ADDR 0x02 |
418 | #define MIB_MAC_ADDR__ADDR MIB_MAC_ADDR, 6, 0 |
419 | #define MIB_MAC 0x03 |
420 | #define MIB_MAC__FRAG MIB_MAC, 2, 8 |
421 | #define MIB_MAC__RTS MIB_MAC, 2, 10 |
422 | #define MIB_MAC__DESIRED_SSID MIB_MAC, 32, 28 |
423 | #define MIB_MAC_MGMT 0x05 |
424 | #define MIB_MAC_MGMT__BEACON_PERIOD MIB_MAC_MGMT, 2, 0 |
425 | #define MIB_MAC_MGMT__CURRENT_BSSID MIB_MAC_MGMT, 6, 14 |
426 | #define MIB_MAC_MGMT__CURRENT_ESSID MIB_MAC_MGMT, 32, 20 |
427 | #define MIB_MAC_MGMT__POWER_MODE MIB_MAC_MGMT, 1, 53 |
428 | #define MIB_MAC_MGMT__IBSS_CHANGE MIB_MAC_MGMT, 1, 54 |
429 | #define MIB_MAC_WEP 0x06 |
430 | #define MIB_MAC_WEP__PRIVACY_INVOKED MIB_MAC_WEP, 1, 0 |
431 | #define MIB_MAC_WEP__KEY_ID MIB_MAC_WEP, 1, 1 |
432 | #define MIB_MAC_WEP__ICV_ERROR_COUNT MIB_MAC_WEP, 4, 4 |
433 | #define MIB_MAC_WEP__EXCLUDED_COUNT MIB_MAC_WEP, 4, 8 |
434 | #define MIB_MAC_WEP__KEYS(nr) MIB_MAC_WEP, 13, 12+(nr)*13 |
435 | #define MIB_MAC_WEP__ENCR_LEVEL MIB_MAC_WEP, 1, 64 |
436 | #define MIB_PHY 0x07 |
437 | #define MIB_PHY__CHANNEL MIB_PHY, 1, 20 |
438 | #define MIB_PHY__REG_DOMAIN MIB_PHY, 1, 23 |
439 | #define MIB_FW_VERSION 0x08 |
440 | #define MIB_DOMAIN 0x09 |
441 | #define MIB_DOMAIN__POWER_LEVELS MIB_DOMAIN, 14, 0 |
442 | #define MIB_DOMAIN__CHANNELS MIB_DOMAIN, 14, 14 |
443 | |
444 | #define ATU_WEP_OFF 0 |
445 | #define ATU_WEP_40BITS 1 |
446 | #define ATU_WEP_104BITS 2 |
447 | |
448 | #define POWER_MODE_ACTIVE 1 |
449 | #define POWER_MODE_SAVE 2 |
450 | #define POWER_MODE_SMART 3 |
451 | |
452 | #define PREAMBLE_SHORT 1 |
453 | #define PREAMBLE_LONG 0 |
454 | |