1 | /****************************************************************************** |
2 | |
3 | Copyright (c) 2001-2013, Intel Corporation |
4 | All rights reserved. |
5 | |
6 | Redistribution and use in source and binary forms, with or without |
7 | modification, are permitted provided that the following conditions are met: |
8 | |
9 | 1. Redistributions of source code must retain the above copyright notice, |
10 | this list of conditions and the following disclaimer. |
11 | |
12 | 2. Redistributions in binary form must reproduce the above copyright |
13 | notice, this list of conditions and the following disclaimer in the |
14 | documentation and/or other materials provided with the distribution. |
15 | |
16 | 3. Neither the name of the Intel Corporation nor the names of its |
17 | contributors may be used to endorse or promote products derived from |
18 | this software without specific prior written permission. |
19 | |
20 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
21 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
22 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
23 | ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
24 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
25 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
26 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
27 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
28 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
29 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
30 | POSSIBILITY OF SUCH DAMAGE. |
31 | |
32 | ******************************************************************************/ |
33 | /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_common.h 251964 2013-06-18 21:28:19Z jfv $*/ |
34 | /*$NetBSD: ixgbe_common.h,v 1.5 2015/08/05 04:08:44 msaitoh Exp $*/ |
35 | |
36 | #ifndef _IXGBE_COMMON_H_ |
37 | #define _IXGBE_COMMON_H_ |
38 | |
39 | #include "ixgbe_type.h" |
40 | #define IXGBE_WRITE_REG64(hw, reg, value) \ |
41 | do { \ |
42 | IXGBE_WRITE_REG(hw, reg, (u32) value); \ |
43 | IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \ |
44 | } while (0) |
45 | #if !defined(NO_READ_PBA_RAW) || !defined(NO_WRITE_PBA_RAW) |
46 | struct ixgbe_pba { |
47 | u16 word[2]; |
48 | u16 *pba_block; |
49 | }; |
50 | #endif |
51 | |
52 | void ixgbe_dcb_get_rtrup2tc_generic(struct ixgbe_hw *hw, u8 *map); |
53 | |
54 | u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw); |
55 | s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw); |
56 | s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw); |
57 | s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw); |
58 | s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw); |
59 | s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw); |
60 | s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num); |
61 | s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num, |
62 | u32 pba_num_size); |
63 | s32 ixgbe_read_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf, |
64 | u32 eeprom_buf_size, u16 max_pba_block_size, |
65 | struct ixgbe_pba *pba); |
66 | s32 ixgbe_write_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf, |
67 | u32 eeprom_buf_size, struct ixgbe_pba *pba); |
68 | s32 ixgbe_get_pba_block_size(struct ixgbe_hw *hw, u16 *eeprom_buf, |
69 | u32 eeprom_buf_size, u16 *pba_block_size); |
70 | s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr); |
71 | s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw); |
72 | void ixgbe_set_pci_config_data_generic(struct ixgbe_hw *hw, u16 link_status); |
73 | void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw); |
74 | s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw); |
75 | |
76 | s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index); |
77 | s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index); |
78 | |
79 | s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw); |
80 | s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data); |
81 | s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, |
82 | u16 words, u16 *data); |
83 | s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data); |
84 | s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset, |
85 | u16 words, u16 *data); |
86 | s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data); |
87 | s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset, |
88 | u16 words, u16 *data); |
89 | s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, |
90 | u16 *data); |
91 | s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, |
92 | u16 words, u16 *data); |
93 | u16 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw); |
94 | s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw, |
95 | u16 *checksum_val); |
96 | s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw); |
97 | s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg); |
98 | |
99 | s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, |
100 | u32 enable_addr); |
101 | s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index); |
102 | s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw); |
103 | s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list, |
104 | u32 mc_addr_count, |
105 | ixgbe_mc_addr_itr func, bool clear); |
106 | s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list, |
107 | u32 addr_count, ixgbe_mc_addr_itr func); |
108 | s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw); |
109 | s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw); |
110 | s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval); |
111 | s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw); |
112 | s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw); |
113 | |
114 | s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw); |
115 | bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw); |
116 | void ixgbe_fc_autoneg(struct ixgbe_hw *hw); |
117 | |
118 | s32 ixgbe_validate_mac_addr(u8 *mac_addr); |
119 | s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u16 mask); |
120 | void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u16 mask); |
121 | s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw); |
122 | |
123 | s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index); |
124 | s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index); |
125 | |
126 | s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr); |
127 | s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr); |
128 | |
129 | s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); |
130 | s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq); |
131 | s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); |
132 | s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq); |
133 | s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw); |
134 | s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, |
135 | u32 vind, bool vlan_on); |
136 | s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind, |
137 | bool vlan_on, bool *vfta_changed); |
138 | s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw); |
139 | s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan); |
140 | |
141 | s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, |
142 | ixgbe_link_speed *speed, |
143 | bool *link_up, bool link_up_wait_to_complete); |
144 | |
145 | s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix, |
146 | u16 *wwpn_prefix); |
147 | |
148 | s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs); |
149 | void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int pf); |
150 | void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf); |
151 | s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps); |
152 | void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom, |
153 | int strategy); |
154 | void ixgbe_enable_relaxed_ordering_gen2(struct ixgbe_hw *hw); |
155 | s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min, |
156 | u8 build, u8 ver); |
157 | u8 ixgbe_calculate_checksum(u8 *buffer, u32 length); |
158 | s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer, |
159 | u32 length); |
160 | void ixgbe_clear_tx_pending(struct ixgbe_hw *hw); |
161 | |
162 | extern s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw); |
163 | extern void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw); |
164 | |
165 | #endif /* IXGBE_COMMON */ |
166 | |