1 | /* $NetBSD: if_axereg.h,v 1.18 2016/04/23 10:15:31 skrll Exp $ */ |
2 | |
3 | /* |
4 | * Copyright (c) 1997, 1998, 1999, 2000-2003 |
5 | * Bill Paul <wpaul@windriver.com>. All rights reserved. |
6 | * |
7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions |
9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * 2. Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
15 | * 3. All advertising materials mentioning features or use of this software |
16 | * must display the following acknowledgement: |
17 | * This product includes software developed by Bill Paul. |
18 | * 4. Neither the name of the author nor the names of any co-contributors |
19 | * may be used to endorse or promote products derived from this software |
20 | * without specific prior written permission. |
21 | * |
22 | * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND |
23 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
25 | * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD |
26 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
28 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
29 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
30 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
31 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF |
32 | * THE POSSIBILITY OF SUCH DAMAGE. |
33 | * |
34 | * $FreeBSD: src/sys/dev/usb/if_axereg.h,v 1.2 2003/06/15 21:45:43 wpaul Exp $ |
35 | */ |
36 | |
37 | /* |
38 | * Definitions for the ASIX Electronics AX88172 to ethernet controller. |
39 | */ |
40 | |
41 | #include <sys/rndsource.h> |
42 | |
43 | /* |
44 | * Vendor specific commands |
45 | * ASIX conveniently doesn't document the 'set NODEID' command in their |
46 | * datasheet (thanks a lot guys). |
47 | * To make handling these commands easier, I added some extra data |
48 | * which is decided by the axe_cmd() routine. Commands are encoded |
49 | * in 16 bites, with the format: LDCC. L and D are both nibbles in |
50 | * the high byte. L represents the data length (0 to 15) and D |
51 | * represents the direction (0 for vendor read, 1 for vendor write). |
52 | * CC is the command byte, as specified in the manual. |
53 | */ |
54 | |
55 | #define AXE_CMD_DIR(x) (((x) & 0x0F00) >> 8) |
56 | #define AXE_CMD_LEN(x) (((x) & 0xF000) >> 12) |
57 | #define AXE_CMD_CMD(x) ((x) & 0x00FF) |
58 | |
59 | #define AXE_172_CMD_READ_RXTX_SRAM 0x2002 |
60 | #define AXE_182_CMD_READ_RXTX_SRAM 0x6002 |
61 | #define AXE_172_CMD_WRITE_RX_SRAM 0x0103 |
62 | #define AXE_172_CMD_WRITE_TX_SRAM 0x0104 |
63 | #define AXE_182_CMD_WRITE_RXTX_SRAM 0x8103 |
64 | #define AXE_CMD_MII_OPMODE_SW 0x0106 |
65 | #define AXE_CMD_MII_READ_REG 0x2007 |
66 | #define AXE_CMD_MII_WRITE_REG 0x2108 |
67 | #define AXE_CMD_MII_READ_OPMODE 0x1009 |
68 | #define AXE_CMD_MII_OPMODE_HW 0x010A |
69 | #define AXE_CMD_SROM_READ 0x200B |
70 | #define AXE_CMD_SROM_WRITE 0x010C |
71 | #define AXE_CMD_SROM_WR_ENABLE 0x010D |
72 | #define AXE_CMD_SROM_WR_DISABLE 0x010E |
73 | #define AXE_CMD_RXCTL_READ 0x200F |
74 | #define AXE_CMD_RXCTL_WRITE 0x0110 |
75 | #define AXE_CMD_READ_IPG012 0x3011 |
76 | #define AXE_172_CMD_WRITE_IPG0 0x0112 |
77 | #define AXE_172_CMD_WRITE_IPG1 0x0113 |
78 | #define AXE_172_CMD_WRITE_IPG2 0x0114 |
79 | #define AXE_178_CMD_WRITE_IPG012 0x0112 |
80 | #define AXE_CMD_READ_MCAST 0x8015 |
81 | #define AXE_CMD_WRITE_MCAST 0x8116 |
82 | #define AXE_172_CMD_READ_NODEID 0x6017 |
83 | #define AXE_172_CMD_WRITE_NODEID 0x6118 |
84 | #define AXE_178_CMD_READ_NODEID 0x6013 |
85 | #define AXE_178_CMD_WRITE_NODEID 0x6114 |
86 | #define AXE_CMD_READ_PHYID 0x2019 |
87 | #define AXE_172_CMD_READ_MEDIA 0x101A |
88 | #define AXE_178_CMD_READ_MEDIA 0x201A |
89 | #define AXE_CMD_WRITE_MEDIA 0x011B |
90 | #define AXE_CMD_READ_MONITOR_MODE 0x101C |
91 | #define AXE_CMD_WRITE_MONITOR_MODE 0x011D |
92 | #define AXE_CMD_READ_GPIO 0x101E |
93 | #define AXE_CMD_WRITE_GPIO 0x011F |
94 | #define AXE_CMD_SW_RESET_REG 0x0120 |
95 | #define AXE_CMD_SW_PHY_STATUS 0x0021 |
96 | #define AXE_CMD_SW_PHY_SELECT 0x0122 |
97 | |
98 | #define AXE_SW_RESET_CLEAR 0x00 |
99 | #define AXE_SW_RESET_RR 0x01 |
100 | #define AXE_SW_RESET_RT 0x02 |
101 | #define AXE_SW_RESET_PRTE 0x04 |
102 | #define AXE_SW_RESET_PRL 0x08 |
103 | #define AXE_SW_RESET_BZ 0x10 |
104 | #define AXE_SW_RESET_IPRL 0x20 |
105 | #define AXE_SW_RESET_IPPD 0x40 |
106 | |
107 | /* AX88178 documentation says to always write this bit... */ |
108 | #define AXE_178_RESET_MAGIC 0x40 |
109 | |
110 | #define AXE_178_MEDIA_GMII 0x0001 |
111 | #define AXE_MEDIA_FULL_DUPLEX 0x0002 |
112 | #define AXE_172_MEDIA_TX_ABORT_ALLOW 0x0004 |
113 | /* AX88178 documentation says to always write 1 to reserved bit... */ |
114 | #define AXE_178_MEDIA_MAGIC 0x0004 |
115 | #define AXE_178_MEDIA_ENCK 0x0008 |
116 | #define AXE_172_MEDIA_FLOW_CONTROL_EN 0x0010 |
117 | #define AXE_178_MEDIA_RXFLOW_CONTROL_EN 0x0010 |
118 | #define AXE_178_MEDIA_TXFLOW_CONTROL_EN 0x0020 |
119 | #define AXE_178_MEDIA_JUMBO_EN 0x0040 |
120 | #define AXE_178_MEDIA_LTPF_ONLY 0x0080 |
121 | #define AXE_178_MEDIA_RX_EN 0x0100 |
122 | #define AXE_178_MEDIA_100TX 0x0200 |
123 | #define AXE_178_MEDIA_SBP 0x0800 |
124 | #define AXE_178_MEDIA_SUPERMAC 0x1000 |
125 | |
126 | #define AXE_PHY_SEL_PRI 1 |
127 | #define AXE_PHY_SEL_SEC 0 |
128 | #define AXE_PHY_TYPE_MASK 0xE0 |
129 | #define AXE_PHY_TYPE_SHIFT 5 |
130 | #define AXE_PHY_TYPE(x) \ |
131 | (((x) & AXE_PHY_TYPE_MASK) >> AXE_PHY_TYPE_SHIFT) |
132 | |
133 | #define PHY_TYPE_100_HOME 0 /* 10/100 or 1M HOME PHY */ |
134 | #define PHY_TYPE_GIG 1 /* Gigabit PHY */ |
135 | #define PHY_TYPE_SPECIAL 4 /* Special case */ |
136 | #define PHY_TYPE_RSVD 5 /* Reserved */ |
137 | #define PHY_TYPE_NON_SUP 7 /* Non-supported PHY */ |
138 | |
139 | #define AXE_PHY_NO_MASK 0x1F |
140 | #define AXE_PHY_NO(x) ((x) & AXE_PHY_NO_MASK) |
141 | |
142 | #define AXE_772_PHY_NO_EPHY 0x10 /* Embedded 10/100 PHY of AX88772 */ |
143 | |
144 | #define AXE_GPIO0_EN 0x01 |
145 | #define AXE_GPIO0 0x02 |
146 | #define AXE_GPIO1_EN 0x04 |
147 | #define AXE_GPIO1 0x08 |
148 | #define AXE_GPIO2_EN 0x10 |
149 | #define AXE_GPIO2 0x20 |
150 | #define AXE_GPIO_RELOAD_EEPROM 0x80 |
151 | |
152 | #define AXE_PHY_MODE_MARVELL 0x00 |
153 | #define AXE_PHY_MODE_CICADA 0x01 |
154 | #define AXE_PHY_MODE_AGERE 0x02 |
155 | #define AXE_PHY_MODE_CICADA_V2 0x05 |
156 | #define AXE_PHY_MODE_AGERE_GMII 0x06 |
157 | #define AXE_PHY_MODE_CICADA_V2_ASIX 0x09 |
158 | #define AXE_PHY_MODE_REALTEK_8211CL 0x0C |
159 | #define AXE_PHY_MODE_REALTEK_8211BN 0x0D |
160 | #define AXE_PHY_MODE_REALTEK_8251CL 0x0E |
161 | #define AXE_PHY_MODE_ATTANSIC 0x40 |
162 | |
163 | #define AXE_RXCMD_PROMISC 0x0001 |
164 | #define AXE_RXCMD_ALLMULTI 0x0002 |
165 | #define AXE_172_RXCMD_UNICAST 0x0004 |
166 | #define AXE_178_RXCMD_KEEP_INVALID_CRC 0x0004 |
167 | #define AXE_RXCMD_BROADCAST 0x0008 |
168 | #define AXE_RXCMD_MULTICAST 0x0010 |
169 | #define AXE_RXCMD_ENABLE 0x0080 |
170 | #define AXE_178_RXCMD_MFB 0x0300 |
171 | |
172 | #define AXE_NOPHY 0xE0 |
173 | #define AXE_INTPHY 0x10 |
174 | |
175 | #define AXE_772B_RXCMD_RH1M 0x0100 |
176 | #define AXE_772B_RXCMD_RH2M 0x0200 |
177 | #define AXE_772B_RXCMD_RH3M 0x0400 |
178 | |
179 | #define AXE_RH1M_RXLEN_MASK 0x07ff |
180 | |
181 | #define AXE_TIMEOUT 1000 |
182 | |
183 | #define AXE_172_BUFSZ 1536 |
184 | #define AXE_178_MIN_BUFSZ 2048 |
185 | #define AXE_178_MAX_BUFSZ 16384 |
186 | |
187 | #define AXE_MIN_FRAMELEN 60 |
188 | #define AXE_RX_FRAMES 1 |
189 | #define AXE_TX_FRAMES 1 |
190 | |
191 | #define AXE_RX_LIST_CNT 1 |
192 | #define AXE_TX_LIST_CNT 1 |
193 | |
194 | #define AXE_CTL_READ 0x01 |
195 | #define AXE_CTL_WRITE 0x02 |
196 | |
197 | #define AXE_CONFIG_NO 1 |
198 | #define AXE_IFACE_IDX 0 |
199 | |
200 | /* |
201 | * The interrupt endpoint is currently unused |
202 | * by the ASIX part. |
203 | */ |
204 | #define AXE_ENDPT_RX 0x0 |
205 | #define AXE_ENDPT_TX 0x1 |
206 | #define AXE_ENDPT_INTR 0x2 |
207 | #define AXE_ENDPT_MAX 0x3 |
208 | |
209 | struct axe_type { |
210 | struct usb_devno axe_dev; |
211 | uint16_t axe_flags; |
212 | #define AX178 0x0001 /* AX88178 */ |
213 | #define AX772 0x0002 /* AX88772 */ |
214 | #define AX772B 0x0004 /* AX88772B */ |
215 | #define AXE_ANY_PHY 0x1000 /* Chip lies about valid phys */ |
216 | #define AXE_MII 0x2000 /* Chip-specific MII handling */ |
217 | }; |
218 | |
219 | struct axe_softc; |
220 | |
221 | struct axe_chain { |
222 | struct axe_softc *axe_sc; |
223 | struct usbd_xfer *axe_xfer; |
224 | uint8_t *axe_buf; |
225 | int axe_accum; |
226 | int axe_idx; |
227 | }; |
228 | |
229 | struct axe_cdata { |
230 | struct axe_chain axe_tx_chain[AXE_TX_LIST_CNT]; |
231 | struct axe_chain axe_rx_chain[AXE_RX_LIST_CNT]; |
232 | int axe_tx_prod; |
233 | int axe_tx_cons; |
234 | int axe_tx_cnt; |
235 | int axe_rx_prod; |
236 | }; |
237 | |
238 | struct axe_sframe_hdr { |
239 | uint16_t len; |
240 | uint16_t ilen; |
241 | } __packed; |
242 | |
243 | struct axe_softc { |
244 | device_t axe_dev; |
245 | struct ethercom axe_ec; |
246 | struct mii_data axe_mii; |
247 | krndsource_t rnd_source; |
248 | struct usbd_device * axe_udev; |
249 | struct usbd_interface * axe_iface; |
250 | |
251 | uint16_t axe_vendor; |
252 | uint16_t axe_product; |
253 | uint16_t axe_flags; |
254 | |
255 | int axe_ed[AXE_ENDPT_MAX]; |
256 | struct usbd_pipe * axe_ep[AXE_ENDPT_MAX]; |
257 | int axe_if_flags; |
258 | struct axe_cdata axe_cdata; |
259 | struct callout axe_stat_ch; |
260 | |
261 | int axe_refcnt; |
262 | bool axe_dying; |
263 | bool axe_attached; |
264 | |
265 | struct usb_task axe_tick_task; |
266 | |
267 | kmutex_t axe_mii_lock; |
268 | |
269 | int axe_link; |
270 | |
271 | uint8_t axe_ipgs[3]; |
272 | uint8_t axe_phyaddrs[2]; |
273 | int axe_phyno; |
274 | struct timeval axe_rx_notice; |
275 | int axe_bufsz; |
276 | |
277 | #define sc_if axe_ec.ec_if |
278 | }; |
279 | |
280 | #define ETHER_ALIGN 2 |
281 | |