1 | /* $NetBSD: nouveau_subdev_instmem_nv04.c,v 1.2 2014/08/23 08:03:34 riastradh Exp $ */ |
2 | |
3 | /* |
4 | * Copyright 2012 Red Hat Inc. |
5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), |
8 | * to deal in the Software without restriction, including without limitation |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
10 | * and/or sell copies of the Software, and to permit persons to whom the |
11 | * Software is furnished to do so, subject to the following conditions: |
12 | * |
13 | * The above copyright notice and this permission notice shall be included in |
14 | * all copies or substantial portions of the Software. |
15 | * |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
22 | * OTHER DEALINGS IN THE SOFTWARE. |
23 | * |
24 | * Authors: Ben Skeggs |
25 | */ |
26 | |
27 | #include <sys/cdefs.h> |
28 | __KERNEL_RCSID(0, "$NetBSD: nouveau_subdev_instmem_nv04.c,v 1.2 2014/08/23 08:03:34 riastradh Exp $" ); |
29 | |
30 | #include "nv04.h" |
31 | |
32 | /****************************************************************************** |
33 | * instmem object implementation |
34 | *****************************************************************************/ |
35 | |
36 | static u32 |
37 | nv04_instobj_rd32(struct nouveau_object *object, u64 addr) |
38 | { |
39 | struct nv04_instobj_priv *node = (void *)object; |
40 | return nv_ro32(object->engine, node->mem->offset + addr); |
41 | } |
42 | |
43 | static void |
44 | nv04_instobj_wr32(struct nouveau_object *object, u64 addr, u32 data) |
45 | { |
46 | struct nv04_instobj_priv *node = (void *)object; |
47 | nv_wo32(object->engine, node->mem->offset + addr, data); |
48 | } |
49 | |
50 | static void |
51 | nv04_instobj_dtor(struct nouveau_object *object) |
52 | { |
53 | struct nv04_instmem_priv *priv = (void *)object->engine; |
54 | struct nv04_instobj_priv *node = (void *)object; |
55 | nouveau_mm_free(&priv->heap, &node->mem); |
56 | nouveau_instobj_destroy(&node->base); |
57 | } |
58 | |
59 | static int |
60 | nv04_instobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine, |
61 | struct nouveau_oclass *oclass, void *data, u32 size, |
62 | struct nouveau_object **pobject) |
63 | { |
64 | struct nv04_instmem_priv *priv = (void *)engine; |
65 | struct nv04_instobj_priv *node; |
66 | struct nouveau_instobj_args *args = data; |
67 | int ret; |
68 | |
69 | if (!args->align) |
70 | args->align = 1; |
71 | |
72 | ret = nouveau_instobj_create(parent, engine, oclass, &node); |
73 | *pobject = nv_object(node); |
74 | if (ret) |
75 | return ret; |
76 | |
77 | ret = nouveau_mm_head(&priv->heap, 1, args->size, args->size, |
78 | args->align, &node->mem); |
79 | if (ret) |
80 | return ret; |
81 | |
82 | node->base.addr = node->mem->offset; |
83 | node->base.size = node->mem->length; |
84 | return 0; |
85 | } |
86 | |
87 | struct nouveau_instobj_impl |
88 | nv04_instobj_oclass = { |
89 | .base.ofuncs = &(struct nouveau_ofuncs) { |
90 | .ctor = nv04_instobj_ctor, |
91 | .dtor = nv04_instobj_dtor, |
92 | .init = _nouveau_instobj_init, |
93 | .fini = _nouveau_instobj_fini, |
94 | .rd32 = nv04_instobj_rd32, |
95 | .wr32 = nv04_instobj_wr32, |
96 | }, |
97 | }; |
98 | |
99 | /****************************************************************************** |
100 | * instmem subdev implementation |
101 | *****************************************************************************/ |
102 | |
103 | static u32 |
104 | nv04_instmem_rd32(struct nouveau_object *object, u64 addr) |
105 | { |
106 | return nv_rd32(object, 0x700000 + addr); |
107 | } |
108 | |
109 | static void |
110 | nv04_instmem_wr32(struct nouveau_object *object, u64 addr, u32 data) |
111 | { |
112 | return nv_wr32(object, 0x700000 + addr, data); |
113 | } |
114 | |
115 | void |
116 | nv04_instmem_dtor(struct nouveau_object *object) |
117 | { |
118 | struct nv04_instmem_priv *priv = (void *)object; |
119 | nouveau_gpuobj_ref(NULL, &priv->ramfc); |
120 | nouveau_gpuobj_ref(NULL, &priv->ramro); |
121 | nouveau_ramht_ref(NULL, &priv->ramht); |
122 | nouveau_gpuobj_ref(NULL, &priv->vbios); |
123 | nouveau_mm_fini(&priv->heap); |
124 | #ifdef __NetBSD__ |
125 | if (priv->iomemsz) |
126 | bus_space_unmap(priv->iomemt, priv->iomemh, priv->iomemsz); |
127 | #else |
128 | if (priv->iomem) |
129 | iounmap(priv->iomem); |
130 | #endif |
131 | nouveau_instmem_destroy(&priv->base); |
132 | } |
133 | |
134 | static int |
135 | nv04_instmem_ctor(struct nouveau_object *parent, struct nouveau_object *engine, |
136 | struct nouveau_oclass *oclass, void *data, u32 size, |
137 | struct nouveau_object **pobject) |
138 | { |
139 | struct nv04_instmem_priv *priv; |
140 | int ret; |
141 | |
142 | ret = nouveau_instmem_create(parent, engine, oclass, &priv); |
143 | *pobject = nv_object(priv); |
144 | if (ret) |
145 | return ret; |
146 | |
147 | /* PRAMIN aperture maps over the end of VRAM, reserve it */ |
148 | priv->base.reserved = 512 * 1024; |
149 | |
150 | ret = nouveau_mm_init(&priv->heap, 0, priv->base.reserved, 1); |
151 | if (ret) |
152 | return ret; |
153 | |
154 | /* 0x00000-0x10000: reserve for probable vbios image */ |
155 | ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x10000, 0, 0, |
156 | &priv->vbios); |
157 | if (ret) |
158 | return ret; |
159 | |
160 | /* 0x10000-0x18000: reserve for RAMHT */ |
161 | ret = nouveau_ramht_new(nv_object(priv), NULL, 0x08000, 0, &priv->ramht); |
162 | if (ret) |
163 | return ret; |
164 | |
165 | /* 0x18000-0x18800: reserve for RAMFC (enough for 32 nv30 channels) */ |
166 | ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x00800, 0, |
167 | NVOBJ_FLAG_ZERO_ALLOC, &priv->ramfc); |
168 | if (ret) |
169 | return ret; |
170 | |
171 | /* 0x18800-0x18a00: reserve for RAMRO */ |
172 | ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x00200, 0, 0, |
173 | &priv->ramro); |
174 | if (ret) |
175 | return ret; |
176 | |
177 | return 0; |
178 | } |
179 | |
180 | struct nouveau_oclass * |
181 | nv04_instmem_oclass = &(struct nouveau_instmem_impl) { |
182 | .base.handle = NV_SUBDEV(INSTMEM, 0x04), |
183 | .base.ofuncs = &(struct nouveau_ofuncs) { |
184 | .ctor = nv04_instmem_ctor, |
185 | .dtor = nv04_instmem_dtor, |
186 | .init = _nouveau_instmem_init, |
187 | .fini = _nouveau_instmem_fini, |
188 | .rd32 = nv04_instmem_rd32, |
189 | .wr32 = nv04_instmem_wr32, |
190 | }, |
191 | .instobj = &nv04_instobj_oclass.base, |
192 | }.base; |
193 | |