1 | /* $NetBSD: udl.h,v 1.4 2016/10/18 20:17:37 nat Exp $ */ |
2 | |
3 | /*- |
4 | * Copyright (c) 2009 FUKAUMI Naoki. |
5 | * All rights reserved. |
6 | * |
7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions |
9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * 2. Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
15 | * |
16 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | */ |
27 | |
28 | /* |
29 | * Copyright (c) 2009 Marcus Glocker <mglocker@openbsd.org> |
30 | * |
31 | * Permission to use, copy, modify, and distribute this software for any |
32 | * purpose with or without fee is hereby granted, provided that the above |
33 | * copyright notice and this permission notice appear in all copies. |
34 | * |
35 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
36 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
37 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
38 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
39 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
40 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
41 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
42 | */ |
43 | |
44 | #ifdef UDL_EVENT_COUNTERS |
45 | #define UDL_EVCNT_INCR(ev) (ev)->ev_count++ |
46 | #else |
47 | #define UDL_EVCNT_INCR(ev) do {} while (/* CONSTCOND */ 0) |
48 | #endif |
49 | |
50 | /* |
51 | * Bulk command xfer structure. |
52 | */ |
53 | #define UDL_CMD_BUFFER_SIZE (64 * 1024) |
54 | #define 6 |
55 | #define UDL_CMD_WIDTH_MAX 256 |
56 | #define UDL_CMD_DRAW_SIZE(width) \ |
57 | (UDL_CMD_HEADER_SIZE + (width) * 2) |
58 | #define UDL_CMD_FILL_SIZE (UDL_CMD_HEADER_SIZE + 3) |
59 | #define UDL_CMD_COPY_SIZE (UDL_CMD_HEADER_SIZE + 3) |
60 | #define UDL_CMD_COMP_WORD_SIZE 4 |
61 | #define UDL_CMD_COMP_MIN_SIZE (UDL_CMD_HEADER_SIZE + UDL_CMD_COMP_WORD_SIZE) |
62 | #define UDL_CMD_COMP_BLOCK_SIZE 512 |
63 | #define UDL_CMD_COMP_THRESHOLD \ |
64 | (UDL_CMD_BUFFER_SIZE - (UDL_CMD_COMP_BLOCK_SIZE * 2)) |
65 | |
66 | #define UDL_NCMDQ 32 |
67 | |
68 | struct udl_cmdq { |
69 | TAILQ_ENTRY(udl_cmdq) cq_chain; |
70 | struct udl_softc *cq_sc; |
71 | struct usbd_xfer *cq_xfer; |
72 | uint8_t *cq_buf; |
73 | }; |
74 | |
75 | /* |
76 | * Our per device structure. |
77 | */ |
78 | struct udl_softc { |
79 | device_t sc_dev; |
80 | struct usbd_device * sc_udev; |
81 | struct usbd_interface * sc_iface; |
82 | struct usbd_pipe * sc_tx_pipeh; |
83 | |
84 | struct udl_cmdq sc_cmdq[UDL_NCMDQ]; |
85 | TAILQ_HEAD(udl_cmdq_head, udl_cmdq) sc_freecmd, |
86 | sc_xfercmd; |
87 | |
88 | struct udl_cmdq *sc_cmd_cur; |
89 | uint8_t *sc_cmd_buf; |
90 | #define UDL_CMD_BUFINIT(sc) ((sc)->sc_cmd_buf = (sc)->sc_cmd_cur->cq_buf) |
91 | #define UDL_CMD_BUFSIZE(sc) ((sc)->sc_cmd_buf - (sc)->sc_cmd_cur->cq_buf) |
92 | int sc_cmd_cblen; |
93 | |
94 | struct edid_info sc_ei; |
95 | int sc_width; |
96 | int sc_height; |
97 | int sc_offscreen; |
98 | uint8_t sc_depth; |
99 | |
100 | /* wsdisplay glue */ |
101 | struct wsscreen_descr sc_defaultscreen; |
102 | const struct wsscreen_descr *sc_screens[1]; |
103 | struct wsscreen_list sc_screenlist; |
104 | struct rasops_info sc_ri; |
105 | device_t sc_wsdisplay; |
106 | u_int sc_mode; |
107 | u_int sc_blank; |
108 | uint8_t sc_nscreens; |
109 | |
110 | uint8_t *sc_fbmem; /* framebuffer for X11 */ |
111 | uint8_t *sc_fbmem_prev; /* prev. framebuffer */ |
112 | #define UDL_FBMEM_SIZE(sc) \ |
113 | ((sc)->sc_width * (sc)->sc_height * ((sc)->sc_depth / 8)) |
114 | |
115 | uint8_t *sc_huffman; |
116 | uint8_t *sc_huffman_base; |
117 | size_t sc_huffman_size; |
118 | |
119 | kcondvar_t sc_thread_cv; |
120 | kmutex_t sc_thread_mtx; |
121 | bool sc_dying; |
122 | bool sc_thread_stop; |
123 | lwp_t *sc_thread; |
124 | |
125 | kcondvar_t sc_cv; |
126 | kmutex_t sc_mtx; |
127 | |
128 | #define UDL_DECOMPRDY (1 << 0) |
129 | #define UDL_COMPRDY (1 << 1) |
130 | uint32_t sc_flags; |
131 | #ifdef UDL_EVENT_COUNTERS |
132 | struct evcnt sc_ev_cmdq_get; |
133 | struct evcnt sc_ev_cmdq_put; |
134 | struct evcnt sc_ev_cmdq_wait; |
135 | struct evcnt sc_ev_cmdq_timeout; |
136 | #endif |
137 | }; |
138 | |
139 | /* |
140 | * Chip commands. |
141 | */ |
142 | #define UDL_CTRL_CMD_READ_EDID 0x02 |
143 | #define UDL_CTRL_CMD_WRITE_1 0x03 |
144 | #define UDL_CTRL_CMD_READ_1 0x04 |
145 | #define UDL_CTRL_CMD_READ_STATUS 0x06 |
146 | #define UDL_CTRL_CMD_SET_KEY 0x12 |
147 | |
148 | #define UDL_BULK_SOC 0xaf /* start of command token */ |
149 | |
150 | #define UDL_BULK_CMD_REG_WRITE_1 0x20 /* write 1 byte to register */ |
151 | #define UDL_BULK_CMD_EOC 0xa0 /* end of command stack */ |
152 | #define UDL_BULK_CMD_DECOMP 0xe0 /* send decompression table */ |
153 | |
154 | #define UDL_BULK_CMD_FB_BASE8 0x60 |
155 | #define UDL_BULK_CMD_FB_WRITE8 (UDL_BULK_CMD_FB_BASE8 | 0x00) |
156 | #define UDL_BULK_CMD_FB_RLE8 (UDL_BULK_CMD_FB_BASE8 | 0x01) |
157 | #define UDL_BULK_CMD_FB_COPY8 (UDL_BULK_CMD_FB_BASE8 | 0x02) |
158 | #define UDL_BULK_CMD_FB_BASE16 0x68 |
159 | #define UDL_BULK_CMD_FB_WRITE16 (UDL_BULK_CMD_FB_BASE16 | 0x00) |
160 | #define UDL_BULK_CMD_FB_RLE16 (UDL_BULK_CMD_FB_BASE16 | 0x01) |
161 | #define UDL_BULK_CMD_FB_COPY16 (UDL_BULK_CMD_FB_BASE16 | 0x02) |
162 | #define UDL_BULK_CMD_FB_COMP 0x10 |
163 | |
164 | /* |
165 | * Chip registers. |
166 | */ |
167 | #define UDL_REG_COLORDEPTH 0x00 |
168 | #define UDL_REG_COLORDEPTH_16 0x00 |
169 | #define UDL_REG_COLORDEPTH_24 0x01 |
170 | #define UDL_REG_XDISPLAYSTART 0x01 |
171 | #define UDL_REG_XDISPLAYEND 0x03 |
172 | #define UDL_REG_YDISPLAYSTART 0x05 |
173 | #define UDL_REG_YDISPLAYEND 0x07 |
174 | #define UDL_REG_XENDCOUNT 0x09 |
175 | #define UDL_REG_HSYNCSTART 0x0b |
176 | #define UDL_REG_HSYNCEND 0x0d |
177 | #define UDL_REG_HPIXELS 0x0f |
178 | #define UDL_REG_YENDCOUNT 0x11 |
179 | #define UDL_REG_VSYNCSTART 0x13 |
180 | #define UDL_REG_VSYNCEND 0x15 |
181 | #define UDL_REG_VPIXELS 0x17 |
182 | #define UDL_REG_PIXELCLOCK5KHZ 0x1b |
183 | #define UDL_REG_BLANK 0x1f |
184 | #define UDL_REG_BLANK_OFF 0x00 |
185 | #define UDL_REG_BLANK_ON 0x01 |
186 | #define UDL_REG_ADDR_START16 0x20 |
187 | #define UDL_REG_ADDR_STRIDE16 0x23 |
188 | #define UDL_REG_ADDR_START8 0x26 |
189 | #define UDL_REG_ADDR_STRIDE8 0x29 |
190 | #define UDL_REG_SYNC 0xff |
191 | |
192 | /* |
193 | * Compression. |
194 | */ |
195 | struct udl_huffman { |
196 | uint8_t bit_count; |
197 | uint8_t pad[3]; |
198 | uint32_t bit_pattern; |
199 | }; |
200 | #define UDL_HUFFMAN_RECORD_SIZE sizeof(struct udl_huffman) |
201 | #define UDL_HUFFMAN_RECORDS (65536 + 1) |
202 | #define UDL_HUFFMAN_BASE (((UDL_HUFFMAN_RECORDS - 1) / 2) * \ |
203 | UDL_HUFFMAN_RECORD_SIZE) |
204 | |