1 | /* $NetBSD: nouveau_engine_disp_sornvd0.c,v 1.1.1.1 2014/08/06 12:36:24 riastradh Exp $ */ |
2 | |
3 | /* |
4 | * Copyright 2012 Red Hat Inc. |
5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), |
8 | * to deal in the Software without restriction, including without limitation |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
10 | * and/or sell copies of the Software, and to permit persons to whom the |
11 | * Software is furnished to do so, subject to the following conditions: |
12 | * |
13 | * The above copyright notice and this permission notice shall be included in |
14 | * all copies or substantial portions of the Software. |
15 | * |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
22 | * OTHER DEALINGS IN THE SOFTWARE. |
23 | * |
24 | * Authors: Ben Skeggs |
25 | */ |
26 | |
27 | #include <sys/cdefs.h> |
28 | __KERNEL_RCSID(0, "$NetBSD: nouveau_engine_disp_sornvd0.c,v 1.1.1.1 2014/08/06 12:36:24 riastradh Exp $" ); |
29 | |
30 | #include <core/os.h> |
31 | #include <core/class.h> |
32 | |
33 | #include <subdev/bios.h> |
34 | #include <subdev/bios/dcb.h> |
35 | #include <subdev/bios/dp.h> |
36 | #include <subdev/bios/init.h> |
37 | |
38 | #include "nv50.h" |
39 | |
40 | static inline u32 |
41 | nvd0_sor_soff(struct dcb_output *outp) |
42 | { |
43 | return (ffs(outp->or) - 1) * 0x800; |
44 | } |
45 | |
46 | static inline u32 |
47 | nvd0_sor_loff(struct dcb_output *outp) |
48 | { |
49 | return nvd0_sor_soff(outp) + !(outp->sorconf.link & 1) * 0x80; |
50 | } |
51 | |
52 | static inline u32 |
53 | nvd0_sor_dp_lane_map(struct nv50_disp_priv *priv, u8 lane) |
54 | { |
55 | static const u8 nvd0[] = { 16, 8, 0, 24 }; |
56 | return nvd0[lane]; |
57 | } |
58 | |
59 | static int |
60 | nvd0_sor_dp_pattern(struct nouveau_disp *disp, struct dcb_output *outp, |
61 | int head, int pattern) |
62 | { |
63 | struct nv50_disp_priv *priv = (void *)disp; |
64 | const u32 loff = nvd0_sor_loff(outp); |
65 | nv_mask(priv, 0x61c110 + loff, 0x0f0f0f0f, 0x01010101 * pattern); |
66 | return 0; |
67 | } |
68 | |
69 | static int |
70 | nvd0_sor_dp_lnk_ctl(struct nouveau_disp *disp, struct dcb_output *outp, |
71 | int head, int link_nr, int link_bw, bool enh_frame) |
72 | { |
73 | struct nv50_disp_priv *priv = (void *)disp; |
74 | const u32 soff = nvd0_sor_soff(outp); |
75 | const u32 loff = nvd0_sor_loff(outp); |
76 | u32 dpctrl = 0x00000000; |
77 | u32 clksor = 0x00000000; |
78 | u32 lane = 0; |
79 | int i; |
80 | |
81 | clksor |= link_bw << 18; |
82 | dpctrl |= ((1 << link_nr) - 1) << 16; |
83 | if (enh_frame) |
84 | dpctrl |= 0x00004000; |
85 | |
86 | for (i = 0; i < link_nr; i++) |
87 | lane |= 1 << (nvd0_sor_dp_lane_map(priv, i) >> 3); |
88 | |
89 | nv_mask(priv, 0x612300 + soff, 0x007c0000, clksor); |
90 | nv_mask(priv, 0x61c10c + loff, 0x001f4000, dpctrl); |
91 | nv_mask(priv, 0x61c130 + loff, 0x0000000f, lane); |
92 | return 0; |
93 | } |
94 | |
95 | static int |
96 | nvd0_sor_dp_drv_ctl(struct nouveau_disp *disp, struct dcb_output *outp, |
97 | int head, int lane, int swing, int preem) |
98 | { |
99 | struct nouveau_bios *bios = nouveau_bios(disp); |
100 | struct nv50_disp_priv *priv = (void *)disp; |
101 | const u32 shift = nvd0_sor_dp_lane_map(priv, lane); |
102 | const u32 loff = nvd0_sor_loff(outp); |
103 | u32 addr, data[3]; |
104 | u8 ver, hdr, cnt, len; |
105 | struct nvbios_dpout info; |
106 | struct nvbios_dpcfg ocfg; |
107 | |
108 | addr = nvbios_dpout_match(bios, outp->hasht, outp->hashm, |
109 | &ver, &hdr, &cnt, &len, &info); |
110 | if (!addr) |
111 | return -ENODEV; |
112 | |
113 | addr = nvbios_dpcfg_match(bios, addr, 0, swing, preem, |
114 | &ver, &hdr, &cnt, &len, &ocfg); |
115 | if (!addr) |
116 | return -EINVAL; |
117 | |
118 | data[0] = nv_rd32(priv, 0x61c118 + loff) & ~(0x000000ff << shift); |
119 | data[1] = nv_rd32(priv, 0x61c120 + loff) & ~(0x000000ff << shift); |
120 | data[2] = nv_rd32(priv, 0x61c130 + loff) & ~(0x0000ff00); |
121 | nv_wr32(priv, 0x61c118 + loff, data[0] | (ocfg.drv << shift)); |
122 | nv_wr32(priv, 0x61c120 + loff, data[1] | (ocfg.pre << shift)); |
123 | nv_wr32(priv, 0x61c130 + loff, data[2] | (ocfg.unk << 8)); |
124 | nv_mask(priv, 0x61c13c + loff, 0x00000000, 0x00000000); |
125 | return 0; |
126 | } |
127 | |
128 | const struct nouveau_dp_func |
129 | nvd0_sor_dp_func = { |
130 | .pattern = nvd0_sor_dp_pattern, |
131 | .lnk_ctl = nvd0_sor_dp_lnk_ctl, |
132 | .drv_ctl = nvd0_sor_dp_drv_ctl, |
133 | }; |
134 | |