1 | /* $NetBSD: ichsmb.c,v 1.47 2016/10/13 20:05:06 jdolecek Exp $ */ |
2 | /* $OpenBSD: ichiic.c,v 1.18 2007/05/03 09:36:26 dlg Exp $ */ |
3 | |
4 | /* |
5 | * Copyright (c) 2005, 2006 Alexander Yurchenko <grange@openbsd.org> |
6 | * |
7 | * Permission to use, copy, modify, and distribute this software for any |
8 | * purpose with or without fee is hereby granted, provided that the above |
9 | * copyright notice and this permission notice appear in all copies. |
10 | * |
11 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
12 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
13 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
14 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
15 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
16 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
17 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
18 | */ |
19 | |
20 | /* |
21 | * Intel ICH SMBus controller driver. |
22 | */ |
23 | |
24 | #include <sys/cdefs.h> |
25 | __KERNEL_RCSID(0, "$NetBSD: ichsmb.c,v 1.47 2016/10/13 20:05:06 jdolecek Exp $" ); |
26 | |
27 | #include <sys/param.h> |
28 | #include <sys/device.h> |
29 | #include <sys/errno.h> |
30 | #include <sys/kernel.h> |
31 | #include <sys/mutex.h> |
32 | #include <sys/proc.h> |
33 | |
34 | #include <sys/bus.h> |
35 | |
36 | #include <dev/pci/pcidevs.h> |
37 | #include <dev/pci/pcireg.h> |
38 | #include <dev/pci/pcivar.h> |
39 | |
40 | #include <dev/ic/i82801lpcreg.h> |
41 | |
42 | #include <dev/i2c/i2cvar.h> |
43 | |
44 | #ifdef ICHIIC_DEBUG |
45 | #define DPRINTF(x) printf x |
46 | #else |
47 | #define DPRINTF(x) |
48 | #endif |
49 | |
50 | #define ICHIIC_DELAY 100 |
51 | #define ICHIIC_TIMEOUT 1 |
52 | |
53 | struct ichsmb_softc { |
54 | device_t sc_dev; |
55 | |
56 | bus_space_tag_t sc_iot; |
57 | bus_space_handle_t sc_ioh; |
58 | void * sc_ih; |
59 | int sc_poll; |
60 | |
61 | struct i2c_controller sc_i2c_tag; |
62 | kmutex_t sc_i2c_mutex; |
63 | struct { |
64 | i2c_op_t op; |
65 | void * buf; |
66 | size_t len; |
67 | int flags; |
68 | volatile int error; |
69 | } sc_i2c_xfer; |
70 | device_t sc_i2c_device; |
71 | }; |
72 | |
73 | static int ichsmb_match(device_t, cfdata_t, void *); |
74 | static void ichsmb_attach(device_t, device_t, void *); |
75 | static int ichsmb_rescan(device_t, const char *, const int *); |
76 | static void ichsmb_chdet(device_t, device_t); |
77 | |
78 | static int ichsmb_i2c_acquire_bus(void *, int); |
79 | static void ichsmb_i2c_release_bus(void *, int); |
80 | static int ichsmb_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, |
81 | size_t, void *, size_t, int); |
82 | |
83 | static int ichsmb_intr(void *); |
84 | |
85 | |
86 | CFATTACH_DECL3_NEW(ichsmb, sizeof(struct ichsmb_softc), |
87 | ichsmb_match, ichsmb_attach, NULL, NULL, ichsmb_rescan, ichsmb_chdet, 0); |
88 | |
89 | |
90 | static int |
91 | ichsmb_match(device_t parent, cfdata_t match, void *aux) |
92 | { |
93 | struct pci_attach_args *pa = aux; |
94 | |
95 | if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL) { |
96 | switch (PCI_PRODUCT(pa->pa_id)) { |
97 | case PCI_PRODUCT_INTEL_6300ESB_SMB: |
98 | case PCI_PRODUCT_INTEL_63XXESB_SMB: |
99 | case PCI_PRODUCT_INTEL_82801AA_SMB: |
100 | case PCI_PRODUCT_INTEL_82801AB_SMB: |
101 | case PCI_PRODUCT_INTEL_82801BA_SMB: |
102 | case PCI_PRODUCT_INTEL_82801CA_SMB: |
103 | case PCI_PRODUCT_INTEL_82801DB_SMB: |
104 | case PCI_PRODUCT_INTEL_82801E_SMB: |
105 | case PCI_PRODUCT_INTEL_82801EB_SMB: |
106 | case PCI_PRODUCT_INTEL_82801FB_SMB: |
107 | case PCI_PRODUCT_INTEL_82801G_SMB: |
108 | case PCI_PRODUCT_INTEL_82801H_SMB: |
109 | case PCI_PRODUCT_INTEL_82801I_SMB: |
110 | case PCI_PRODUCT_INTEL_82801JD_SMB: |
111 | case PCI_PRODUCT_INTEL_82801JI_SMB: |
112 | case PCI_PRODUCT_INTEL_3400_SMB: |
113 | case PCI_PRODUCT_INTEL_6SERIES_SMB: |
114 | case PCI_PRODUCT_INTEL_7SERIES_SMB: |
115 | case PCI_PRODUCT_INTEL_8SERIES_SMB: |
116 | case PCI_PRODUCT_INTEL_9SERIES_SMB: |
117 | case PCI_PRODUCT_INTEL_100SERIES_SMB: |
118 | case PCI_PRODUCT_INTEL_CORE4G_M_SMB: |
119 | case PCI_PRODUCT_INTEL_CORE5G_M_SMB: |
120 | case PCI_PRODUCT_INTEL_BAYTRAIL_PCU_SMB: |
121 | case PCI_PRODUCT_INTEL_BSW_PCU_SMB: |
122 | case PCI_PRODUCT_INTEL_C600_SMBUS: |
123 | case PCI_PRODUCT_INTEL_C600_SMB_0: |
124 | case PCI_PRODUCT_INTEL_C600_SMB_1: |
125 | case PCI_PRODUCT_INTEL_C600_SMB_2: |
126 | case PCI_PRODUCT_INTEL_C610_SMB: |
127 | case PCI_PRODUCT_INTEL_EP80579_SMB: |
128 | case PCI_PRODUCT_INTEL_DH89XXCC_SMB: |
129 | case PCI_PRODUCT_INTEL_DH89XXCL_SMB: |
130 | case PCI_PRODUCT_INTEL_C2000_PCU_SMBUS: |
131 | return 1; |
132 | } |
133 | } |
134 | return 0; |
135 | } |
136 | |
137 | static void |
138 | ichsmb_attach(device_t parent, device_t self, void *aux) |
139 | { |
140 | struct ichsmb_softc *sc = device_private(self); |
141 | struct pci_attach_args *pa = aux; |
142 | pcireg_t conf; |
143 | bus_size_t iosize; |
144 | pci_intr_handle_t ih; |
145 | const char *intrstr = NULL; |
146 | char intrbuf[PCI_INTRSTR_LEN]; |
147 | int flags; |
148 | |
149 | sc->sc_dev = self; |
150 | |
151 | pci_aprint_devinfo(pa, NULL); |
152 | |
153 | /* Read configuration */ |
154 | conf = pci_conf_read(pa->pa_pc, pa->pa_tag, LPCIB_SMB_HOSTC); |
155 | DPRINTF(("%s: conf 0x%08x\n" , device_xname(sc->sc_dev), conf)); |
156 | |
157 | if ((conf & LPCIB_SMB_HOSTC_HSTEN) == 0) { |
158 | aprint_error_dev(self, "SMBus disabled\n" ); |
159 | goto out; |
160 | } |
161 | |
162 | /* Map I/O space */ |
163 | if (pci_mapreg_map(pa, LPCIB_SMB_BASE, PCI_MAPREG_TYPE_IO, 0, |
164 | &sc->sc_iot, &sc->sc_ioh, NULL, &iosize)) { |
165 | aprint_error_dev(self, "can't map I/O space\n" ); |
166 | goto out; |
167 | } |
168 | |
169 | sc->sc_poll = 1; |
170 | if (conf & LPCIB_SMB_HOSTC_SMIEN) { |
171 | /* No PCI IRQ */ |
172 | aprint_normal_dev(self, "interrupting at SMI\n" ); |
173 | } else { |
174 | /* Install interrupt handler */ |
175 | if (pci_intr_map(pa, &ih) == 0) { |
176 | intrstr = pci_intr_string(pa->pa_pc, ih, intrbuf, |
177 | sizeof(intrbuf)); |
178 | sc->sc_ih = pci_intr_establish_xname(pa->pa_pc, ih, |
179 | IPL_BIO, ichsmb_intr, sc, device_xname(sc->sc_dev)); |
180 | if (sc->sc_ih != NULL) { |
181 | aprint_normal_dev(self, "interrupting at %s\n" , |
182 | intrstr); |
183 | sc->sc_poll = 0; |
184 | } |
185 | } |
186 | if (sc->sc_poll) |
187 | aprint_normal_dev(self, "polling\n" ); |
188 | } |
189 | |
190 | sc->sc_i2c_device = NULL; |
191 | flags = 0; |
192 | mutex_init(&sc->sc_i2c_mutex, MUTEX_DEFAULT, IPL_NONE); |
193 | ichsmb_rescan(self, "i2cbus" , &flags); |
194 | |
195 | out: if (!pmf_device_register(self, NULL, NULL)) |
196 | aprint_error_dev(self, "couldn't establish power handler\n" ); |
197 | } |
198 | |
199 | static int |
200 | ichsmb_rescan(device_t self, const char *ifattr, const int *flags) |
201 | { |
202 | struct ichsmb_softc *sc = device_private(self); |
203 | struct i2cbus_attach_args iba; |
204 | |
205 | if (!ifattr_match(ifattr, "i2cbus" )) |
206 | return 0; |
207 | |
208 | if (sc->sc_i2c_device) |
209 | return 0; |
210 | |
211 | /* Attach I2C bus */ |
212 | sc->sc_i2c_tag.ic_cookie = sc; |
213 | sc->sc_i2c_tag.ic_acquire_bus = ichsmb_i2c_acquire_bus; |
214 | sc->sc_i2c_tag.ic_release_bus = ichsmb_i2c_release_bus; |
215 | sc->sc_i2c_tag.ic_exec = ichsmb_i2c_exec; |
216 | |
217 | memset(&iba, 0, sizeof(iba)); |
218 | iba.iba_type = I2C_TYPE_SMBUS; |
219 | iba.iba_tag = &sc->sc_i2c_tag; |
220 | sc->sc_i2c_device = config_found_ia(self, ifattr, &iba, iicbus_print); |
221 | |
222 | return 0; |
223 | } |
224 | |
225 | static void |
226 | ichsmb_chdet(device_t self, device_t child) |
227 | { |
228 | struct ichsmb_softc *sc = device_private(self); |
229 | |
230 | if (sc->sc_i2c_device == child) |
231 | sc->sc_i2c_device = NULL; |
232 | |
233 | } |
234 | |
235 | static int |
236 | ichsmb_i2c_acquire_bus(void *cookie, int flags) |
237 | { |
238 | struct ichsmb_softc *sc = cookie; |
239 | |
240 | if (cold) |
241 | return 0; |
242 | |
243 | mutex_enter(&sc->sc_i2c_mutex); |
244 | return 0; |
245 | } |
246 | |
247 | static void |
248 | ichsmb_i2c_release_bus(void *cookie, int flags) |
249 | { |
250 | struct ichsmb_softc *sc = cookie; |
251 | |
252 | if (cold) |
253 | return; |
254 | |
255 | mutex_exit(&sc->sc_i2c_mutex); |
256 | } |
257 | |
258 | static int |
259 | ichsmb_i2c_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, |
260 | const void *cmdbuf, size_t cmdlen, void *buf, size_t len, int flags) |
261 | { |
262 | struct ichsmb_softc *sc = cookie; |
263 | const uint8_t *b; |
264 | uint8_t ctl = 0, st; |
265 | int retries; |
266 | char fbuf[64]; |
267 | |
268 | DPRINTF(("%s: exec: op %d, addr 0x%02x, cmdlen %zu, len %zu, " |
269 | "flags 0x%02x\n" , device_xname(sc->sc_dev), op, addr, cmdlen, |
270 | len, flags)); |
271 | |
272 | /* Clear status bits */ |
273 | bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, |
274 | LPCIB_SMB_HS_INTR | LPCIB_SMB_HS_DEVERR | |
275 | LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED); |
276 | bus_space_barrier(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, 1, |
277 | BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); |
278 | |
279 | /* Wait for bus to be idle */ |
280 | for (retries = 100; retries > 0; retries--) { |
281 | st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS); |
282 | if (!(st & LPCIB_SMB_HS_BUSY)) |
283 | break; |
284 | DELAY(ICHIIC_DELAY); |
285 | } |
286 | #ifdef ICHIIC_DEBUG |
287 | snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st); |
288 | printf("%s: exec: st 0x%s\n" , device_xname(sc->sc_dev), fbuf); |
289 | #endif |
290 | if (st & LPCIB_SMB_HS_BUSY) |
291 | return (1); |
292 | |
293 | if (cold || sc->sc_poll) |
294 | flags |= I2C_F_POLL; |
295 | |
296 | if (!I2C_OP_STOP_P(op) || cmdlen > 1 || len > 2 || |
297 | (cmdlen == 0 && len > 1)) |
298 | return (1); |
299 | |
300 | /* Setup transfer */ |
301 | sc->sc_i2c_xfer.op = op; |
302 | sc->sc_i2c_xfer.buf = buf; |
303 | sc->sc_i2c_xfer.len = len; |
304 | sc->sc_i2c_xfer.flags = flags; |
305 | sc->sc_i2c_xfer.error = 0; |
306 | |
307 | /* Set slave address and transfer direction */ |
308 | bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_TXSLVA, |
309 | LPCIB_SMB_TXSLVA_ADDR(addr) | |
310 | (I2C_OP_READ_P(op) ? LPCIB_SMB_TXSLVA_READ : 0)); |
311 | |
312 | b = (const uint8_t *)cmdbuf; |
313 | if (cmdlen > 0) |
314 | /* Set command byte */ |
315 | bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HCMD, b[0]); |
316 | |
317 | if (I2C_OP_WRITE_P(op)) { |
318 | /* Write data */ |
319 | b = buf; |
320 | if (cmdlen == 0 && len == 1) |
321 | bus_space_write_1(sc->sc_iot, sc->sc_ioh, |
322 | LPCIB_SMB_HCMD, b[0]); |
323 | else if (len > 0) |
324 | bus_space_write_1(sc->sc_iot, sc->sc_ioh, |
325 | LPCIB_SMB_HD0, b[0]); |
326 | if (len > 1) |
327 | bus_space_write_1(sc->sc_iot, sc->sc_ioh, |
328 | LPCIB_SMB_HD1, b[1]); |
329 | } |
330 | |
331 | /* Set SMBus command */ |
332 | if (cmdlen == 0) { |
333 | if (len == 0) |
334 | ctl = LPCIB_SMB_HC_CMD_QUICK; |
335 | else |
336 | ctl = LPCIB_SMB_HC_CMD_BYTE; |
337 | } else if (len == 1) |
338 | ctl = LPCIB_SMB_HC_CMD_BDATA; |
339 | else if (len == 2) |
340 | ctl = LPCIB_SMB_HC_CMD_WDATA; |
341 | |
342 | if ((flags & I2C_F_POLL) == 0) |
343 | ctl |= LPCIB_SMB_HC_INTREN; |
344 | |
345 | /* Start transaction */ |
346 | ctl |= LPCIB_SMB_HC_START; |
347 | bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HC, ctl); |
348 | |
349 | if (flags & I2C_F_POLL) { |
350 | /* Poll for completion */ |
351 | DELAY(ICHIIC_DELAY); |
352 | for (retries = 1000; retries > 0; retries--) { |
353 | st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, |
354 | LPCIB_SMB_HS); |
355 | if ((st & LPCIB_SMB_HS_BUSY) == 0) |
356 | break; |
357 | DELAY(ICHIIC_DELAY); |
358 | } |
359 | if (st & LPCIB_SMB_HS_BUSY) |
360 | goto timeout; |
361 | ichsmb_intr(sc); |
362 | } else { |
363 | /* Wait for interrupt */ |
364 | if (tsleep(sc, PRIBIO, "iicexec" , ICHIIC_TIMEOUT * hz)) |
365 | goto timeout; |
366 | } |
367 | |
368 | if (sc->sc_i2c_xfer.error) |
369 | return (1); |
370 | |
371 | return (0); |
372 | |
373 | timeout: |
374 | /* |
375 | * Transfer timeout. Kill the transaction and clear status bits. |
376 | */ |
377 | snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st); |
378 | aprint_error_dev(sc->sc_dev, |
379 | "exec: op %d, addr 0x%02x, cmdlen %zd, len %zd, " |
380 | "flags 0x%02x: timeout, status 0x%s\n" , |
381 | op, addr, cmdlen, len, flags, fbuf); |
382 | bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HC, |
383 | LPCIB_SMB_HC_KILL); |
384 | DELAY(ICHIIC_DELAY); |
385 | st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS); |
386 | if ((st & LPCIB_SMB_HS_FAILED) == 0) { |
387 | snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st); |
388 | aprint_error_dev(sc->sc_dev, "abort failed, status 0x%s\n" , |
389 | fbuf); |
390 | } |
391 | bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, st); |
392 | return (1); |
393 | } |
394 | |
395 | static int |
396 | ichsmb_intr(void *arg) |
397 | { |
398 | struct ichsmb_softc *sc = arg; |
399 | uint8_t st; |
400 | uint8_t *b; |
401 | size_t len; |
402 | #ifdef ICHIIC_DEBUG |
403 | char fbuf[64]; |
404 | #endif |
405 | |
406 | /* Read status */ |
407 | st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS); |
408 | if ((st & LPCIB_SMB_HS_BUSY) != 0 || (st & (LPCIB_SMB_HS_INTR | |
409 | LPCIB_SMB_HS_DEVERR | LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED | |
410 | LPCIB_SMB_HS_SMBAL | LPCIB_SMB_HS_BDONE)) == 0) |
411 | /* Interrupt was not for us */ |
412 | return (0); |
413 | |
414 | #ifdef ICHIIC_DEBUG |
415 | snprintb(fbuf, sizeof(fbuf), LPCIB_SMB_HS_BITS, st); |
416 | printf("%s: intr st 0x%s\n" , device_xname(sc->sc_dev), fbuf); |
417 | #endif |
418 | |
419 | /* Clear status bits */ |
420 | bus_space_write_1(sc->sc_iot, sc->sc_ioh, LPCIB_SMB_HS, st); |
421 | |
422 | /* Check for errors */ |
423 | if (st & (LPCIB_SMB_HS_DEVERR | LPCIB_SMB_HS_BUSERR | LPCIB_SMB_HS_FAILED)) { |
424 | sc->sc_i2c_xfer.error = 1; |
425 | goto done; |
426 | } |
427 | |
428 | if (st & LPCIB_SMB_HS_INTR) { |
429 | if (I2C_OP_WRITE_P(sc->sc_i2c_xfer.op)) |
430 | goto done; |
431 | |
432 | /* Read data */ |
433 | b = sc->sc_i2c_xfer.buf; |
434 | len = sc->sc_i2c_xfer.len; |
435 | if (len > 0) |
436 | b[0] = bus_space_read_1(sc->sc_iot, sc->sc_ioh, |
437 | LPCIB_SMB_HD0); |
438 | if (len > 1) |
439 | b[1] = bus_space_read_1(sc->sc_iot, sc->sc_ioh, |
440 | LPCIB_SMB_HD1); |
441 | } |
442 | |
443 | done: |
444 | if ((sc->sc_i2c_xfer.flags & I2C_F_POLL) == 0) |
445 | wakeup(sc); |
446 | return (1); |
447 | } |
448 | |