1/* $NetBSD: ehcivar.h,v 1.43 2016/04/23 10:15:31 skrll Exp $ */
2
3/*
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Lennart Augustsson (lennart@augustsson.net).
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#ifndef _EHCIVAR_H_
33#define _EHCIVAR_H_
34
35#include <sys/pool.h>
36
37typedef struct ehci_soft_qtd {
38 ehci_qtd_t qtd;
39 struct ehci_soft_qtd *nextqtd; /* mirrors nextqtd in TD */
40 ehci_physaddr_t physaddr; /* qTD's physical address */
41 usb_dma_t dma; /* qTD's DMA infos */
42 int offs; /* qTD's offset in usb_dma_t */
43 struct usbd_xfer *xfer; /* xfer back pointer */
44 uint16_t len;
45} ehci_soft_qtd_t;
46#define EHCI_SQTD_ALIGN MAX(EHCI_QTD_ALIGN, CACHE_LINE_SIZE)
47#define EHCI_SQTD_SIZE ((sizeof(struct ehci_soft_qtd) + EHCI_SQTD_ALIGN - 1) & -EHCI_SQTD_ALIGN)
48#define EHCI_SQTD_CHUNK (EHCI_PAGE_SIZE / EHCI_SQTD_SIZE)
49
50typedef struct ehci_soft_qh {
51 ehci_qh_t qh;
52 struct ehci_soft_qh *next;
53 struct ehci_soft_qtd *sqtd;
54 ehci_physaddr_t physaddr;
55 usb_dma_t dma; /* QH's DMA infos */
56 int offs; /* QH's offset in usb_dma_t */
57 int islot;
58} ehci_soft_qh_t;
59#define EHCI_SQH_SIZE ((sizeof(struct ehci_soft_qh) + EHCI_QH_ALIGN - 1) / EHCI_QH_ALIGN * EHCI_QH_ALIGN)
60#define EHCI_SQH_CHUNK (EHCI_PAGE_SIZE / EHCI_SQH_SIZE)
61
62typedef struct ehci_soft_itd {
63 union {
64 ehci_itd_t itd;
65 ehci_sitd_t sitd;
66 };
67 union {
68 struct {
69 /* soft_itds links in a periodic frame */
70 struct ehci_soft_itd *next;
71 struct ehci_soft_itd *prev;
72 } frame_list;
73 /* circular list of free itds */
74 LIST_ENTRY(ehci_soft_itd) free_list;
75 };
76 struct ehci_soft_itd *xfer_next; /* Next soft_itd in xfer */
77 ehci_physaddr_t physaddr;
78 usb_dma_t dma;
79 int offs;
80 int slot;
81 struct timeval t; /* store free time */
82} ehci_soft_itd_t;
83#define EHCI_ITD_SIZE ((sizeof(struct ehci_soft_itd) + EHCI_QH_ALIGN - 1) / EHCI_ITD_ALIGN * EHCI_ITD_ALIGN)
84#define EHCI_ITD_CHUNK (EHCI_PAGE_SIZE / EHCI_ITD_SIZE)
85
86#define ehci_soft_sitd_t ehci_soft_itd_t
87#define ehci_soft_sitd ehci_soft_itd
88#define sc_softsitds sc_softitds
89#define EHCI_SITD_SIZE ((sizeof(struct ehci_soft_sitd) + EHCI_QH_ALIGN - 1) / EHCI_SITD_ALIGN * EHCI_SITD_ALIGN)
90#define EHCI_SITD_CHUNK (EHCI_PAGE_SIZE / EHCI_SITD_SIZE)
91
92struct ehci_xfer {
93 struct usbd_xfer ex_xfer;
94 struct usb_task ex_aborttask;
95 TAILQ_ENTRY(ehci_xfer) ex_next; /* list of active xfers */
96 enum {
97 EX_NONE,
98 EX_CTRL,
99 EX_BULK,
100 EX_INTR,
101 EX_ISOC,
102 EX_FS_ISOC
103 } ex_type;
104 /* ctrl/bulk/intr */
105 struct {
106 ehci_soft_qtd_t **ex_sqtds;
107 size_t ex_nsqtd;
108 };
109 union {
110 /* ctrl */
111 struct {
112 ehci_soft_qtd_t *ex_setup;
113 ehci_soft_qtd_t *ex_data;
114 ehci_soft_qtd_t *ex_status;
115 };
116 /* bulk/intr */
117 struct {
118 ehci_soft_qtd_t *ex_sqtdstart;
119 ehci_soft_qtd_t *ex_sqtdend;
120 };
121 /* isoc */
122 struct {
123 ehci_soft_itd_t *ex_itdstart;
124 ehci_soft_itd_t *ex_itdend;
125 };
126 /* split (aka fs) isoc */
127 struct {
128 ehci_soft_sitd_t *ex_sitdstart;
129 ehci_soft_sitd_t *ex_sitdend;
130 };
131 };
132 bool ex_isdone; /* used only when DIAGNOSTIC is defined */
133};
134
135#define EHCI_BUS2SC(bus) ((bus)->ub_hcpriv)
136#define EHCI_PIPE2SC(pipe) EHCI_BUS2SC((pipe)->up_dev->ud_bus)
137#define EHCI_XFER2SC(xfer) EHCI_BUS2SC((xfer)->ux_bus)
138#define EHCI_EPIPE2SC(epipe) EHCI_BUS2SC((epipe)->pipe.up_dev->ud_bus)
139
140#define EHCI_XFER2EXFER(xfer) ((struct ehci_xfer *)(xfer))
141
142#define EHCI_XFER2EPIPE(xfer) ((struct ehci_pipe *)((xfer)->ux_pipe))
143#define EHCI_PIPE2EPIPE(pipe) ((struct ehci_pipe *)(pipe))
144
145/* Information about an entry in the interrupt list. */
146struct ehci_soft_islot {
147 ehci_soft_qh_t *sqh; /* Queue Head. */
148};
149
150#define EHCI_FRAMELIST_MAXCOUNT 1024
151#define EHCI_IPOLLRATES 8 /* Poll rates (1ms, 2, 4, 8 .. 128) */
152#define EHCI_INTRQHS ((1 << EHCI_IPOLLRATES) - 1)
153#define EHCI_MAX_POLLRATE (1 << (EHCI_IPOLLRATES - 1))
154#define EHCI_IQHIDX(lev, pos) \
155 ((((pos) & ((1 << (lev)) - 1)) | (1 << (lev))) - 1)
156#define EHCI_ILEV_IVAL(lev) (1 << (lev))
157
158
159#define EHCI_HASH_SIZE 128
160#define EHCI_COMPANION_MAX 8
161
162#define EHCI_FREE_LIST_INTERVAL 100
163
164typedef struct ehci_softc {
165 device_t sc_dev;
166 kmutex_t sc_lock;
167 kmutex_t sc_intr_lock;
168 kcondvar_t sc_doorbell;
169 void *sc_doorbell_si;
170 void *sc_pcd_si;
171 struct usbd_bus sc_bus;
172 bus_space_tag_t iot;
173 bus_space_handle_t ioh;
174 bus_size_t sc_size;
175 u_int sc_offs; /* offset to operational regs */
176 int sc_flags; /* misc flags */
177#define EHCIF_DROPPED_INTR_WORKAROUND 0x01
178#define EHCIF_ETTF 0x02 /* Emb. Transaction Translater func. */
179
180 char sc_vendor[32]; /* vendor string for root hub */
181 int sc_id_vendor; /* vendor ID for root hub */
182
183 uint32_t sc_cmd; /* shadow of cmd reg during suspend */
184
185 u_int sc_ncomp;
186 u_int sc_npcomp;
187 device_t sc_comps[EHCI_COMPANION_MAX];
188
189 usb_dma_t sc_fldma;
190 ehci_link_t *sc_flist;
191 u_int sc_flsize;
192 u_int sc_rand; /* XXX need proper intr scheduling */
193
194 struct ehci_soft_islot sc_islots[EHCI_INTRQHS];
195
196 /*
197 * an array matching sc_flist, but with software pointers,
198 * not hardware address pointers
199 */
200 struct ehci_soft_itd **sc_softitds;
201
202 TAILQ_HEAD(, ehci_xfer) sc_intrhead;
203
204 ehci_soft_qh_t *sc_freeqhs;
205 ehci_soft_qtd_t *sc_freeqtds;
206 LIST_HEAD(sc_freeitds, ehci_soft_itd) sc_freeitds;
207 LIST_HEAD(sc_freesitds, ehci_soft_sitd) sc_freesitds;
208
209 int sc_noport;
210 uint8_t sc_hasppc; /* has Port Power Control */
211 uint8_t sc_istthreshold; /* ISOC Scheduling Threshold (uframes) */
212 struct usbd_xfer *sc_intrxfer;
213 char sc_isreset[EHCI_MAX_PORTS];
214 char sc_softwake;
215 kcondvar_t sc_softwake_cv;
216
217 uint32_t sc_eintrs;
218 ehci_soft_qh_t *sc_async_head;
219
220 pool_cache_t sc_xferpool; /* free xfer pool */
221
222 struct callout sc_tmo_intrlist;
223
224 device_t sc_child; /* /dev/usb# device */
225 char sc_dying;
226
227 void (*sc_vendor_init)(struct ehci_softc *);
228 int (*sc_vendor_port_status)(struct ehci_softc *, uint32_t, int);
229} ehci_softc_t;
230
231#define EREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (a))
232#define EREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (a))
233#define EREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (a))
234#define EWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (a), (x))
235#define EWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (a), (x))
236#define EWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (a), (x))
237#define EOREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
238#define EOREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
239#define EOREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
240#define EOWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
241#define EOWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
242#define EOWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
243
244int ehci_init(ehci_softc_t *);
245int ehci_intr(void *);
246int ehci_detach(ehci_softc_t *, int);
247int ehci_activate(device_t, enum devact);
248void ehci_childdet(device_t, device_t);
249bool ehci_suspend(device_t, const pmf_qual_t *);
250bool ehci_resume(device_t, const pmf_qual_t *);
251bool ehci_shutdown(device_t, int);
252
253#endif /* _EHCIVAR_H_ */
254