1/* $NetBSD: rlphy.c,v 1.30 2016/07/07 06:55:41 msaitoh Exp $ */
2/* $OpenBSD: rlphy.c,v 1.20 2005/07/31 05:27:30 pvalchev Exp $ */
3
4/*
5 * Copyright (c) 1998, 1999 Jason L. Wright (jason@thought.net)
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
19 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
20 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
23 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
26 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 * POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/*
31 * Driver for the internal PHY found on RTL8139 based nics, based
32 * on drivers for the 'exphy' (Internal 3Com phys) and 'nsphy'
33 * (National Semiconductor DP83840).
34 */
35
36/*
37 * Ported to NetBSD by Juan Romero Pardines <xtraeme@NetBSD.org>
38 */
39
40#include <sys/cdefs.h>
41__KERNEL_RCSID(0, "$NetBSD: rlphy.c,v 1.30 2016/07/07 06:55:41 msaitoh Exp $");
42
43#include <sys/param.h>
44#include <sys/systm.h>
45#include <sys/kernel.h>
46#include <sys/device.h>
47#include <sys/socket.h>
48#include <sys/errno.h>
49
50#include <net/if.h>
51#include <net/if_media.h>
52
53#include <dev/mii/mii.h>
54#include <dev/mii/miivar.h>
55#include <dev/mii/miidevs.h>
56#include <sys/bus.h>
57#include <dev/ic/rtl81x9reg.h>
58
59struct rlphy_softc {
60 struct mii_softc sc_mii;
61 int sc_rtl8201l;
62};
63
64int rlphymatch(device_t, cfdata_t, void *);
65void rlphyattach(device_t, device_t, void *);
66
67CFATTACH_DECL_NEW(rlphy, sizeof(struct rlphy_softc),
68 rlphymatch, rlphyattach, mii_phy_detach, mii_phy_activate);
69
70int rlphy_service(struct mii_softc *, struct mii_data *, int);
71void rlphy_status(struct mii_softc *);
72
73static void rlphy_reset(struct mii_softc *);
74
75const struct mii_phy_funcs rlphy_funcs = {
76 rlphy_service, rlphy_status, rlphy_reset,
77};
78
79static const struct mii_phydesc rlphys[] = {
80 { MII_OUI_yyREALTEK, MII_MODEL_yyREALTEK_RTL8201L,
81 MII_STR_yyREALTEK_RTL8201L },
82 { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP101,
83 MII_STR_ICPLUS_IP101 },
84
85 { 0, 0,
86 NULL },
87};
88
89int
90rlphymatch(device_t parent, cfdata_t match, void *aux)
91{
92 struct mii_attach_args *ma = aux;
93 struct mii_data *mii = ma->mii_data;
94
95 if (mii->mii_instance != 0)
96 return 0;
97
98 if (mii_phy_match(ma, rlphys) != NULL)
99 return (10);
100
101 if (MII_OUI(ma->mii_id1, ma->mii_id2) != 0 ||
102 MII_MODEL(ma->mii_id2) != 0)
103 return 0;
104
105 if (!device_is_a(parent, "rtk") && !device_is_a(parent, "re"))
106 return 0;
107
108 /*
109 * A "real" phy should get preference, but on the 8139 there
110 * is no phyid register.
111 */
112 return 5;
113}
114
115void
116rlphyattach(device_t parent, device_t self, void *aux)
117{
118 struct rlphy_softc *rsc = device_private(self);
119 struct mii_softc *sc = &rsc->sc_mii;
120 struct mii_attach_args *ma = aux;
121 struct mii_data *mii = ma->mii_data;
122
123 aprint_naive("\n");
124 if (MII_MODEL(ma->mii_id2) == MII_MODEL_yyREALTEK_RTL8201L) {
125 rsc->sc_rtl8201l = 1;
126 aprint_normal(": %s, rev. %d\n", MII_STR_yyREALTEK_RTL8201L,
127 MII_REV(ma->mii_id2));
128 } else
129 aprint_normal(": Realtek internal PHY\n");
130
131 sc->mii_dev = self;
132 sc->mii_inst = mii->mii_instance;
133 sc->mii_phy = ma->mii_phyno;
134 sc->mii_funcs = &rlphy_funcs;
135 sc->mii_pdata = mii;
136 sc->mii_flags = ma->mii_flags;
137
138 sc->mii_flags |= MIIF_NOISOLATE;
139
140 PHY_RESET(sc);
141
142 aprint_normal_dev(self, "");
143 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
144 if (sc->mii_capabilities & BMSR_MEDIAMASK)
145 mii_phy_add_media(sc);
146 aprint_normal("\n");
147}
148
149int
150rlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
151{
152 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
153
154 /*
155 * Can't isolate the RTL8139 phy, so it has to be the only one.
156 */
157 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
158 panic("rlphy_service: attempt to isolate phy");
159
160 switch (cmd) {
161 case MII_POLLSTAT:
162 break;
163
164 case MII_MEDIACHG:
165 /*
166 * If the interface is not up, don't do anything.
167 */
168 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
169 break;
170
171 mii_phy_setmedia(sc);
172 break;
173
174 case MII_TICK:
175 /*
176 * Is the interface even up?
177 */
178 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
179 return (0);
180
181 /*
182 * Only used for autonegotiation.
183 */
184 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
185 break;
186
187 /*
188 * The RealTek PHY's autonegotiation doesn't need to be
189 * kicked; it continues in the background.
190 */
191 break;
192
193 case MII_DOWN:
194 mii_phy_down(sc);
195 return (0);
196 }
197
198 /* Update the media status. */
199 mii_phy_status(sc);
200
201 /* Callback if something changed. */
202 mii_phy_update(sc, cmd);
203 return (0);
204}
205
206void
207rlphy_status(struct mii_softc *sc)
208{
209 struct rlphy_softc *rsc = (void *)sc;
210 struct mii_data *mii = sc->mii_pdata;
211 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
212 int bmsr, bmcr, anlpar;
213
214 mii->mii_media_status = IFM_AVALID;
215 mii->mii_media_active = IFM_ETHER;
216
217 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
218 if (bmsr & BMSR_LINK)
219 mii->mii_media_status |= IFM_ACTIVE;
220
221 bmcr = PHY_READ(sc, MII_BMCR);
222 if (bmcr & BMCR_ISO) {
223 mii->mii_media_active |= IFM_NONE;
224 mii->mii_media_status = 0;
225 return;
226 }
227
228 if (bmcr & BMCR_LOOP)
229 mii->mii_media_active |= IFM_LOOP;
230
231 if (bmcr & BMCR_AUTOEN) {
232 /*
233 * NWay autonegotiation takes the highest-order common
234 * bit of the ANAR and ANLPAR (i.e. best media advertised
235 * both by us and our link partner).
236 */
237 if ((bmsr & BMSR_ACOMP) == 0) {
238 /* Erg, still trying, I guess... */
239 mii->mii_media_active |= IFM_NONE;
240 return;
241 }
242
243 if ((anlpar = PHY_READ(sc, MII_ANAR) &
244 PHY_READ(sc, MII_ANLPAR))) {
245 if (anlpar & ANLPAR_TX_FD)
246 mii->mii_media_active |= IFM_100_TX|IFM_FDX;
247 else if (anlpar & ANLPAR_T4)
248 mii->mii_media_active |= IFM_100_T4|IFM_HDX;
249 else if (anlpar & ANLPAR_TX)
250 mii->mii_media_active |= IFM_100_TX|IFM_HDX;
251 else if (anlpar & ANLPAR_10_FD)
252 mii->mii_media_active |= IFM_10_T|IFM_FDX;
253 else if (anlpar & ANLPAR_10)
254 mii->mii_media_active |= IFM_10_T|IFM_HDX;
255 else
256 mii->mii_media_active |= IFM_NONE;
257 return;
258 }
259
260 /*
261 * If the other side doesn't support NWAY, then the
262 * best we can do is determine if we have a 10Mbps or
263 * 100Mbps link. There's no way to know if the link
264 * is full or half duplex, so we default to half duplex
265 * and hope that the user is clever enough to manually
266 * change the media settings if we're wrong.
267 */
268
269 /*
270 * The RealTek PHY supports non-NWAY link speed
271 * detection, however it does not report the link
272 * detection results via the ANLPAR or BMSR registers.
273 * (What? RealTek doesn't do things the way everyone
274 * else does? I'm just shocked, shocked I tell you.)
275 * To determine the link speed, we have to do one
276 * of two things:
277 *
278 * - If this is a standalone RealTek RTL8201(L) PHY,
279 * we can determine the link speed by testing bit 0
280 * in the magic, vendor-specific register at offset
281 * 0x19.
282 *
283 * - If this is a RealTek MAC with integrated PHY, we
284 * can test the 'SPEED10' bit of the MAC's media status
285 * register.
286 */
287 if (rsc->sc_rtl8201l) {
288 if (PHY_READ(sc, 0x0019) & 0x01)
289 mii->mii_media_active |= IFM_100_TX;
290 else
291 mii->mii_media_active |= IFM_10_T;
292 } else {
293 if (PHY_READ(sc, RTK_MEDIASTAT) & RTK_MEDIASTAT_SPEED10)
294 mii->mii_media_active |= IFM_10_T;
295 else
296 mii->mii_media_active |= IFM_100_TX;
297 }
298 mii->mii_media_active |= IFM_HDX;
299 } else
300 mii->mii_media_active = ife->ifm_media;
301}
302
303static void
304rlphy_reset(struct mii_softc *sc)
305{
306
307 mii_phy_reset(sc);
308
309 /*
310 * XXX RealTek PHY doesn't set the BMCR properly after
311 * XXX reset, which breaks autonegotiation.
312 */
313 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN);
314}
315