1 | /* $NetBSD: auixp.c,v 1.42 2016/07/07 06:55:41 msaitoh Exp $ */ |
2 | |
3 | /* |
4 | * Copyright (c) 2004, 2005 Reinoud Zandijk <reinoud@netbsd.org> |
5 | * All rights reserved. |
6 | * |
7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions |
9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * 2. The name of the author may not be used to endorse or promote products |
13 | * derived from this software without specific prior written permission. |
14 | * 3. All advertising materials mentioning features or use of this software |
15 | * must display the following acknowledgement: |
16 | * This product includes software developed by the NetBSD |
17 | * Foundation, Inc. and its contributors. |
18 | * 4. Neither the name of The NetBSD Foundation nor the names of its |
19 | * contributors may be used to endorse or promote products derived |
20 | * from this software without specific prior written permission. |
21 | * |
22 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
23 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
24 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
25 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
26 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
27 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
28 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED |
29 | * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
31 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
32 | * SUCH DAMAGE. |
33 | */ |
34 | |
35 | |
36 | /* |
37 | * NetBSD audio driver for ATI IXP-{150,200,...} audio driver hardware. |
38 | * |
39 | * Recording and playback has been tested OK on various sample rates and |
40 | * encodings. |
41 | * |
42 | * Known problems and issues : |
43 | * - SPDIF is untested and needs some work still (LED stays off) |
44 | * - 32 bit audio playback failed last time i tried but that might an AC'97 |
45 | * codec support problem. |
46 | * - 32 bit recording works but can't try out playing: see above. |
47 | * - no suspend/resume support yet. |
48 | * - multiple codecs are `supported' but not tested; the implemetation needs |
49 | * some cleaning up. |
50 | */ |
51 | |
52 | #include <sys/cdefs.h> |
53 | __KERNEL_RCSID(0, "$NetBSD: auixp.c,v 1.42 2016/07/07 06:55:41 msaitoh Exp $" ); |
54 | |
55 | #include <sys/types.h> |
56 | #include <sys/errno.h> |
57 | #include <sys/null.h> |
58 | #include <sys/param.h> |
59 | #include <sys/systm.h> |
60 | #include <sys/kmem.h> |
61 | #include <sys/device.h> |
62 | #include <sys/conf.h> |
63 | #include <sys/exec.h> |
64 | #include <sys/select.h> |
65 | #include <sys/audioio.h> |
66 | #include <sys/queue.h> |
67 | #include <sys/bus.h> |
68 | #include <sys/intr.h> |
69 | |
70 | #include <dev/audio_if.h> |
71 | #include <dev/mulaw.h> |
72 | #include <dev/auconv.h> |
73 | |
74 | #include <dev/ic/ac97var.h> |
75 | #include <dev/ic/ac97reg.h> |
76 | |
77 | #include <dev/pci/pcidevs.h> |
78 | #include <dev/pci/pcivar.h> |
79 | #include <dev/pci/auixpreg.h> |
80 | #include <dev/pci/auixpvar.h> |
81 | |
82 | |
83 | /* #define DEBUG_AUIXP */ |
84 | |
85 | |
86 | /* why isn't this base address register not in the headerfile? */ |
87 | #define PCI_CBIO 0x10 |
88 | |
89 | |
90 | /* macro's used */ |
91 | #define KERNADDR(p) ((void *)((p)->addr)) |
92 | #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) |
93 | |
94 | |
95 | /* the differences might be irrelevant */ |
96 | enum { |
97 | IXP_200, |
98 | IXP_300, |
99 | IXP_400 |
100 | }; |
101 | |
102 | |
103 | /* our `cards' */ |
104 | static const struct auixp_card_type { |
105 | uint16_t pci_vendor_id; |
106 | uint16_t pci_product_id; |
107 | int type; |
108 | } auixp_card_types[] = { |
109 | { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_AUDIO_200, IXP_200 }, |
110 | { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_AUDIO_300, IXP_300 }, |
111 | { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_AUDIO_400, IXP_400 }, |
112 | { 0, 0, 0 } |
113 | }; |
114 | |
115 | |
116 | struct audio_device auixp_device = { |
117 | "ATI IXP audio" , |
118 | "" , |
119 | "auixp" |
120 | }; |
121 | |
122 | |
123 | /* codec detection constant indicating the interrupt flags */ |
124 | #define ALL_CODECS_NOT_READY \ |
125 | (ATI_REG_ISR_CODEC0_NOT_READY |\ |
126 | ATI_REG_ISR_CODEC1_NOT_READY |\ |
127 | ATI_REG_ISR_CODEC2_NOT_READY) |
128 | #define CODEC_CHECK_BITS (ALL_CODECS_NOT_READY|ATI_REG_ISR_NEW_FRAME) |
129 | |
130 | |
131 | /* autoconfig */ |
132 | static int auixp_match(device_t, cfdata_t, void *); |
133 | static void auixp_attach(device_t, device_t, void *); |
134 | static int auixp_detach(device_t, int); |
135 | |
136 | |
137 | /* audio(9) function prototypes */ |
138 | static int auixp_query_encoding(void *, struct audio_encoding *); |
139 | static int auixp_set_params(void *, int, int, audio_params_t *, |
140 | audio_params_t *, |
141 | stream_filter_list_t *, stream_filter_list_t *); |
142 | static int auixp_commit_settings(void *); |
143 | static int auixp_round_blocksize(void *, int, int, const audio_params_t *); |
144 | static int auixp_trigger_output(void *, void *, void *, int, |
145 | void (*)(void *), |
146 | void *, const audio_params_t *); |
147 | static int auixp_trigger_input(void *, void *, void *, int, |
148 | void (*)(void *), |
149 | void *, const audio_params_t *); |
150 | static int auixp_halt_output(void *); |
151 | static int auixp_halt_input(void *); |
152 | static int auixp_set_port(void *, mixer_ctrl_t *); |
153 | static int auixp_get_port(void *, mixer_ctrl_t *); |
154 | static int auixp_query_devinfo(void *, mixer_devinfo_t *); |
155 | static void * auixp_malloc(void *, int, size_t); |
156 | static void auixp_free(void *, void *, size_t); |
157 | static int auixp_getdev(void *, struct audio_device *); |
158 | static size_t auixp_round_buffersize(void *, int, size_t); |
159 | static int auixp_get_props(void *); |
160 | static int auixp_intr(void *); |
161 | static int auixp_allocmem(struct auixp_softc *, size_t, size_t, |
162 | struct auixp_dma *); |
163 | static int auixp_freemem(struct auixp_softc *, struct auixp_dma *); |
164 | static paddr_t auixp_mappage(void *, void *, off_t, int); |
165 | |
166 | /* Supporting subroutines */ |
167 | static int auixp_init(struct auixp_softc *); |
168 | static void auixp_autodetect_codecs(struct auixp_softc *); |
169 | static void auixp_post_config(device_t); |
170 | |
171 | static void auixp_reset_aclink(struct auixp_softc *); |
172 | static int auixp_attach_codec(void *, struct ac97_codec_if *); |
173 | static int auixp_read_codec(void *, uint8_t, uint16_t *); |
174 | static int auixp_write_codec(void *, uint8_t, uint16_t); |
175 | static int auixp_wait_for_codecs(struct auixp_softc *, const char *); |
176 | static int auixp_reset_codec(void *); |
177 | static enum ac97_host_flags auixp_flags_codec(void *); |
178 | |
179 | static void auixp_enable_dma(struct auixp_softc *, struct auixp_dma *); |
180 | static void auixp_disable_dma(struct auixp_softc *, struct auixp_dma *); |
181 | static void auixp_enable_interrupts(struct auixp_softc *); |
182 | static void auixp_disable_interrupts(struct auixp_softc *); |
183 | |
184 | |
185 | /* statics */ |
186 | static void auixp_link_daisychain(struct auixp_softc *, |
187 | struct auixp_dma *, struct auixp_dma *, |
188 | int, int); |
189 | static int auixp_allocate_dma_chain(struct auixp_softc *, |
190 | struct auixp_dma **); |
191 | static void auixp_program_dma_chain(struct auixp_softc *, |
192 | struct auixp_dma *); |
193 | static void auixp_dma_update(struct auixp_softc *, struct auixp_dma *); |
194 | static void auixp_update_busbusy(struct auixp_softc *); |
195 | static void auixp_get_locks(void *, kmutex_t **, kmutex_t **); |
196 | |
197 | static bool auixp_resume(device_t, const pmf_qual_t *); |
198 | |
199 | |
200 | #ifdef DEBUG_AUIXP |
201 | static struct auixp_softc *static_sc; |
202 | static void auixp_dumpreg(void); |
203 | # define DPRINTF(x) printf x; |
204 | #else |
205 | # define DPRINTF(x) |
206 | #endif |
207 | |
208 | |
209 | static const struct audio_hw_if auixp_hw_if = { |
210 | NULL, /* open */ |
211 | NULL, /* close */ |
212 | NULL, /* drain */ |
213 | auixp_query_encoding, |
214 | auixp_set_params, |
215 | auixp_round_blocksize, |
216 | auixp_commit_settings, |
217 | NULL, /* init_output */ |
218 | NULL, /* init_input */ |
219 | NULL, /* start_output */ |
220 | NULL, /* start_input */ |
221 | auixp_halt_output, |
222 | auixp_halt_input, |
223 | NULL, /* speaker_ctl */ |
224 | auixp_getdev, |
225 | NULL, /* getfd */ |
226 | auixp_set_port, |
227 | auixp_get_port, |
228 | auixp_query_devinfo, |
229 | auixp_malloc, |
230 | auixp_free, |
231 | auixp_round_buffersize, |
232 | auixp_mappage, |
233 | auixp_get_props, |
234 | auixp_trigger_output, |
235 | auixp_trigger_input, |
236 | NULL, /* dev_ioctl */ |
237 | auixp_get_locks, |
238 | }; |
239 | |
240 | |
241 | CFATTACH_DECL_NEW(auixp, sizeof(struct auixp_softc), auixp_match, auixp_attach, |
242 | auixp_detach, NULL); |
243 | |
244 | |
245 | /* |
246 | * audio(9) functions |
247 | */ |
248 | |
249 | static int |
250 | auixp_query_encoding(void *hdl, struct audio_encoding *ae) |
251 | { |
252 | struct auixp_codec *co; |
253 | struct auixp_softc *sc; |
254 | |
255 | co = (struct auixp_codec *) hdl; |
256 | sc = co->sc; |
257 | return auconv_query_encoding(sc->sc_encodings, ae); |
258 | } |
259 | |
260 | |
261 | static int |
262 | auixp_set_rate(struct auixp_codec *co, int mode, u_int srate) |
263 | { |
264 | int ret; |
265 | u_int ratetmp; |
266 | |
267 | ratetmp = srate; |
268 | if (mode == AUMODE_RECORD) { |
269 | ret = co->codec_if->vtbl->set_rate(co->codec_if, |
270 | AC97_REG_PCM_LR_ADC_RATE, &ratetmp); |
271 | return ret; |
272 | } |
273 | |
274 | /* play mode */ |
275 | ret = co->codec_if->vtbl->set_rate(co->codec_if, |
276 | AC97_REG_PCM_FRONT_DAC_RATE, &ratetmp); |
277 | if (ret) |
278 | return ret; |
279 | |
280 | ratetmp = srate; |
281 | ret = co->codec_if->vtbl->set_rate(co->codec_if, |
282 | AC97_REG_PCM_SURR_DAC_RATE, &ratetmp); |
283 | if (ret) |
284 | return ret; |
285 | |
286 | ratetmp = srate; |
287 | ret = co->codec_if->vtbl->set_rate(co->codec_if, |
288 | AC97_REG_PCM_LFE_DAC_RATE, &ratetmp); |
289 | return ret; |
290 | } |
291 | |
292 | |
293 | /* commit setting and program ATI IXP chip */ |
294 | static int |
295 | auixp_commit_settings(void *hdl) |
296 | { |
297 | struct auixp_codec *co; |
298 | struct auixp_softc *sc; |
299 | bus_space_tag_t iot; |
300 | bus_space_handle_t ioh; |
301 | struct audio_params *params; |
302 | uint32_t value; |
303 | |
304 | /* XXX would it be better to stop interrupts first? XXX */ |
305 | co = (struct auixp_codec *) hdl; |
306 | sc = co->sc; |
307 | iot = sc->sc_iot; |
308 | ioh = sc->sc_ioh; |
309 | |
310 | /* process input settings */ |
311 | params = &sc->sc_play_params; |
312 | |
313 | /* set input interleaving (precision) */ |
314 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
315 | value &= ~ATI_REG_CMD_INTERLEAVE_IN; |
316 | if (params->precision <= 16) |
317 | value |= ATI_REG_CMD_INTERLEAVE_IN; |
318 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
319 | |
320 | /* process output settings */ |
321 | params = &sc->sc_play_params; |
322 | |
323 | value = bus_space_read_4(iot, ioh, ATI_REG_OUT_DMA_SLOT); |
324 | value &= ~ATI_REG_OUT_DMA_SLOT_MASK; |
325 | |
326 | /* TODO SPDIF case for 8 channels */ |
327 | switch (params->channels) { |
328 | case 6: |
329 | value |= ATI_REG_OUT_DMA_SLOT_BIT(7) | |
330 | ATI_REG_OUT_DMA_SLOT_BIT(8); |
331 | /* fallthru */ |
332 | case 4: |
333 | value |= ATI_REG_OUT_DMA_SLOT_BIT(6) | |
334 | ATI_REG_OUT_DMA_SLOT_BIT(9); |
335 | /* fallthru */ |
336 | default: |
337 | value |= ATI_REG_OUT_DMA_SLOT_BIT(3) | |
338 | ATI_REG_OUT_DMA_SLOT_BIT(4); |
339 | break; |
340 | } |
341 | /* set output threshold */ |
342 | value |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT; |
343 | bus_space_write_4(iot, ioh, ATI_REG_OUT_DMA_SLOT, value); |
344 | |
345 | /* set output interleaving (precision) */ |
346 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
347 | value &= ~ATI_REG_CMD_INTERLEAVE_OUT; |
348 | if (params->precision <= 16) |
349 | value |= ATI_REG_CMD_INTERLEAVE_OUT; |
350 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
351 | |
352 | /* enable 6 channel reordering */ |
353 | value = bus_space_read_4(iot, ioh, ATI_REG_6CH_REORDER); |
354 | value &= ~ATI_REG_6CH_REORDER_EN; |
355 | if (params->channels == 6) |
356 | value |= ATI_REG_6CH_REORDER_EN; |
357 | bus_space_write_4(iot, ioh, ATI_REG_6CH_REORDER, value); |
358 | |
359 | if (sc->has_spdif) { |
360 | /* set SPDIF (if present) */ |
361 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
362 | value &= ~ATI_REG_CMD_SPDF_CONFIG_MASK; |
363 | value |= ATI_REG_CMD_SPDF_CONFIG_34; /* NetBSD AC'97 default */ |
364 | |
365 | /* XXX this prolly is not nessisary unless splitted XXX */ |
366 | value &= ~ATI_REG_CMD_INTERLEAVE_SPDF; |
367 | if (params->precision <= 16) |
368 | value |= ATI_REG_CMD_INTERLEAVE_SPDF; |
369 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
370 | } |
371 | |
372 | return 0; |
373 | } |
374 | |
375 | |
376 | /* set audio properties in desired setting */ |
377 | static int |
378 | auixp_set_params(void *hdl, int setmode, int usemode, |
379 | audio_params_t *play, audio_params_t *rec, stream_filter_list_t *pfil, |
380 | stream_filter_list_t *rfil) |
381 | { |
382 | struct auixp_codec *co; |
383 | struct auixp_softc *sc; |
384 | audio_params_t *params; |
385 | stream_filter_list_t *fil; |
386 | int mode, index; |
387 | |
388 | /* |
389 | * In current NetBSD AC'97 implementation, SPDF is linked to channel 3 |
390 | * and 4 i.e. stereo output. |
391 | */ |
392 | |
393 | co = (struct auixp_codec *) hdl; |
394 | sc = co->sc; |
395 | for (mode = AUMODE_RECORD; mode != -1; |
396 | mode = (mode == AUMODE_RECORD) ? AUMODE_PLAY : -1) { |
397 | if ((setmode & mode) == 0) |
398 | continue; |
399 | |
400 | params = (mode == AUMODE_PLAY) ? play : rec; |
401 | fil = (mode == AUMODE_PLAY) ? pfil : rfil; |
402 | if (params == NULL) |
403 | continue; |
404 | |
405 | /* AD1888 settings ... don't know the IXP limits */ |
406 | if (params->sample_rate < AUIXP_MINRATE) |
407 | return EINVAL; |
408 | if (params->sample_rate > AUIXP_MAXRATE) |
409 | return EINVAL; |
410 | |
411 | index = auconv_set_converter(sc->sc_formats, AUIXP_NFORMATS, |
412 | mode, params, TRUE, fil); |
413 | |
414 | /* nothing found? */ |
415 | if (index < 0) |
416 | return EINVAL; |
417 | |
418 | /* not sure yet as to why i have to change params here */ |
419 | if (fil->req_size > 0) |
420 | params = &fil->filters[0].param; |
421 | |
422 | /* if variable speed and we can't set the desired rate, fail */ |
423 | if ((sc->sc_formats[index].frequency_type != 1) && |
424 | auixp_set_rate(co, mode, params->sample_rate)) |
425 | return EINVAL; |
426 | |
427 | /* preserve the settings */ |
428 | if (mode == AUMODE_PLAY) |
429 | sc->sc_play_params = *params; |
430 | if (mode == AUMODE_RECORD) |
431 | sc->sc_rec_params = *params; |
432 | } |
433 | |
434 | return 0; |
435 | } |
436 | |
437 | |
438 | /* called to translate a requested blocksize to a hw-possible one */ |
439 | static int |
440 | auixp_round_blocksize(void *hdl, int bs, int mode, |
441 | const audio_params_t *param) |
442 | { |
443 | uint32_t new_bs; |
444 | |
445 | new_bs = bs; |
446 | /* Be conservative; align to 32 bytes and maximise it to 64 kb */ |
447 | /* 256 kb possible */ |
448 | if (new_bs > 0x10000) |
449 | bs = 0x10000; /* 64 kb max */ |
450 | new_bs = (bs & ~0x20); /* 32 bytes align */ |
451 | |
452 | return new_bs; |
453 | } |
454 | |
455 | |
456 | /* |
457 | * allocate dma capable memory and record its information for later retrieval |
458 | * when we program the dma chain itself. The trigger routines passes on the |
459 | * kernel virtual address we return here as a reference to the mapping. |
460 | */ |
461 | static void * |
462 | auixp_malloc(void *hdl, int direction, size_t size) |
463 | { |
464 | struct auixp_codec *co; |
465 | struct auixp_softc *sc; |
466 | struct auixp_dma *dma; |
467 | int error; |
468 | |
469 | co = (struct auixp_codec *) hdl; |
470 | sc = co->sc; |
471 | /* get us a auixp_dma structure */ |
472 | dma = kmem_alloc(sizeof(*dma), KM_SLEEP); |
473 | if (!dma) |
474 | return NULL; |
475 | |
476 | /* get us a dma buffer itself */ |
477 | error = auixp_allocmem(sc, size, 16, dma); |
478 | if (error) { |
479 | kmem_free(dma, sizeof(*dma)); |
480 | aprint_error_dev(sc->sc_dev, "auixp_malloc: not enough memory\n" ); |
481 | |
482 | return NULL; |
483 | } |
484 | SLIST_INSERT_HEAD(&sc->sc_dma_list, dma, dma_chain); |
485 | |
486 | DPRINTF(("auixp_malloc: returning kern %p, hw 0x%08x for %d bytes " |
487 | "in %d segs\n" , KERNADDR(dma), (uint32_t) DMAADDR(dma), dma->size, |
488 | dma->nsegs) |
489 | ); |
490 | |
491 | return KERNADDR(dma); |
492 | } |
493 | |
494 | |
495 | /* |
496 | * free and release dma capable memory we allocated before and remove its |
497 | * recording |
498 | */ |
499 | static void |
500 | auixp_free(void *hdl, void *addr, size_t size) |
501 | { |
502 | struct auixp_codec *co; |
503 | struct auixp_softc *sc; |
504 | struct auixp_dma *dma; |
505 | |
506 | co = (struct auixp_codec *) hdl; |
507 | sc = co->sc; |
508 | SLIST_FOREACH(dma, &sc->sc_dma_list, dma_chain) { |
509 | if (KERNADDR(dma) == addr) { |
510 | SLIST_REMOVE(&sc->sc_dma_list, dma, auixp_dma, |
511 | dma_chain); |
512 | auixp_freemem(sc, dma); |
513 | kmem_free(dma, sizeof(*dma)); |
514 | return; |
515 | } |
516 | } |
517 | } |
518 | |
519 | |
520 | static int |
521 | auixp_getdev(void *hdl, struct audio_device *ret) |
522 | { |
523 | |
524 | *ret = auixp_device; |
525 | return 0; |
526 | } |
527 | |
528 | |
529 | /* pass request to AC'97 codec code */ |
530 | static int |
531 | auixp_set_port(void *hdl, mixer_ctrl_t *mc) |
532 | { |
533 | struct auixp_codec *co; |
534 | |
535 | co = (struct auixp_codec *) hdl; |
536 | return co->codec_if->vtbl->mixer_set_port(co->codec_if, mc); |
537 | } |
538 | |
539 | |
540 | /* pass request to AC'97 codec code */ |
541 | static int |
542 | auixp_get_port(void *hdl, mixer_ctrl_t *mc) |
543 | { |
544 | struct auixp_codec *co; |
545 | |
546 | co = (struct auixp_codec *) hdl; |
547 | return co->codec_if->vtbl->mixer_get_port(co->codec_if, mc); |
548 | } |
549 | |
550 | /* pass request to AC'97 codec code */ |
551 | static int |
552 | auixp_query_devinfo(void *hdl, mixer_devinfo_t *di) |
553 | { |
554 | struct auixp_codec *co; |
555 | |
556 | co = (struct auixp_codec *) hdl; |
557 | return co->codec_if->vtbl->query_devinfo(co->codec_if, di); |
558 | } |
559 | |
560 | |
561 | static size_t |
562 | auixp_round_buffersize(void *hdl, int direction, |
563 | size_t bufsize) |
564 | { |
565 | |
566 | /* XXX force maximum? i.e. 256 kb? */ |
567 | return bufsize; |
568 | } |
569 | |
570 | |
571 | static int |
572 | auixp_get_props(void *hdl) |
573 | { |
574 | |
575 | return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; |
576 | } |
577 | |
578 | |
579 | /* |
580 | * A dma descriptor has dma->nsegs segments defined in dma->segs set up when |
581 | * we claimed the memory. |
582 | * |
583 | * Due to our demand for one contiguous DMA area, we only have one segment. A |
584 | * c_dma structure is about 3 kb for the 256 entries we maximally program |
585 | * -arbitrary limit AFAIK- so all is most likely to be in one segment/page |
586 | * anyway. |
587 | * |
588 | * XXX ought to implement fragmented dma area XXX |
589 | * |
590 | * Note that _v variables depict kernel virtual addresses, _p variables depict |
591 | * physical addresses. |
592 | */ |
593 | static void |
594 | auixp_link_daisychain(struct auixp_softc *sc, |
595 | struct auixp_dma *c_dma, struct auixp_dma *s_dma, |
596 | int blksize, int blocks) |
597 | { |
598 | atiixp_dma_desc_t *caddr_v, *next_caddr_v; |
599 | uint32_t caddr_p, next_caddr_p, saddr_p; |
600 | int i; |
601 | |
602 | /* just make sure we are not changing when its running */ |
603 | auixp_disable_dma(sc, c_dma); |
604 | |
605 | /* setup dma chain start addresses */ |
606 | caddr_v = KERNADDR(c_dma); |
607 | caddr_p = DMAADDR(c_dma); |
608 | saddr_p = DMAADDR(s_dma); |
609 | |
610 | /* program the requested number of blocks */ |
611 | for (i = 0; i < blocks; i++) { |
612 | /* clear the block just in case */ |
613 | memset(caddr_v, 0, sizeof(atiixp_dma_desc_t)); |
614 | |
615 | /* round robin the chain dma addresses for its successor */ |
616 | next_caddr_v = caddr_v + 1; |
617 | next_caddr_p = caddr_p + sizeof(atiixp_dma_desc_t); |
618 | |
619 | if (i == blocks-1) { |
620 | next_caddr_v = KERNADDR(c_dma); |
621 | next_caddr_p = DMAADDR(c_dma); |
622 | } |
623 | |
624 | /* fill in the hardware dma chain descriptor in little-endian */ |
625 | caddr_v->addr = htole32(saddr_p); |
626 | caddr_v->status = htole16(0); |
627 | caddr_v->size = htole16((blksize >> 2)); /* in dwords (!!!) */ |
628 | caddr_v->next = htole32(next_caddr_p); |
629 | |
630 | /* advance slot */ |
631 | saddr_p += blksize; /* XXX assuming contiguous XXX */ |
632 | caddr_v = next_caddr_v; |
633 | caddr_p = next_caddr_p; |
634 | } |
635 | } |
636 | |
637 | |
638 | static int |
639 | auixp_allocate_dma_chain(struct auixp_softc *sc, struct auixp_dma **dmap) |
640 | { |
641 | struct auixp_dma *dma; |
642 | int error; |
643 | |
644 | /* allocate keeper of dma area */ |
645 | *dmap = NULL; |
646 | dma = kmem_zalloc(sizeof(struct auixp_dma), KM_SLEEP); |
647 | if (!dma) |
648 | return ENOMEM; |
649 | |
650 | /* allocate for daisychain of IXP hardware-dma descriptors */ |
651 | error = auixp_allocmem(sc, DMA_DESC_CHAIN * sizeof(atiixp_dma_desc_t), |
652 | 16, dma); |
653 | if (error) { |
654 | aprint_error_dev(sc->sc_dev, "can't malloc dma descriptor chain\n" ); |
655 | kmem_free(dma, sizeof(*dma)); |
656 | return ENOMEM; |
657 | } |
658 | |
659 | /* return info and initialise structure */ |
660 | dma->intr = NULL; |
661 | dma->intrarg = NULL; |
662 | |
663 | *dmap = dma; |
664 | return 0; |
665 | } |
666 | |
667 | |
668 | /* program dma chain in its link address descriptor */ |
669 | static void |
670 | auixp_program_dma_chain(struct auixp_softc *sc, struct auixp_dma *dma) |
671 | { |
672 | bus_space_tag_t iot; |
673 | bus_space_handle_t ioh; |
674 | uint32_t value; |
675 | |
676 | iot = sc->sc_iot; |
677 | ioh = sc->sc_ioh; |
678 | /* get hardware start address of DMA chain and set valid-flag in it */ |
679 | /* XXX always at start? XXX */ |
680 | value = DMAADDR(dma); |
681 | value = value | ATI_REG_LINKPTR_EN; |
682 | |
683 | /* reset linkpointer */ |
684 | bus_space_write_4(iot, ioh, dma->linkptr, 0); |
685 | |
686 | /* reset this DMA engine */ |
687 | auixp_disable_dma(sc, dma); |
688 | auixp_enable_dma(sc, dma); |
689 | |
690 | /* program new DMA linkpointer */ |
691 | bus_space_write_4(iot, ioh, dma->linkptr, value); |
692 | } |
693 | |
694 | |
695 | /* called from interrupt code to signal end of one dma-slot */ |
696 | static void |
697 | auixp_dma_update(struct auixp_softc *sc, struct auixp_dma *dma) |
698 | { |
699 | |
700 | /* be very paranoid */ |
701 | if (!dma) |
702 | panic("%s: update: dma = NULL" , device_xname(sc->sc_dev)); |
703 | if (!dma->intr) |
704 | panic("%s: update: dma->intr = NULL" , device_xname(sc->sc_dev)); |
705 | |
706 | /* request more input from upper layer */ |
707 | (*dma->intr)(dma->intrarg); |
708 | } |
709 | |
710 | |
711 | /* |
712 | * The magic `busbusy' bit that needs to be set when dma is active; allowing |
713 | * busmastering? |
714 | */ |
715 | static void |
716 | auixp_update_busbusy(struct auixp_softc *sc) |
717 | { |
718 | bus_space_tag_t iot; |
719 | bus_space_handle_t ioh; |
720 | uint32_t value; |
721 | int running; |
722 | |
723 | iot = sc->sc_iot; |
724 | ioh = sc->sc_ioh; |
725 | /* set bus-busy flag when either recording or playing is performed */ |
726 | value = bus_space_read_4(iot, ioh, ATI_REG_IER); |
727 | value &= ~ATI_REG_IER_SET_BUS_BUSY; |
728 | |
729 | running = ((sc->sc_output_dma->running) || (sc->sc_input_dma->running)); |
730 | if (running) |
731 | value |= ATI_REG_IER_SET_BUS_BUSY; |
732 | |
733 | bus_space_write_4(iot, ioh, ATI_REG_IER, value); |
734 | |
735 | } |
736 | |
737 | |
738 | /* |
739 | * Called from upper audio layer to request playing audio, only called once; |
740 | * audio is refilled by calling the intr() function when space is available |
741 | * again. |
742 | */ |
743 | /* XXX allmost literaly a copy of trigger-input; could be factorised XXX */ |
744 | static int |
745 | auixp_trigger_output(void *hdl, void *start, void *end, int blksize, |
746 | void (*intr)(void *), void *intrarg, const audio_params_t *param) |
747 | { |
748 | struct auixp_codec *co; |
749 | struct auixp_softc *sc; |
750 | struct auixp_dma *chain_dma; |
751 | struct auixp_dma *sound_dma; |
752 | uint32_t blocks; |
753 | |
754 | co = (struct auixp_codec *) hdl; |
755 | sc = co->sc; |
756 | chain_dma = sc->sc_output_dma; |
757 | /* add functions to call back */ |
758 | chain_dma->intr = intr; |
759 | chain_dma->intrarg = intrarg; |
760 | |
761 | /* |
762 | * Program output DMA chain with blocks from [start...end] with |
763 | * blksize fragments. |
764 | * |
765 | * NOTE, we can assume its in one block since we asked for it to be in |
766 | * one contiguous blob; XXX change this? XXX |
767 | */ |
768 | blocks = (size_t) (((char *) end) - ((char *) start)) / blksize; |
769 | |
770 | /* lookup `start' address in our list of DMA area's */ |
771 | SLIST_FOREACH(sound_dma, &sc->sc_dma_list, dma_chain) { |
772 | if (KERNADDR(sound_dma) == start) |
773 | break; |
774 | } |
775 | |
776 | /* not ours ? then bail out */ |
777 | if (!sound_dma) { |
778 | printf("%s: auixp_trigger_output: bad sound addr %p\n" , |
779 | device_xname(sc->sc_dev), start); |
780 | return EINVAL; |
781 | } |
782 | |
783 | /* link round-robin daisychain and program hardware */ |
784 | auixp_link_daisychain(sc, chain_dma, sound_dma, blksize, blocks); |
785 | auixp_program_dma_chain(sc, chain_dma); |
786 | |
787 | /* mark we are now able to run now */ |
788 | chain_dma->running = 1; |
789 | |
790 | /* update bus-flags; XXX programs more flags XXX */ |
791 | auixp_update_busbusy(sc); |
792 | |
793 | /* callbacks happen in interrupt routine */ |
794 | return 0; |
795 | } |
796 | |
797 | |
798 | /* halt output of audio, just disable its dma and update bus state */ |
799 | static int |
800 | auixp_halt_output(void *hdl) |
801 | { |
802 | struct auixp_codec *co; |
803 | struct auixp_softc *sc; |
804 | struct auixp_dma *dma; |
805 | |
806 | co = (struct auixp_codec *) hdl; |
807 | sc = co->sc; |
808 | dma = sc->sc_output_dma; |
809 | auixp_disable_dma(sc, dma); |
810 | |
811 | dma->running = 0; |
812 | auixp_update_busbusy(sc); |
813 | |
814 | return 0; |
815 | } |
816 | |
817 | |
818 | /* XXX allmost literaly a copy of trigger-output; could be factorised XXX */ |
819 | static int |
820 | auixp_trigger_input(void *hdl, void *start, void *end, int blksize, |
821 | void (*intr)(void *), void *intrarg, const audio_params_t *param) |
822 | { |
823 | struct auixp_codec *co; |
824 | struct auixp_softc *sc; |
825 | struct auixp_dma *chain_dma; |
826 | struct auixp_dma *sound_dma; |
827 | uint32_t blocks; |
828 | |
829 | co = (struct auixp_codec *) hdl; |
830 | sc = co->sc; |
831 | chain_dma = sc->sc_input_dma; |
832 | /* add functions to call back */ |
833 | chain_dma->intr = intr; |
834 | chain_dma->intrarg = intrarg; |
835 | |
836 | /* |
837 | * Program output DMA chain with blocks from [start...end] with |
838 | * blksize fragments. |
839 | * |
840 | * NOTE, we can assume its in one block since we asked for it to be in |
841 | * one contiguous blob; XXX change this? XXX |
842 | */ |
843 | blocks = (size_t) (((char *) end) - ((char *) start)) / blksize; |
844 | |
845 | /* lookup `start' address in our list of DMA area's */ |
846 | SLIST_FOREACH(sound_dma, &sc->sc_dma_list, dma_chain) { |
847 | if (KERNADDR(sound_dma) == start) |
848 | break; |
849 | } |
850 | |
851 | /* not ours ? then bail out */ |
852 | if (!sound_dma) { |
853 | printf("%s: auixp_trigger_input: bad sound addr %p\n" , |
854 | device_xname(sc->sc_dev), start); |
855 | return EINVAL; |
856 | } |
857 | |
858 | /* link round-robin daisychain and program hardware */ |
859 | auixp_link_daisychain(sc, chain_dma, sound_dma, blksize, blocks); |
860 | auixp_program_dma_chain(sc, chain_dma); |
861 | |
862 | /* mark we are now able to run now */ |
863 | chain_dma->running = 1; |
864 | |
865 | /* update bus-flags; XXX programs more flags XXX */ |
866 | auixp_update_busbusy(sc); |
867 | |
868 | /* callbacks happen in interrupt routine */ |
869 | return 0; |
870 | } |
871 | |
872 | |
873 | /* halt sampling audio, just disable its dma and update bus state */ |
874 | static int |
875 | auixp_halt_input(void *hdl) |
876 | { |
877 | struct auixp_codec *co; |
878 | struct auixp_softc *sc; |
879 | struct auixp_dma *dma; |
880 | |
881 | co = (struct auixp_codec *) hdl; |
882 | sc = co->sc; |
883 | dma = sc->sc_input_dma; |
884 | auixp_disable_dma(sc, dma); |
885 | |
886 | dma->running = 0; |
887 | auixp_update_busbusy(sc); |
888 | |
889 | return 0; |
890 | } |
891 | |
892 | |
893 | /* |
894 | * IXP audio interrupt handler |
895 | * |
896 | * note that we return the number of bits handled; the return value is not |
897 | * documentated but i saw it implemented in other drivers. Prolly returning a |
898 | * value > 0 means "i've dealt with it" |
899 | * |
900 | */ |
901 | static int |
902 | auixp_intr(void *softc) |
903 | { |
904 | struct auixp_softc *sc; |
905 | bus_space_tag_t iot; |
906 | bus_space_handle_t ioh; |
907 | uint32_t status, enable, detected_codecs; |
908 | int ret; |
909 | |
910 | sc = softc; |
911 | mutex_spin_enter(&sc->sc_intr_lock); |
912 | |
913 | iot = sc->sc_iot; |
914 | ioh = sc->sc_ioh; |
915 | ret = 0; |
916 | /* get status from the interrupt status register */ |
917 | status = bus_space_read_4(iot, ioh, ATI_REG_ISR); |
918 | |
919 | if (status == 0) { |
920 | mutex_spin_exit(&sc->sc_intr_lock); |
921 | return 0; |
922 | } |
923 | |
924 | DPRINTF(("%s: (status = %x)\n" , device_xname(sc->sc_dev), status)); |
925 | |
926 | /* check DMA UPDATE flags for input & output */ |
927 | if (status & ATI_REG_ISR_IN_STATUS) { |
928 | ret++; DPRINTF(("IN_STATUS\n" )); |
929 | auixp_dma_update(sc, sc->sc_input_dma); |
930 | } |
931 | if (status & ATI_REG_ISR_OUT_STATUS) { |
932 | ret++; DPRINTF(("OUT_STATUS\n" )); |
933 | auixp_dma_update(sc, sc->sc_output_dma); |
934 | } |
935 | |
936 | /* XXX XRUN flags not used/needed yet; should i implement it? XXX */ |
937 | /* acknowledge the interrupts nevertheless */ |
938 | if (status & ATI_REG_ISR_IN_XRUN) { |
939 | ret++; DPRINTF(("IN_XRUN\n" )); |
940 | /* auixp_dma_xrun(sc, sc->sc_input_dma); */ |
941 | } |
942 | if (status & ATI_REG_ISR_OUT_XRUN) { |
943 | ret++; DPRINTF(("OUT_XRUN\n" )); |
944 | /* auixp_dma_xrun(sc, sc->sc_output_dma); */ |
945 | } |
946 | |
947 | /* check if we are looking for codec detection */ |
948 | if (status & CODEC_CHECK_BITS) { |
949 | ret++; |
950 | /* mark missing codecs as not ready */ |
951 | detected_codecs = status & CODEC_CHECK_BITS; |
952 | sc->sc_codec_not_ready_bits |= detected_codecs; |
953 | |
954 | /* disable detected interrupt sources */ |
955 | enable = bus_space_read_4(iot, ioh, ATI_REG_IER); |
956 | enable &= ~detected_codecs; |
957 | bus_space_write_4(iot, ioh, ATI_REG_IER, enable); |
958 | } |
959 | |
960 | /* acknowledge interrupt sources */ |
961 | bus_space_write_4(iot, ioh, ATI_REG_ISR, status); |
962 | |
963 | mutex_spin_exit(&sc->sc_intr_lock); |
964 | return ret; |
965 | } |
966 | |
967 | |
968 | /* allocate memory for dma purposes; on failure of any of the steps, roll back */ |
969 | static int |
970 | auixp_allocmem(struct auixp_softc *sc, size_t size, |
971 | size_t align, struct auixp_dma *dma) |
972 | { |
973 | int error; |
974 | |
975 | /* remember size */ |
976 | dma->size = size; |
977 | |
978 | /* allocate DMA safe memory but in just one segment for now :( */ |
979 | error = bus_dmamem_alloc(sc->sc_dmat, dma->size, align, 0, |
980 | dma->segs, sizeof(dma->segs) / sizeof(dma->segs[0]), &dma->nsegs, |
981 | BUS_DMA_WAITOK); |
982 | if (error) |
983 | return error; |
984 | |
985 | /* |
986 | * map allocated memory into kernel virtual address space and keep it |
987 | * coherent with the CPU. |
988 | */ |
989 | error = bus_dmamem_map(sc->sc_dmat, dma->segs, dma->nsegs, dma->size, |
990 | &dma->addr, BUS_DMA_WAITOK | BUS_DMA_COHERENT); |
991 | if (error) |
992 | goto free; |
993 | |
994 | /* allocate associated dma handle and initialize it. */ |
995 | error = bus_dmamap_create(sc->sc_dmat, dma->size, 1, dma->size, 0, |
996 | BUS_DMA_WAITOK, &dma->map); |
997 | if (error) |
998 | goto unmap; |
999 | |
1000 | /* |
1001 | * load the dma handle with mappings for a dma transfer; all pages |
1002 | * need to be wired. |
1003 | */ |
1004 | error = bus_dmamap_load(sc->sc_dmat, dma->map, dma->addr, dma->size, NULL, |
1005 | BUS_DMA_WAITOK); |
1006 | if (error) |
1007 | goto destroy; |
1008 | |
1009 | return 0; |
1010 | |
1011 | destroy: |
1012 | bus_dmamap_destroy(sc->sc_dmat, dma->map); |
1013 | unmap: |
1014 | bus_dmamem_unmap(sc->sc_dmat, dma->addr, dma->size); |
1015 | free: |
1016 | bus_dmamem_free(sc->sc_dmat, dma->segs, dma->nsegs); |
1017 | |
1018 | return error; |
1019 | } |
1020 | |
1021 | |
1022 | /* undo dma mapping and release memory allocated */ |
1023 | static int |
1024 | auixp_freemem(struct auixp_softc *sc, struct auixp_dma *p) |
1025 | { |
1026 | |
1027 | bus_dmamap_unload(sc->sc_dmat, p->map); |
1028 | bus_dmamap_destroy(sc->sc_dmat, p->map); |
1029 | bus_dmamem_unmap(sc->sc_dmat, p->addr, p->size); |
1030 | bus_dmamem_free(sc->sc_dmat, p->segs, p->nsegs); |
1031 | |
1032 | return 0; |
1033 | } |
1034 | |
1035 | |
1036 | /* memory map dma memory */ |
1037 | static paddr_t |
1038 | auixp_mappage(void *hdl, void *mem, off_t off, int prot) |
1039 | { |
1040 | struct auixp_codec *co; |
1041 | struct auixp_softc *sc; |
1042 | struct auixp_dma *p; |
1043 | |
1044 | co = (struct auixp_codec *) hdl; |
1045 | sc = co->sc; |
1046 | /* for sanity */ |
1047 | if (off < 0) |
1048 | return -1; |
1049 | |
1050 | /* look up allocated DMA area */ |
1051 | SLIST_FOREACH(p, &sc->sc_dma_list, dma_chain) { |
1052 | if (KERNADDR(p) == mem) |
1053 | break; |
1054 | } |
1055 | |
1056 | /* have we found it ? */ |
1057 | if (!p) |
1058 | return -1; |
1059 | |
1060 | /* return mmap'd region */ |
1061 | return bus_dmamem_mmap(sc->sc_dmat, p->segs, p->nsegs, |
1062 | off, prot, BUS_DMA_WAITOK); |
1063 | } |
1064 | |
1065 | |
1066 | /* |
1067 | * Attachment section |
1068 | */ |
1069 | |
1070 | /* Is it my hardware? */ |
1071 | static int |
1072 | auixp_match(device_t dev, cfdata_t match, void *aux) |
1073 | { |
1074 | struct pci_attach_args *pa; |
1075 | |
1076 | pa = (struct pci_attach_args *)aux; |
1077 | switch(PCI_VENDOR(pa->pa_id)) { |
1078 | case PCI_VENDOR_ATI: |
1079 | switch(PCI_PRODUCT(pa->pa_id)) { |
1080 | case PCI_PRODUCT_ATI_IXP_AUDIO_200: |
1081 | case PCI_PRODUCT_ATI_IXP_AUDIO_300: |
1082 | case PCI_PRODUCT_ATI_IXP_AUDIO_400: |
1083 | return 1; |
1084 | } |
1085 | } |
1086 | |
1087 | return 0; |
1088 | } |
1089 | |
1090 | |
1091 | /* it is... now hook up and set up the resources we need */ |
1092 | static void |
1093 | auixp_attach(device_t parent, device_t self, void *aux) |
1094 | { |
1095 | struct auixp_softc *sc; |
1096 | struct pci_attach_args *pa; |
1097 | pcitag_t tag; |
1098 | pci_chipset_tag_t pc; |
1099 | pci_intr_handle_t ih; |
1100 | const struct auixp_card_type *card; |
1101 | const char *intrstr; |
1102 | uint32_t data; |
1103 | int error; |
1104 | char intrbuf[PCI_INTRSTR_LEN]; |
1105 | |
1106 | sc = device_private(self); |
1107 | sc->sc_dev = self; |
1108 | pa = (struct pci_attach_args *)aux; |
1109 | tag = pa->pa_tag; |
1110 | pc = pa->pa_pc; |
1111 | #ifdef DEBUG_AUIXP |
1112 | static_sc = sc; |
1113 | #endif |
1114 | |
1115 | /* print information confirming attachment */ |
1116 | pci_aprint_devinfo(pa, "Audio controller" ); |
1117 | |
1118 | /* set up details from our set of known `cards'/chips */ |
1119 | for (card = auixp_card_types; card->pci_vendor_id; card++) |
1120 | if (PCI_VENDOR(pa->pa_id) == card->pci_vendor_id && |
1121 | PCI_PRODUCT(pa->pa_id) == card->pci_product_id) { |
1122 | sc->type = card->type; |
1123 | break; |
1124 | } |
1125 | |
1126 | /* device only has 32 bit non prefetchable memory */ |
1127 | /* set MEM space access and enable the card's busmastering */ |
1128 | data = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); |
1129 | data |= (PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE); |
1130 | pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, data); |
1131 | |
1132 | /* map memory; its not sized -> what is the size? max PCI slot size? */ |
1133 | if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_MEM, 0, |
1134 | &sc->sc_iot, &sc->sc_ioh, &sc->sc_iob, &sc->sc_ios)) { |
1135 | aprint_error_dev(sc->sc_dev, "can't map memory space\n" ); |
1136 | return; |
1137 | } |
1138 | |
1139 | /* Initialize softc */ |
1140 | sc->sc_tag = tag; |
1141 | sc->sc_pct = pc; |
1142 | sc->sc_dmat = pa->pa_dmat; |
1143 | SLIST_INIT(&sc->sc_dma_list); |
1144 | |
1145 | /* get us the auixp_dma structures */ |
1146 | auixp_allocate_dma_chain(sc, &sc->sc_output_dma); |
1147 | auixp_allocate_dma_chain(sc, &sc->sc_input_dma); |
1148 | |
1149 | /* when that fails we are dead in the water */ |
1150 | if (!sc->sc_output_dma || !sc->sc_input_dma) |
1151 | return; |
1152 | |
1153 | #if 0 |
1154 | /* could preliminary program DMA chain */ |
1155 | auixp_program_dma_chain(sc, sc->sc_output_dma); |
1156 | auixp_program_dma_chain(sc, sc->sc_input_dma); |
1157 | #endif |
1158 | |
1159 | /* map interrupt on the pci bus */ |
1160 | if (pci_intr_map(pa, &ih)) { |
1161 | aprint_error_dev(sc->sc_dev, "can't map interrupt\n" ); |
1162 | return; |
1163 | } |
1164 | |
1165 | /* where are we connected at ? */ |
1166 | intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); |
1167 | |
1168 | mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); |
1169 | mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO); |
1170 | |
1171 | /* establish interrupt routine hookup at IPL_AUDIO level */ |
1172 | sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, auixp_intr, self); |
1173 | if (sc->sc_ih == NULL) { |
1174 | aprint_error_dev(sc->sc_dev, "can't establish interrupt" ); |
1175 | if (intrstr != NULL) |
1176 | aprint_error(" at %s" , intrstr); |
1177 | aprint_error("\n" ); |
1178 | return; |
1179 | } |
1180 | aprint_normal_dev(sc->sc_dev, "interrupting at %s\n" , intrstr); |
1181 | |
1182 | /* power up chip */ |
1183 | if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self, |
1184 | pci_activate_null)) && error != EOPNOTSUPP) { |
1185 | aprint_error_dev(sc->sc_dev, "cannot activate %d\n" , |
1186 | error); |
1187 | return; |
1188 | } |
1189 | |
1190 | /* init chip */ |
1191 | if (auixp_init(sc) == -1) { |
1192 | aprint_error_dev(sc->sc_dev, |
1193 | "auixp_attach: unable to initialize the card\n" ); |
1194 | return; |
1195 | } |
1196 | |
1197 | if (!pmf_device_register(self, NULL, auixp_resume)) |
1198 | aprint_error_dev(self, "couldn't establish power handler\n" ); |
1199 | |
1200 | /* |
1201 | * delay further configuration of codecs and audio after interrupts |
1202 | * are enabled. |
1203 | */ |
1204 | config_interrupts(self, auixp_post_config); |
1205 | } |
1206 | |
1207 | |
1208 | /* called from autoconfigure system when interrupts are enabled */ |
1209 | static void |
1210 | auixp_post_config(device_t self) |
1211 | { |
1212 | struct auixp_softc *sc; |
1213 | struct auixp_codec *codec; |
1214 | int codec_nr; |
1215 | int res, i; |
1216 | |
1217 | sc = device_private(self); |
1218 | /* detect the AC97 codecs */ |
1219 | auixp_autodetect_codecs(sc); |
1220 | |
1221 | /* setup audio translation formats : following codec0 (!) */ |
1222 | codec = &sc->sc_codec[0]; |
1223 | if (!codec->present) { |
1224 | /* nothing??? then invalidate all formats */ |
1225 | for (i = 0; i < AUIXP_NFORMATS; i++) { |
1226 | AUFMT_INVALIDATE(&sc->sc_formats[i]); |
1227 | } |
1228 | return; |
1229 | } |
1230 | |
1231 | /* copy formats and invalidate entries not suitable for codec0 */ |
1232 | memcpy(sc->sc_formats, auixp_formats, sizeof(auixp_formats)); |
1233 | mutex_enter(&sc->sc_lock); |
1234 | sc->has_4ch = AC97_IS_4CH(codec->codec_if); |
1235 | sc->has_6ch = AC97_IS_6CH(codec->codec_if); |
1236 | sc->is_fixed = AC97_IS_FIXED_RATE(codec->codec_if); |
1237 | sc->has_spdif = AC97_HAS_SPDIF(codec->codec_if); |
1238 | mutex_exit(&sc->sc_lock); |
1239 | |
1240 | for (i = 0; i < AUIXP_NFORMATS; i++) { |
1241 | if (sc->is_fixed) { |
1242 | sc->sc_formats[i].frequency_type = 1; |
1243 | sc->sc_formats[i].frequency[0] = 48000; |
1244 | } |
1245 | switch (sc->sc_formats[i].channels) { |
1246 | case 4 : |
1247 | if (sc->has_4ch) |
1248 | break; |
1249 | AUFMT_INVALIDATE(&sc->sc_formats[i]); |
1250 | break; |
1251 | case 6 : |
1252 | if (sc->has_6ch) |
1253 | break; |
1254 | AUFMT_INVALIDATE(&sc->sc_formats[i]); |
1255 | break; |
1256 | default : |
1257 | break; |
1258 | } |
1259 | } |
1260 | |
1261 | /* |
1262 | * Create all encodings (and/or -translations) based on the formats |
1263 | * supported. */ |
1264 | res = auconv_create_encodings(sc->sc_formats, AUIXP_NFORMATS, |
1265 | &sc->sc_encodings); |
1266 | if (res) { |
1267 | printf("%s: auconv_create_encodings failed; " |
1268 | "no attachments\n" , device_xname(sc->sc_dev)); |
1269 | return; |
1270 | } |
1271 | |
1272 | if (sc->has_spdif) { |
1273 | aprint_normal_dev(sc->sc_dev, "codec spdif support detected but disabled " |
1274 | "for now\n" ); |
1275 | sc->has_spdif = 0; |
1276 | } |
1277 | |
1278 | /* fill in the missing details about the dma channels. */ |
1279 | /* for output */ |
1280 | sc->sc_output_dma->linkptr = ATI_REG_OUT_DMA_LINKPTR; |
1281 | sc->sc_output_dma->dma_enable_bit = ATI_REG_CMD_OUT_DMA_EN | |
1282 | ATI_REG_CMD_SEND_EN; |
1283 | /* have spdif? then this too! XXX not seeing LED yet! XXX */ |
1284 | if (sc->has_spdif) |
1285 | sc->sc_output_dma->dma_enable_bit |= ATI_REG_CMD_SPDF_OUT_EN; |
1286 | |
1287 | /* and for input */ |
1288 | sc->sc_input_dma->linkptr = ATI_REG_IN_DMA_LINKPTR; |
1289 | sc->sc_input_dma->dma_enable_bit = ATI_REG_CMD_IN_DMA_EN | |
1290 | ATI_REG_CMD_RECEIVE_EN; |
1291 | |
1292 | /* attach audio devices for all detected codecs */ |
1293 | /* XXX wise? look at other multiple-codec able chipsets XXX */ |
1294 | for (codec_nr = 0; codec_nr < ATI_IXP_CODECS; codec_nr++) { |
1295 | codec = &sc->sc_codec[codec_nr]; |
1296 | if (codec->present) |
1297 | audio_attach_mi(&auixp_hw_if, codec, sc->sc_dev); |
1298 | } |
1299 | |
1300 | /* done! now enable all interrupts we can service */ |
1301 | auixp_enable_interrupts(sc); |
1302 | } |
1303 | |
1304 | static void |
1305 | auixp_enable_interrupts(struct auixp_softc *sc) |
1306 | { |
1307 | bus_space_tag_t iot; |
1308 | bus_space_handle_t ioh; |
1309 | uint32_t value; |
1310 | |
1311 | iot = sc->sc_iot; |
1312 | ioh = sc->sc_ioh; |
1313 | |
1314 | mutex_spin_enter(&sc->sc_intr_lock); |
1315 | |
1316 | /* clear all pending */ |
1317 | bus_space_write_4(iot, ioh, ATI_REG_ISR, 0xffffffff); |
1318 | |
1319 | /* enable all relevant interrupt sources we can handle */ |
1320 | value = bus_space_read_4(iot, ioh, ATI_REG_IER); |
1321 | |
1322 | value |= ATI_REG_IER_IO_STATUS_EN; |
1323 | #ifdef notyet |
1324 | value |= ATI_REG_IER_IN_XRUN_EN; |
1325 | value |= ATI_REG_IER_OUT_XRUN_EN; |
1326 | |
1327 | value |= ATI_REG_IER_SPDIF_XRUN_EN; |
1328 | value |= ATI_REG_IER_SPDF_STATUS_EN; |
1329 | #endif |
1330 | |
1331 | bus_space_write_4(iot, ioh, ATI_REG_IER, value); |
1332 | |
1333 | mutex_spin_exit(&sc->sc_intr_lock); |
1334 | } |
1335 | |
1336 | |
1337 | static void |
1338 | auixp_disable_interrupts(struct auixp_softc *sc) |
1339 | { |
1340 | bus_space_tag_t iot; |
1341 | bus_space_handle_t ioh; |
1342 | |
1343 | iot = sc->sc_iot; |
1344 | ioh = sc->sc_ioh; |
1345 | |
1346 | mutex_spin_enter(&sc->sc_intr_lock); |
1347 | |
1348 | /* disable all interrupt sources */ |
1349 | bus_space_write_4(iot, ioh, ATI_REG_IER, 0); |
1350 | |
1351 | /* clear all pending */ |
1352 | bus_space_write_4(iot, ioh, ATI_REG_ISR, 0xffffffff); |
1353 | |
1354 | mutex_spin_exit(&sc->sc_intr_lock); |
1355 | } |
1356 | |
1357 | |
1358 | /* dismantle what we've set up by undoing setup */ |
1359 | static int |
1360 | auixp_detach(device_t self, int flags) |
1361 | { |
1362 | struct auixp_softc *sc; |
1363 | |
1364 | sc = device_private(self); |
1365 | /* XXX shouldn't we just reset the chip? XXX */ |
1366 | /* |
1367 | * should we explicitly disable interrupt generation and acknowledge |
1368 | * what's left on? better be safe than sorry. |
1369 | */ |
1370 | auixp_disable_interrupts(sc); |
1371 | |
1372 | /* tear down .... */ |
1373 | config_detach(sc->sc_dev, flags); /* XXX OK? XXX */ |
1374 | pmf_device_deregister(self); |
1375 | |
1376 | if (sc->sc_ih != NULL) |
1377 | pci_intr_disestablish(sc->sc_pct, sc->sc_ih); |
1378 | if (sc->sc_ios) |
1379 | bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios); |
1380 | |
1381 | mutex_destroy(&sc->sc_lock); |
1382 | mutex_destroy(&sc->sc_intr_lock); |
1383 | |
1384 | return 0; |
1385 | } |
1386 | |
1387 | |
1388 | /* |
1389 | * codec handling |
1390 | * |
1391 | * IXP audio support can have upto 3 codecs! are they chained ? or |
1392 | * alternative outlets with the same audio feed i.e. with different mixer |
1393 | * settings? XXX does NetBSD support more than one audio codec? XXX |
1394 | */ |
1395 | |
1396 | |
1397 | static int |
1398 | auixp_attach_codec(void *aux, struct ac97_codec_if *codec_if) |
1399 | { |
1400 | struct auixp_codec *ixp_codec; |
1401 | |
1402 | ixp_codec = aux; |
1403 | ixp_codec->codec_if = codec_if; |
1404 | ixp_codec->present = 1; |
1405 | |
1406 | return 0; |
1407 | } |
1408 | |
1409 | |
1410 | static int |
1411 | auixp_read_codec(void *aux, uint8_t reg, uint16_t *result) |
1412 | { |
1413 | struct auixp_codec *co; |
1414 | struct auixp_softc *sc; |
1415 | bus_space_tag_t iot; |
1416 | bus_space_handle_t ioh; |
1417 | uint32_t data; |
1418 | int timeout; |
1419 | |
1420 | co = aux; |
1421 | sc = co->sc; |
1422 | iot = sc->sc_iot; |
1423 | ioh = sc->sc_ioh; |
1424 | if (auixp_wait_for_codecs(sc, "read_codec" )) |
1425 | return 0xffff; |
1426 | |
1427 | /* build up command for reading codec register */ |
1428 | data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) | |
1429 | ATI_REG_PHYS_OUT_ADDR_EN | |
1430 | ATI_REG_PHYS_OUT_RW | |
1431 | co->codec_nr; |
1432 | |
1433 | bus_space_write_4(iot, ioh, ATI_REG_PHYS_OUT_ADDR, data); |
1434 | |
1435 | if (auixp_wait_for_codecs(sc, "read_codec" )) |
1436 | return 0xffff; |
1437 | |
1438 | /* wait until codec info is clocked in */ |
1439 | timeout = 500; /* 500*2 usec -> 0.001 sec */ |
1440 | do { |
1441 | data = bus_space_read_4(iot, ioh, ATI_REG_PHYS_IN_ADDR); |
1442 | if (data & ATI_REG_PHYS_IN_READ_FLAG) { |
1443 | DPRINTF(("read ac'97 codec reg 0x%x = 0x%08x\n" , |
1444 | reg, data >> ATI_REG_PHYS_IN_DATA_SHIFT) |
1445 | ); |
1446 | *result = data >> ATI_REG_PHYS_IN_DATA_SHIFT; |
1447 | return 0; |
1448 | } |
1449 | DELAY(2); |
1450 | timeout--; |
1451 | } while (timeout > 0); |
1452 | |
1453 | if (reg < 0x7c) |
1454 | printf("%s: codec read timeout! (reg %x)\n" , |
1455 | device_xname(sc->sc_dev), reg); |
1456 | |
1457 | return 0xffff; |
1458 | } |
1459 | |
1460 | |
1461 | static int |
1462 | auixp_write_codec(void *aux, uint8_t reg, uint16_t data) |
1463 | { |
1464 | struct auixp_codec *co; |
1465 | struct auixp_softc *sc; |
1466 | bus_space_tag_t iot; |
1467 | bus_space_handle_t ioh; |
1468 | uint32_t value; |
1469 | |
1470 | DPRINTF(("write ac'97 codec reg 0x%x = 0x%08x\n" , reg, data)); |
1471 | co = aux; |
1472 | sc = co->sc; |
1473 | iot = sc->sc_iot; |
1474 | ioh = sc->sc_ioh; |
1475 | if (auixp_wait_for_codecs(sc, "write_codec" )) |
1476 | return -1; |
1477 | |
1478 | /* build up command for writing codec register */ |
1479 | value = (((uint32_t) data) << ATI_REG_PHYS_OUT_DATA_SHIFT) | |
1480 | (((uint32_t) reg) << ATI_REG_PHYS_OUT_ADDR_SHIFT) | |
1481 | ATI_REG_PHYS_OUT_ADDR_EN | |
1482 | co->codec_nr; |
1483 | |
1484 | bus_space_write_4(iot, ioh, ATI_REG_PHYS_OUT_ADDR, value); |
1485 | |
1486 | return 0; |
1487 | } |
1488 | |
1489 | |
1490 | static int |
1491 | auixp_reset_codec(void *aux) |
1492 | { |
1493 | |
1494 | /* nothing to be done? */ |
1495 | return 0; |
1496 | } |
1497 | |
1498 | |
1499 | static enum ac97_host_flags |
1500 | auixp_flags_codec(void *aux) |
1501 | { |
1502 | struct auixp_codec *ixp_codec; |
1503 | |
1504 | ixp_codec = aux; |
1505 | return ixp_codec->codec_flags; |
1506 | } |
1507 | |
1508 | |
1509 | static int |
1510 | auixp_wait_for_codecs(struct auixp_softc *sc, const char *func) |
1511 | { |
1512 | bus_space_tag_t iot; |
1513 | bus_space_handle_t ioh; |
1514 | uint32_t value; |
1515 | int timeout; |
1516 | |
1517 | iot = sc->sc_iot; |
1518 | ioh = sc->sc_ioh; |
1519 | /* wait until all codec transfers are done */ |
1520 | timeout = 500; /* 500*2 usec -> 0.001 sec */ |
1521 | do { |
1522 | value = bus_space_read_4(iot, ioh, ATI_REG_PHYS_OUT_ADDR); |
1523 | if ((value & ATI_REG_PHYS_OUT_ADDR_EN) == 0) |
1524 | return 0; |
1525 | |
1526 | DELAY(2); |
1527 | timeout--; |
1528 | } while (timeout > 0); |
1529 | |
1530 | printf("%s: %s: timed out\n" , func, device_xname(sc->sc_dev)); |
1531 | return -1; |
1532 | } |
1533 | |
1534 | |
1535 | |
1536 | static void |
1537 | auixp_autodetect_codecs(struct auixp_softc *sc) |
1538 | { |
1539 | bus_space_tag_t iot; |
1540 | bus_space_handle_t ioh; |
1541 | struct auixp_codec *codec; |
1542 | int timeout, codec_nr; |
1543 | |
1544 | iot = sc->sc_iot; |
1545 | ioh = sc->sc_ioh; |
1546 | /* ATI IXP can have upto 3 codecs; mark all codecs as not existing */ |
1547 | sc->sc_codec_not_ready_bits = 0; |
1548 | sc->sc_num_codecs = 0; |
1549 | |
1550 | /* enable all codecs to interrupt as well as the new frame interrupt */ |
1551 | bus_space_write_4(iot, ioh, ATI_REG_IER, CODEC_CHECK_BITS); |
1552 | |
1553 | /* wait for the interrupts to happen */ |
1554 | timeout = 100; /* 100.000 usec -> 0.1 sec */ |
1555 | |
1556 | while (timeout > 0) { |
1557 | DELAY(1000); |
1558 | if (sc->sc_codec_not_ready_bits) |
1559 | break; |
1560 | timeout--; |
1561 | } |
1562 | |
1563 | if (timeout == 0) |
1564 | printf("%s: WARNING: timeout during codec detection; " |
1565 | "codecs might be present but haven't interrupted\n" , |
1566 | device_xname(sc->sc_dev)); |
1567 | |
1568 | /* disable all interrupts for now */ |
1569 | auixp_disable_interrupts(sc); |
1570 | |
1571 | /* Attach AC97 host interfaces */ |
1572 | for (codec_nr = 0; codec_nr < ATI_IXP_CODECS; codec_nr++) { |
1573 | codec = &sc->sc_codec[codec_nr]; |
1574 | memset(codec, 0, sizeof(struct auixp_codec)); |
1575 | |
1576 | codec->sc = sc; |
1577 | codec->codec_nr = codec_nr; |
1578 | codec->present = 0; |
1579 | |
1580 | codec->host_if.arg = codec; |
1581 | codec->host_if.attach = auixp_attach_codec; |
1582 | codec->host_if.read = auixp_read_codec; |
1583 | codec->host_if.write = auixp_write_codec; |
1584 | codec->host_if.reset = auixp_reset_codec; |
1585 | codec->host_if.flags = auixp_flags_codec; |
1586 | } |
1587 | |
1588 | if (!(sc->sc_codec_not_ready_bits & ATI_REG_ISR_CODEC0_NOT_READY)) { |
1589 | /* codec 0 present */ |
1590 | DPRINTF(("auixp : YAY! codec 0 present!\n" )); |
1591 | if (ac97_attach(&sc->sc_codec[0].host_if, sc->sc_dev, |
1592 | &sc->sc_lock) == 0) |
1593 | sc->sc_num_codecs++; |
1594 | } |
1595 | |
1596 | if (!(sc->sc_codec_not_ready_bits & ATI_REG_ISR_CODEC1_NOT_READY)) { |
1597 | /* codec 1 present */ |
1598 | DPRINTF(("auixp : YAY! codec 1 present!\n" )); |
1599 | if (ac97_attach(&sc->sc_codec[1].host_if, sc->sc_dev, |
1600 | &sc->sc_lock) == 0) |
1601 | sc->sc_num_codecs++; |
1602 | } |
1603 | |
1604 | if (!(sc->sc_codec_not_ready_bits & ATI_REG_ISR_CODEC2_NOT_READY)) { |
1605 | /* codec 2 present */ |
1606 | DPRINTF(("auixp : YAY! codec 2 present!\n" )); |
1607 | if (ac97_attach(&sc->sc_codec[2].host_if, sc->sc_dev, |
1608 | &sc->sc_lock) == 0) |
1609 | sc->sc_num_codecs++; |
1610 | } |
1611 | |
1612 | if (sc->sc_num_codecs == 0) { |
1613 | printf("%s: no codecs detected or " |
1614 | "no codecs managed to initialise\n" , |
1615 | device_xname(sc->sc_dev)); |
1616 | return; |
1617 | } |
1618 | |
1619 | } |
1620 | |
1621 | |
1622 | |
1623 | /* initialisation routines */ |
1624 | |
1625 | static void |
1626 | auixp_disable_dma(struct auixp_softc *sc, struct auixp_dma *dma) |
1627 | { |
1628 | bus_space_tag_t iot; |
1629 | bus_space_handle_t ioh; |
1630 | uint32_t value; |
1631 | |
1632 | iot = sc->sc_iot; |
1633 | ioh = sc->sc_ioh; |
1634 | /* lets not stress the DMA engine more than nessisary */ |
1635 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1636 | if (value & dma->dma_enable_bit) { |
1637 | value &= ~dma->dma_enable_bit; |
1638 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
1639 | } |
1640 | } |
1641 | |
1642 | |
1643 | static void |
1644 | auixp_enable_dma(struct auixp_softc *sc, struct auixp_dma *dma) |
1645 | { |
1646 | bus_space_tag_t iot; |
1647 | bus_space_handle_t ioh; |
1648 | uint32_t value; |
1649 | |
1650 | iot = sc->sc_iot; |
1651 | ioh = sc->sc_ioh; |
1652 | /* lets not stress the DMA engine more than nessisary */ |
1653 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1654 | if (!(value & dma->dma_enable_bit)) { |
1655 | value |= dma->dma_enable_bit; |
1656 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
1657 | } |
1658 | } |
1659 | |
1660 | |
1661 | static void |
1662 | auixp_reset_aclink(struct auixp_softc *sc) |
1663 | { |
1664 | bus_space_tag_t iot; |
1665 | bus_space_handle_t ioh; |
1666 | uint32_t value, timeout; |
1667 | |
1668 | iot = sc->sc_iot; |
1669 | ioh = sc->sc_ioh; |
1670 | |
1671 | /* if power is down, power it up */ |
1672 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1673 | if (value & ATI_REG_CMD_POWERDOWN) { |
1674 | printf("%s: powering up\n" , device_xname(sc->sc_dev)); |
1675 | |
1676 | /* explicitly enable power */ |
1677 | value &= ~ATI_REG_CMD_POWERDOWN; |
1678 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
1679 | |
1680 | /* have to wait at least 10 usec for it to initialise */ |
1681 | DELAY(20); |
1682 | }; |
1683 | |
1684 | printf("%s: soft resetting aclink\n" , device_xname(sc->sc_dev)); |
1685 | |
1686 | /* perform a soft reset */ |
1687 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1688 | value |= ATI_REG_CMD_AC_SOFT_RESET; |
1689 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
1690 | |
1691 | /* need to read the CMD reg and wait aprox. 10 usec to init */ |
1692 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1693 | DELAY(20); |
1694 | |
1695 | /* clear soft reset flag again */ |
1696 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1697 | value &= ~ATI_REG_CMD_AC_SOFT_RESET; |
1698 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
1699 | |
1700 | /* check if the ac-link is working; reset device otherwise */ |
1701 | timeout = 10; |
1702 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1703 | while (!(value & ATI_REG_CMD_ACLINK_ACTIVE)) { |
1704 | printf("%s: not up; resetting aclink hardware\n" , |
1705 | device_xname(sc->sc_dev)); |
1706 | |
1707 | /* dip aclink reset but keep the acsync */ |
1708 | value &= ~ATI_REG_CMD_AC_RESET; |
1709 | value |= ATI_REG_CMD_AC_SYNC; |
1710 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
1711 | |
1712 | /* need to read CMD again and wait again (clocking in issue?) */ |
1713 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1714 | DELAY(20); |
1715 | |
1716 | /* assert aclink reset again */ |
1717 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1718 | value |= ATI_REG_CMD_AC_RESET; |
1719 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
1720 | |
1721 | /* check if its active now */ |
1722 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1723 | |
1724 | timeout--; |
1725 | if (timeout == 0) break; |
1726 | }; |
1727 | |
1728 | if (timeout == 0) { |
1729 | printf("%s: giving up aclink reset\n" , device_xname(sc->sc_dev)); |
1730 | }; |
1731 | if (timeout != 10) { |
1732 | printf("%s: aclink hardware reset successful\n" , |
1733 | device_xname(sc->sc_dev)); |
1734 | }; |
1735 | |
1736 | /* assert reset and sync for safety */ |
1737 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1738 | value |= ATI_REG_CMD_AC_SYNC | ATI_REG_CMD_AC_RESET; |
1739 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
1740 | } |
1741 | |
1742 | |
1743 | /* chip hard init */ |
1744 | static int |
1745 | auixp_init(struct auixp_softc *sc) |
1746 | { |
1747 | bus_space_tag_t iot; |
1748 | bus_space_handle_t ioh; |
1749 | uint32_t value; |
1750 | |
1751 | iot = sc->sc_iot; |
1752 | ioh = sc->sc_ioh; |
1753 | /* disable all interrupts and clear all sources */ |
1754 | auixp_disable_interrupts(sc); |
1755 | |
1756 | /* clear all DMA enables (preserving rest of settings) */ |
1757 | value = bus_space_read_4(iot, ioh, ATI_REG_CMD); |
1758 | value &= ~( ATI_REG_CMD_IN_DMA_EN | |
1759 | ATI_REG_CMD_OUT_DMA_EN | |
1760 | ATI_REG_CMD_SPDF_OUT_EN ); |
1761 | bus_space_write_4(iot, ioh, ATI_REG_CMD, value); |
1762 | |
1763 | /* Reset AC-link */ |
1764 | auixp_reset_aclink(sc); |
1765 | |
1766 | /* |
1767 | * codecs get auto-detected later |
1768 | * |
1769 | * note: we are NOT enabling interrupts yet, no codecs have been |
1770 | * detected yet nor is anything else set up |
1771 | */ |
1772 | |
1773 | return 0; |
1774 | } |
1775 | |
1776 | static bool |
1777 | auixp_resume(device_t dv, const pmf_qual_t *qual) |
1778 | { |
1779 | struct auixp_softc *sc = device_private(dv); |
1780 | |
1781 | mutex_enter(&sc->sc_lock); |
1782 | auixp_reset_codec(sc); |
1783 | delay(1000); |
1784 | (sc->sc_codec[0].codec_if->vtbl->restore_ports)(sc->sc_codec[0].codec_if); |
1785 | mutex_exit(&sc->sc_lock); |
1786 | |
1787 | return true; |
1788 | } |
1789 | |
1790 | #ifdef DEBUG_AUIXP |
1791 | |
1792 | static void |
1793 | auixp_dumpreg(void) |
1794 | { |
1795 | struct auixp_softc *sc; |
1796 | bus_space_tag_t iot; |
1797 | bus_space_handle_t ioh; |
1798 | int i; |
1799 | |
1800 | sc = static_sc; |
1801 | iot = sc->sc_iot; |
1802 | ioh = sc->sc_ioh; |
1803 | printf("%s register dump:\n" , device_xname(sc->sc_dev)); |
1804 | for (i = 0; i < 256; i+=4) { |
1805 | printf("\t0x%02x: 0x%08x\n" , i, bus_space_read_4(iot, ioh, i)); |
1806 | } |
1807 | printf("\n" ); |
1808 | } |
1809 | #endif |
1810 | |
1811 | static void |
1812 | auixp_get_locks(void *addr, kmutex_t **intr, kmutex_t **proc) |
1813 | { |
1814 | struct auixp_codec *co = addr; |
1815 | struct auixp_softc *sc = co->sc; |
1816 | |
1817 | *intr = &sc->sc_intr_lock; |
1818 | *proc = &sc->sc_lock; |
1819 | } |
1820 | |