1/* $NetBSD: if_hme_pci.c,v 1.37 2014/03/29 19:28:24 christos Exp $ */
2
3/*
4 * Copyright (c) 2000 Matthew R. Green
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29/*
30 * PCI front-end device driver for the HME ethernet device.
31 */
32
33#include <sys/cdefs.h>
34__KERNEL_RCSID(0, "$NetBSD: if_hme_pci.c,v 1.37 2014/03/29 19:28:24 christos Exp $");
35
36#include <sys/param.h>
37#include <sys/systm.h>
38#include <sys/syslog.h>
39#include <sys/device.h>
40#include <sys/malloc.h>
41#include <sys/socket.h>
42
43#include <net/if.h>
44#include <net/if_dl.h>
45#include <net/if_ether.h>
46#include <net/if_media.h>
47
48#include <dev/mii/mii.h>
49#include <dev/mii/miivar.h>
50
51#include <sys/intr.h>
52
53#include <dev/pci/pcivar.h>
54#include <dev/pci/pcireg.h>
55#include <dev/pci/pcidevs.h>
56
57#include <dev/ic/hmevar.h>
58
59#define PCI_HME_BASEADDR PCI_BAR(0)
60
61struct hme_pci_softc {
62 struct hme_softc hsc_hme; /* HME device */
63 bus_space_tag_t hsc_memt;
64 bus_space_handle_t hsc_memh;
65 void *hsc_ih;
66};
67
68int hmematch_pci(device_t, cfdata_t, void *);
69void hmeattach_pci(device_t, device_t, void *);
70
71CFATTACH_DECL_NEW(hme_pci, sizeof(struct hme_pci_softc),
72 hmematch_pci, hmeattach_pci, NULL, NULL);
73
74int
75hmematch_pci(device_t parent, cfdata_t cf, void *aux)
76{
77 struct pci_attach_args *pa = aux;
78
79 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN &&
80 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_HMENETWORK)
81 return (1);
82
83 return (0);
84}
85
86static inline int
87hmepromvalid(uint8_t* buf)
88{
89 return buf[0] == 0x18 && buf[1] == 0x00 && /* structure length */
90 buf[2] == 0x00 && /* revision */
91 (buf[3] == 0x00 || /* hme */
92 buf[3] == 0x80) && /* qfe */
93 buf[4] == PCI_SUBCLASS_NETWORK_ETHERNET && /* subclass code */
94 buf[5] == PCI_CLASS_NETWORK; /* class code */
95}
96
97static inline int
98hmevpdoff(bus_space_tag_t romt, bus_space_handle_t romh, int vpdoff, int dev)
99{
100#define VPDLEN (3 + sizeof(struct pci_vpd) + ETHER_ADDR_LEN)
101 if (bus_space_read_1(romt, romh, vpdoff + VPDLEN) != 0x79 &&
102 bus_space_read_1(romt, romh, vpdoff + 4 * VPDLEN) == 0x79) {
103 /*
104 * Use the Nth NA for the Nth HME on
105 * this SUNW,qfe.
106 */
107 vpdoff += dev * VPDLEN;
108 }
109 return vpdoff;
110}
111
112void
113hmeattach_pci(device_t parent, device_t self, void *aux)
114{
115 struct pci_attach_args *pa = aux;
116 struct hme_pci_softc *hsc = device_private(self);
117 struct hme_softc *sc = &hsc->hsc_hme;
118 pci_intr_handle_t ih;
119 pcireg_t csr;
120 const char *intrstr;
121 int type;
122 struct pci_attach_args ebus_pa;
123 prop_data_t eaddrprop;
124 pcireg_t ebus_cl, ebus_id;
125 uint8_t *enaddr;
126 bus_space_tag_t romt;
127 bus_space_handle_t romh;
128 bus_size_t romsize;
129 uint8_t buf[64];
130 int dataoff, vpdoff;
131 struct pci_vpd *vpd;
132 static const uint8_t promhdr[] = { 0x55, 0xaa };
133#define PROMHDR_PTR_DATA 0x18
134 static const uint8_t promdat[] = {
135 0x50, 0x43, 0x49, 0x52, /* "PCIR" */
136 PCI_VENDOR_SUN & 0xff, PCI_VENDOR_SUN >> 8,
137 PCI_PRODUCT_SUN_HMENETWORK & 0xff,
138 PCI_PRODUCT_SUN_HMENETWORK >> 8
139 };
140#define PROMDATA_PTR_VPD 0x08
141#define PROMDATA_DATA2 0x0a
142 char intrbuf[PCI_INTRSTR_LEN];
143
144 sc->sc_dev = self;
145
146 aprint_normal(": Sun Happy Meal Ethernet, rev. %d\n",
147 PCI_REVISION(pa->pa_class));
148 aprint_naive(": Ethernet controller\n");
149
150 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
151 type = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_HME_BASEADDR);
152
153 /*
154 * enable io/memory-space accesses. this is kinda of gross; but
155 * the hme comes up with neither IO space enabled, or memory space.
156 */
157 switch (type) {
158 case PCI_MAPREG_TYPE_MEM:
159 csr |= PCI_COMMAND_MEM_ENABLE;
160 sc->sc_bustag = pa->pa_memt;
161 break;
162 case PCI_MAPREG_TYPE_IO:
163 csr |= PCI_COMMAND_IO_ENABLE;
164 sc->sc_bustag = pa->pa_iot;
165 break;
166 }
167 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
168 csr | PCI_COMMAND_MEM_ENABLE);
169
170 sc->sc_dmatag = pa->pa_dmat;
171
172 sc->sc_pci = 1; /* XXXXX should all be done in bus_dma. */
173 /*
174 * Map five register banks:
175 *
176 * bank 0: HME SEB registers: +0x0000
177 * bank 1: HME ETX registers: +0x2000
178 * bank 2: HME ERX registers: +0x4000
179 * bank 3: HME MAC registers: +0x6000
180 * bank 4: HME MIF registers: +0x7000
181 *
182 */
183
184 if (pci_mapreg_map(pa, PCI_HME_BASEADDR, type, 0,
185 &hsc->hsc_memt, &hsc->hsc_memh, NULL, NULL) != 0) {
186 aprint_error_dev(self, "unable to map device registers\n");
187 return;
188 }
189 sc->sc_seb = hsc->hsc_memh;
190 if (bus_space_subregion(hsc->hsc_memt, hsc->hsc_memh, 0x2000,
191 0x1000, &sc->sc_etx)) {
192 aprint_error_dev(self, "unable to subregion ETX registers\n");
193 return;
194 }
195 if (bus_space_subregion(hsc->hsc_memt, hsc->hsc_memh, 0x4000,
196 0x1000, &sc->sc_erx)) {
197 aprint_error_dev(self, "unable to subregion ERX registers\n");
198 return;
199 }
200 if (bus_space_subregion(hsc->hsc_memt, hsc->hsc_memh, 0x6000,
201 0x1000, &sc->sc_mac)) {
202 aprint_error_dev(self, "unable to subregion MAC registers\n");
203 return;
204 }
205 if (bus_space_subregion(hsc->hsc_memt, hsc->hsc_memh, 0x7000,
206 0x1000, &sc->sc_mif)) {
207 aprint_error_dev(self, "unable to subregion MIF registers\n");
208 return;
209 }
210
211
212 /*
213 * Check if we got a mac-address property passed
214 */
215 eaddrprop = prop_dictionary_get(device_properties(self), "mac-address");
216
217 if (eaddrprop != NULL && prop_data_size(eaddrprop) == ETHER_ADDR_LEN) {
218 memcpy(&sc->sc_enaddr, prop_data_data_nocopy(eaddrprop),
219 ETHER_ADDR_LEN);
220 goto got_eaddr;
221 }
222
223 /*
224 * Dig out VPD (vital product data) and acquire Ethernet address.
225 * The VPD of hme resides in the Boot PROM (PCI FCode) attached
226 * to the EBus interface.
227 */
228 /*
229 * ``Writing FCode 3.x Programs'' (newer ones, dated 1997 and later)
230 * chapter 2 describes the data structure.
231 */
232
233 enaddr = NULL;
234
235 /* get a PCI tag for the EBus bridge (function 0 of the same device) */
236 ebus_pa = *pa;
237 ebus_pa.pa_tag = pci_make_tag(pa->pa_pc, pa->pa_bus, pa->pa_device, 0);
238
239 ebus_cl = pci_conf_read(ebus_pa.pa_pc, ebus_pa.pa_tag, PCI_CLASS_REG);
240 ebus_id = pci_conf_read(ebus_pa.pa_pc, ebus_pa.pa_tag, PCI_ID_REG);
241
242#define PCI_EBUS2_BOOTROM 0x10
243 if (PCI_CLASS(ebus_cl) == PCI_CLASS_BRIDGE &&
244 PCI_PRODUCT(ebus_id) == PCI_PRODUCT_SUN_EBUS &&
245 pci_mapreg_map(&ebus_pa, PCI_EBUS2_BOOTROM, PCI_MAPREG_TYPE_MEM,
246 BUS_SPACE_MAP_CACHEABLE | BUS_SPACE_MAP_PREFETCHABLE,
247 &romt, &romh, 0, &romsize) == 0) {
248
249 /* read PCI Expansion PROM Header */
250 bus_space_read_region_1(romt, romh, 0, buf, sizeof buf);
251 if (memcmp(buf, promhdr, sizeof promhdr) == 0 &&
252 (dataoff = (buf[PROMHDR_PTR_DATA] |
253 (buf[PROMHDR_PTR_DATA + 1] << 8))) >= 0x1c) {
254
255 /* read PCI Expansion PROM Data */
256 bus_space_read_region_1(romt, romh, dataoff,
257 buf, sizeof buf);
258 if (memcmp(buf, promdat, sizeof promdat) == 0 &&
259 hmepromvalid(buf + PROMDATA_DATA2) &&
260 (vpdoff = (buf[PROMDATA_PTR_VPD] |
261 (buf[PROMDATA_PTR_VPD + 1] << 8))) >= 0x1c) {
262
263 /*
264 * The VPD of hme is not in PCI 2.2 standard
265 * format. The length in the resource header
266 * is in big endian, and resources are not
267 * properly terminated (only one resource
268 * and no end tag).
269 */
270 vpdoff = hmevpdoff(romt, romh, vpdoff,
271 pa->pa_device);
272 /* read PCI VPD */
273 bus_space_read_region_1(romt, romh,
274 vpdoff, buf, sizeof buf);
275 vpd = (void *)(buf + 3);
276 if (PCI_VPDRES_ISLARGE(buf[0]) &&
277 PCI_VPDRES_LARGE_NAME(buf[0])
278 == PCI_VPDRES_TYPE_VPD &&
279 /* buf[1] == 0 && buf[2] == 9 && */ /*len*/
280 vpd->vpd_key0 == 0x4e /* N */ &&
281 vpd->vpd_key1 == 0x41 /* A */ &&
282 vpd->vpd_len == ETHER_ADDR_LEN) {
283 /*
284 * Ethernet address found
285 */
286 enaddr = buf + 6;
287 }
288 }
289 }
290 bus_space_unmap(romt, romh, romsize);
291 }
292
293 if (enaddr) {
294 memcpy(sc->sc_enaddr, enaddr, ETHER_ADDR_LEN);
295 goto got_eaddr;
296 }
297
298 aprint_error_dev(self, "no Ethernet address found\n");
299got_eaddr:
300
301 /*
302 * Map and establish our interrupt.
303 */
304 if (pci_intr_map(pa, &ih) != 0) {
305 aprint_error_dev(self, "unable to map interrupt\n");
306 return;
307 }
308 intrstr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf));
309 hsc->hsc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_NET, hme_intr, sc);
310 if (hsc->hsc_ih == NULL) {
311 aprint_error_dev(self, "unable to establish interrupt");
312 if (intrstr != NULL)
313 aprint_error(" at %s", intrstr);
314 aprint_error("\n");
315 return;
316 }
317 aprint_normal_dev(self, "interrupting at %s\n", intrstr);
318
319 sc->sc_burst = 16; /* XXX */
320
321 /* Finish off the attach. */
322 hme_config(sc);
323}
324