1 | /** |
2 | * \file drm.h |
3 | * Header for the Direct Rendering Manager |
4 | * |
5 | * \author Rickard E. (Rik) Faith <faith@valinux.com> |
6 | * |
7 | * \par Acknowledgments: |
8 | * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg. |
9 | */ |
10 | |
11 | /* |
12 | * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. |
13 | * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. |
14 | * All rights reserved. |
15 | * |
16 | * Permission is hereby granted, free of charge, to any person obtaining a |
17 | * copy of this software and associated documentation files (the "Software"), |
18 | * to deal in the Software without restriction, including without limitation |
19 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
20 | * and/or sell copies of the Software, and to permit persons to whom the |
21 | * Software is furnished to do so, subject to the following conditions: |
22 | * |
23 | * The above copyright notice and this permission notice (including the next |
24 | * paragraph) shall be included in all copies or substantial portions of the |
25 | * Software. |
26 | * |
27 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
28 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
29 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
30 | * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR |
31 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
32 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
33 | * OTHER DEALINGS IN THE SOFTWARE. |
34 | */ |
35 | |
36 | #ifndef _DRM_H_ |
37 | #define _DRM_H_ |
38 | |
39 | #if defined(__KERNEL__) || defined(__linux__) |
40 | |
41 | #include <linux/types.h> |
42 | #include <asm/ioctl.h> |
43 | |
44 | /* XXX Why was this historically different between Linux and BSD? */ |
45 | # ifdef __NetBSD__ |
46 | typedef unsigned long drm_handle_t; |
47 | # else |
48 | typedef unsigned int drm_handle_t; |
49 | # endif |
50 | |
51 | #endif |
52 | |
53 | #ifdef __NetBSD__ |
54 | #include <sys/ioccom.h> |
55 | #include <sys/types.h> |
56 | #ifndef _KERNEL |
57 | typedef int8_t __s8; |
58 | typedef uint8_t __u8; |
59 | typedef int16_t __s16; |
60 | typedef uint16_t __u16; |
61 | typedef int32_t __s32; |
62 | typedef uint32_t __u32; |
63 | typedef int64_t __s64; |
64 | typedef uint64_t __u64; |
65 | #endif |
66 | # ifndef __user |
67 | # define __user |
68 | # endif |
69 | #endif |
70 | |
71 | #define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */ |
72 | #define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */ |
73 | #define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */ |
74 | #define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */ |
75 | |
76 | #define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */ |
77 | #define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */ |
78 | #define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD) |
79 | #define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT) |
80 | #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT)) |
81 | |
82 | typedef unsigned int drm_context_t; |
83 | typedef unsigned int drm_drawable_t; |
84 | typedef unsigned int drm_magic_t; |
85 | |
86 | /** |
87 | * Cliprect. |
88 | * |
89 | * \warning: If you change this structure, make sure you change |
90 | * XF86DRIClipRectRec in the server as well |
91 | * |
92 | * \note KW: Actually it's illegal to change either for |
93 | * backwards-compatibility reasons. |
94 | */ |
95 | struct drm_clip_rect { |
96 | unsigned short x1; |
97 | unsigned short y1; |
98 | unsigned short x2; |
99 | unsigned short y2; |
100 | }; |
101 | |
102 | /** |
103 | * Drawable information. |
104 | */ |
105 | struct drm_drawable_info { |
106 | unsigned int num_rects; |
107 | struct drm_clip_rect *rects; |
108 | }; |
109 | |
110 | /** |
111 | * Texture region, |
112 | */ |
113 | struct drm_tex_region { |
114 | unsigned char next; |
115 | unsigned char prev; |
116 | unsigned char in_use; |
117 | unsigned char padding; |
118 | unsigned int age; |
119 | }; |
120 | |
121 | /** |
122 | * Hardware lock. |
123 | * |
124 | * The lock structure is a simple cache-line aligned integer. To avoid |
125 | * processor bus contention on a multiprocessor system, there should not be any |
126 | * other data stored in the same cache line. |
127 | */ |
128 | struct drm_hw_lock { |
129 | __volatile__ unsigned int lock; /**< lock variable */ |
130 | char padding[60]; /**< Pad to cache line */ |
131 | }; |
132 | |
133 | /** |
134 | * DRM_IOCTL_VERSION ioctl argument type. |
135 | * |
136 | * \sa drmGetVersion(). |
137 | */ |
138 | struct drm_version { |
139 | int version_major; /**< Major version */ |
140 | int version_minor; /**< Minor version */ |
141 | int version_patchlevel; /**< Patch level */ |
142 | size_t name_len; /**< Length of name buffer */ |
143 | char __user *name; /**< Name of driver */ |
144 | size_t date_len; /**< Length of date buffer */ |
145 | char __user *date; /**< User-space buffer to hold date */ |
146 | size_t desc_len; /**< Length of desc buffer */ |
147 | char __user *desc; /**< User-space buffer to hold desc */ |
148 | }; |
149 | |
150 | /** |
151 | * DRM_IOCTL_GET_UNIQUE ioctl argument type. |
152 | * |
153 | * \sa drmGetBusid() and drmSetBusId(). |
154 | */ |
155 | struct drm_unique { |
156 | size_t unique_len; /**< Length of unique */ |
157 | char __user *unique; /**< Unique name for driver instantiation */ |
158 | }; |
159 | |
160 | struct drm_list { |
161 | int count; /**< Length of user-space structures */ |
162 | struct drm_version __user *version; |
163 | }; |
164 | |
165 | struct drm_block { |
166 | int unused; |
167 | }; |
168 | |
169 | /** |
170 | * DRM_IOCTL_CONTROL ioctl argument type. |
171 | * |
172 | * \sa drmCtlInstHandler() and drmCtlUninstHandler(). |
173 | */ |
174 | struct drm_control { |
175 | enum { |
176 | DRM_ADD_COMMAND, |
177 | DRM_RM_COMMAND, |
178 | DRM_INST_HANDLER, |
179 | DRM_UNINST_HANDLER |
180 | } func; |
181 | int irq; |
182 | }; |
183 | |
184 | /** |
185 | * Type of memory to map. |
186 | */ |
187 | enum drm_map_type { |
188 | _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */ |
189 | _DRM_REGISTERS = 1, /**< no caching, no core dump */ |
190 | _DRM_SHM = 2, /**< shared, cached */ |
191 | _DRM_AGP = 3, /**< AGP/GART */ |
192 | _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */ |
193 | _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */ |
194 | }; |
195 | |
196 | /** |
197 | * Memory mapping flags. |
198 | */ |
199 | enum drm_map_flags { |
200 | _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */ |
201 | _DRM_READ_ONLY = 0x02, |
202 | _DRM_LOCKED = 0x04, /**< shared, cached, locked */ |
203 | _DRM_KERNEL = 0x08, /**< kernel requires access */ |
204 | _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */ |
205 | _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */ |
206 | _DRM_REMOVABLE = 0x40, /**< Removable mapping */ |
207 | _DRM_DRIVER = 0x80 /**< Managed by driver */ |
208 | }; |
209 | |
210 | struct drm_ctx_priv_map { |
211 | unsigned int ctx_id; /**< Context requesting private mapping */ |
212 | void *handle; /**< Handle of map */ |
213 | }; |
214 | |
215 | /** |
216 | * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls |
217 | * argument type. |
218 | * |
219 | * \sa drmAddMap(). |
220 | */ |
221 | struct drm_map { |
222 | unsigned long offset; /**< Requested physical address (0 for SAREA)*/ |
223 | unsigned long size; /**< Requested physical size (bytes) */ |
224 | enum drm_map_type type; /**< Type of memory to map */ |
225 | enum drm_map_flags flags; /**< Flags */ |
226 | void *handle; /**< User-space: "Handle" to pass to mmap() */ |
227 | /**< Kernel-space: kernel-virtual address */ |
228 | int mtrr; /**< MTRR slot used */ |
229 | /* Private data */ |
230 | }; |
231 | |
232 | /** |
233 | * DRM_IOCTL_GET_CLIENT ioctl argument type. |
234 | */ |
235 | struct drm_client { |
236 | int idx; /**< Which client desired? */ |
237 | int auth; /**< Is client authenticated? */ |
238 | unsigned long pid; /**< Process ID */ |
239 | unsigned long uid; /**< User ID */ |
240 | unsigned long magic; /**< Magic */ |
241 | unsigned long iocs; /**< Ioctl count */ |
242 | }; |
243 | |
244 | enum drm_stat_type { |
245 | _DRM_STAT_LOCK, |
246 | _DRM_STAT_OPENS, |
247 | _DRM_STAT_CLOSES, |
248 | _DRM_STAT_IOCTLS, |
249 | _DRM_STAT_LOCKS, |
250 | _DRM_STAT_UNLOCKS, |
251 | _DRM_STAT_VALUE, /**< Generic value */ |
252 | _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */ |
253 | _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */ |
254 | |
255 | _DRM_STAT_IRQ, /**< IRQ */ |
256 | _DRM_STAT_PRIMARY, /**< Primary DMA bytes */ |
257 | _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */ |
258 | _DRM_STAT_DMA, /**< DMA */ |
259 | _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */ |
260 | _DRM_STAT_MISSED /**< Missed DMA opportunity */ |
261 | /* Add to the *END* of the list */ |
262 | }; |
263 | |
264 | /** |
265 | * DRM_IOCTL_GET_STATS ioctl argument type. |
266 | */ |
267 | struct drm_stats { |
268 | unsigned long count; |
269 | struct { |
270 | unsigned long value; |
271 | enum drm_stat_type type; |
272 | } data[15]; |
273 | }; |
274 | |
275 | /** |
276 | * Hardware locking flags. |
277 | */ |
278 | enum drm_lock_flags { |
279 | _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */ |
280 | _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */ |
281 | _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */ |
282 | _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */ |
283 | /* These *HALT* flags aren't supported yet |
284 | -- they will be used to support the |
285 | full-screen DGA-like mode. */ |
286 | _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */ |
287 | _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */ |
288 | }; |
289 | |
290 | /** |
291 | * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type. |
292 | * |
293 | * \sa drmGetLock() and drmUnlock(). |
294 | */ |
295 | struct drm_lock { |
296 | int context; |
297 | enum drm_lock_flags flags; |
298 | }; |
299 | |
300 | /** |
301 | * DMA flags |
302 | * |
303 | * \warning |
304 | * These values \e must match xf86drm.h. |
305 | * |
306 | * \sa drm_dma. |
307 | */ |
308 | enum drm_dma_flags { |
309 | /* Flags for DMA buffer dispatch */ |
310 | _DRM_DMA_BLOCK = 0x01, /**< |
311 | * Block until buffer dispatched. |
312 | * |
313 | * \note The buffer may not yet have |
314 | * been processed by the hardware -- |
315 | * getting a hardware lock with the |
316 | * hardware quiescent will ensure |
317 | * that the buffer has been |
318 | * processed. |
319 | */ |
320 | _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */ |
321 | _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */ |
322 | |
323 | /* Flags for DMA buffer request */ |
324 | _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */ |
325 | _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */ |
326 | _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */ |
327 | }; |
328 | |
329 | /** |
330 | * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type. |
331 | * |
332 | * \sa drmAddBufs(). |
333 | */ |
334 | struct drm_buf_desc { |
335 | int count; /**< Number of buffers of this size */ |
336 | int size; /**< Size in bytes */ |
337 | int low_mark; /**< Low water mark */ |
338 | int high_mark; /**< High water mark */ |
339 | enum { |
340 | _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */ |
341 | _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */ |
342 | _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */ |
343 | _DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */ |
344 | _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */ |
345 | } flags; |
346 | unsigned long agp_start; /**< |
347 | * Start address of where the AGP buffers are |
348 | * in the AGP aperture |
349 | */ |
350 | }; |
351 | |
352 | /** |
353 | * DRM_IOCTL_INFO_BUFS ioctl argument type. |
354 | */ |
355 | struct drm_buf_info { |
356 | int count; /**< Entries in list */ |
357 | struct drm_buf_desc __user *list; |
358 | }; |
359 | |
360 | /** |
361 | * DRM_IOCTL_FREE_BUFS ioctl argument type. |
362 | */ |
363 | struct drm_buf_free { |
364 | int count; |
365 | int __user *list; |
366 | }; |
367 | |
368 | /** |
369 | * Buffer information |
370 | * |
371 | * \sa drm_buf_map. |
372 | */ |
373 | struct drm_buf_pub { |
374 | int idx; /**< Index into the master buffer list */ |
375 | int total; /**< Buffer size */ |
376 | int used; /**< Amount of buffer in use (for DMA) */ |
377 | void __user *address; /**< Address of buffer */ |
378 | }; |
379 | |
380 | /** |
381 | * DRM_IOCTL_MAP_BUFS ioctl argument type. |
382 | */ |
383 | struct drm_buf_map { |
384 | int count; /**< Length of the buffer list */ |
385 | void __user *virtual; /**< Mmap'd area in user-virtual */ |
386 | struct drm_buf_pub __user *list; /**< Buffer information */ |
387 | }; |
388 | |
389 | /** |
390 | * DRM_IOCTL_DMA ioctl argument type. |
391 | * |
392 | * Indices here refer to the offset into the buffer list in drm_buf_get. |
393 | * |
394 | * \sa drmDMA(). |
395 | */ |
396 | struct drm_dma { |
397 | int context; /**< Context handle */ |
398 | int send_count; /**< Number of buffers to send */ |
399 | int __user *send_indices; /**< List of handles to buffers */ |
400 | int __user *send_sizes; /**< Lengths of data to send */ |
401 | enum drm_dma_flags flags; /**< Flags */ |
402 | int request_count; /**< Number of buffers requested */ |
403 | int request_size; /**< Desired size for buffers */ |
404 | int __user *request_indices; /**< Buffer information */ |
405 | int __user *request_sizes; |
406 | int granted_count; /**< Number of buffers granted */ |
407 | }; |
408 | |
409 | enum drm_ctx_flags { |
410 | _DRM_CONTEXT_PRESERVED = 0x01, |
411 | _DRM_CONTEXT_2DONLY = 0x02 |
412 | }; |
413 | |
414 | /** |
415 | * DRM_IOCTL_ADD_CTX ioctl argument type. |
416 | * |
417 | * \sa drmCreateContext() and drmDestroyContext(). |
418 | */ |
419 | struct drm_ctx { |
420 | drm_context_t handle; |
421 | enum drm_ctx_flags flags; |
422 | }; |
423 | |
424 | /** |
425 | * DRM_IOCTL_RES_CTX ioctl argument type. |
426 | */ |
427 | struct drm_ctx_res { |
428 | int count; |
429 | struct drm_ctx __user *contexts; |
430 | }; |
431 | |
432 | /** |
433 | * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type. |
434 | */ |
435 | struct drm_draw { |
436 | drm_drawable_t handle; |
437 | }; |
438 | |
439 | /** |
440 | * DRM_IOCTL_UPDATE_DRAW ioctl argument type. |
441 | */ |
442 | typedef enum { |
443 | DRM_DRAWABLE_CLIPRECTS, |
444 | } drm_drawable_info_type_t; |
445 | |
446 | struct drm_update_draw { |
447 | drm_drawable_t handle; |
448 | unsigned int type; |
449 | unsigned int num; |
450 | unsigned long long data; |
451 | }; |
452 | |
453 | /** |
454 | * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type. |
455 | */ |
456 | struct drm_auth { |
457 | drm_magic_t magic; |
458 | }; |
459 | |
460 | /** |
461 | * DRM_IOCTL_IRQ_BUSID ioctl argument type. |
462 | * |
463 | * \sa drmGetInterruptFromBusID(). |
464 | */ |
465 | struct drm_irq_busid { |
466 | int irq; /**< IRQ number */ |
467 | int busnum; /**< bus number */ |
468 | int devnum; /**< device number */ |
469 | int funcnum; /**< function number */ |
470 | }; |
471 | |
472 | enum drm_vblank_seq_type { |
473 | _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */ |
474 | _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */ |
475 | /* bits 1-6 are reserved for high crtcs */ |
476 | _DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e, |
477 | _DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */ |
478 | _DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */ |
479 | _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */ |
480 | _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */ |
481 | _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */ |
482 | }; |
483 | #define _DRM_VBLANK_HIGH_CRTC_SHIFT 1 |
484 | |
485 | #define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE) |
486 | #define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | \ |
487 | _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS) |
488 | |
489 | struct drm_wait_vblank_request { |
490 | enum drm_vblank_seq_type type; |
491 | unsigned int sequence; |
492 | unsigned long signal; |
493 | }; |
494 | |
495 | struct drm_wait_vblank_reply { |
496 | enum drm_vblank_seq_type type; |
497 | unsigned int sequence; |
498 | long tval_sec; |
499 | long tval_usec; |
500 | }; |
501 | |
502 | /** |
503 | * DRM_IOCTL_WAIT_VBLANK ioctl argument type. |
504 | * |
505 | * \sa drmWaitVBlank(). |
506 | */ |
507 | union drm_wait_vblank { |
508 | struct drm_wait_vblank_request request; |
509 | struct drm_wait_vblank_reply reply; |
510 | }; |
511 | |
512 | #define _DRM_PRE_MODESET 1 |
513 | #define _DRM_POST_MODESET 2 |
514 | |
515 | /** |
516 | * DRM_IOCTL_MODESET_CTL ioctl argument type |
517 | * |
518 | * \sa drmModesetCtl(). |
519 | */ |
520 | struct drm_modeset_ctl { |
521 | __u32 crtc; |
522 | __u32 cmd; |
523 | }; |
524 | |
525 | /** |
526 | * DRM_IOCTL_AGP_ENABLE ioctl argument type. |
527 | * |
528 | * \sa drmAgpEnable(). |
529 | */ |
530 | struct drm_agp_mode { |
531 | unsigned long mode; /**< AGP mode */ |
532 | }; |
533 | |
534 | /** |
535 | * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type. |
536 | * |
537 | * \sa drmAgpAlloc() and drmAgpFree(). |
538 | */ |
539 | struct drm_agp_buffer { |
540 | unsigned long size; /**< In bytes -- will round to page boundary */ |
541 | unsigned long handle; /**< Used for binding / unbinding */ |
542 | unsigned long type; /**< Type of memory to allocate */ |
543 | unsigned long physical; /**< Physical used by i810 */ |
544 | }; |
545 | |
546 | /** |
547 | * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type. |
548 | * |
549 | * \sa drmAgpBind() and drmAgpUnbind(). |
550 | */ |
551 | struct drm_agp_binding { |
552 | unsigned long handle; /**< From drm_agp_buffer */ |
553 | unsigned long offset; /**< In bytes -- will round to page boundary */ |
554 | }; |
555 | |
556 | /** |
557 | * DRM_IOCTL_AGP_INFO ioctl argument type. |
558 | * |
559 | * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(), |
560 | * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(), |
561 | * drmAgpVendorId() and drmAgpDeviceId(). |
562 | */ |
563 | struct drm_agp_info { |
564 | int agp_version_major; |
565 | int agp_version_minor; |
566 | unsigned long mode; |
567 | unsigned long aperture_base; /* physical address */ |
568 | unsigned long aperture_size; /* bytes */ |
569 | unsigned long memory_allowed; /* bytes */ |
570 | unsigned long memory_used; |
571 | |
572 | /* PCI information */ |
573 | unsigned short id_vendor; |
574 | unsigned short id_device; |
575 | }; |
576 | |
577 | /** |
578 | * DRM_IOCTL_SG_ALLOC ioctl argument type. |
579 | */ |
580 | struct drm_scatter_gather { |
581 | unsigned long size; /**< In bytes -- will round to page boundary */ |
582 | unsigned long handle; /**< Used for mapping / unmapping */ |
583 | }; |
584 | |
585 | /** |
586 | * DRM_IOCTL_SET_VERSION ioctl argument type. |
587 | */ |
588 | struct drm_set_version { |
589 | int drm_di_major; |
590 | int drm_di_minor; |
591 | int drm_dd_major; |
592 | int drm_dd_minor; |
593 | }; |
594 | |
595 | /** DRM_IOCTL_GEM_CLOSE ioctl argument type */ |
596 | struct drm_gem_close { |
597 | /** Handle of the object to be closed. */ |
598 | __u32 handle; |
599 | __u32 pad; |
600 | }; |
601 | |
602 | /** DRM_IOCTL_GEM_FLINK ioctl argument type */ |
603 | struct drm_gem_flink { |
604 | /** Handle for the object being named */ |
605 | __u32 handle; |
606 | |
607 | /** Returned global name */ |
608 | __u32 name; |
609 | }; |
610 | |
611 | /** DRM_IOCTL_GEM_OPEN ioctl argument type */ |
612 | struct drm_gem_open { |
613 | /** Name of object being opened */ |
614 | __u32 name; |
615 | |
616 | /** Returned handle for the object */ |
617 | __u32 handle; |
618 | |
619 | /** Returned size of the object */ |
620 | __u64 size; |
621 | }; |
622 | |
623 | #define DRM_CAP_DUMB_BUFFER 0x1 |
624 | #define DRM_CAP_VBLANK_HIGH_CRTC 0x2 |
625 | #define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3 |
626 | #define DRM_CAP_DUMB_PREFER_SHADOW 0x4 |
627 | #define DRM_CAP_PRIME 0x5 |
628 | #define DRM_PRIME_CAP_IMPORT 0x1 |
629 | #define DRM_PRIME_CAP_EXPORT 0x2 |
630 | #define DRM_CAP_TIMESTAMP_MONOTONIC 0x6 |
631 | #define DRM_CAP_ASYNC_PAGE_FLIP 0x7 |
632 | /* |
633 | * The CURSOR_WIDTH and CURSOR_HEIGHT capabilities return a valid widthxheight |
634 | * combination for the hardware cursor. The intention is that a hardware |
635 | * agnostic userspace can query a cursor plane size to use. |
636 | * |
637 | * Note that the cross-driver contract is to merely return a valid size; |
638 | * drivers are free to attach another meaning on top, eg. i915 returns the |
639 | * maximum plane size. |
640 | */ |
641 | #define DRM_CAP_CURSOR_WIDTH 0x8 |
642 | #define DRM_CAP_CURSOR_HEIGHT 0x9 |
643 | |
644 | /** DRM_IOCTL_GET_CAP ioctl argument type */ |
645 | struct drm_get_cap { |
646 | __u64 capability; |
647 | __u64 value; |
648 | }; |
649 | |
650 | /** |
651 | * DRM_CLIENT_CAP_STEREO_3D |
652 | * |
653 | * if set to 1, the DRM core will expose the stereo 3D capabilities of the |
654 | * monitor by advertising the supported 3D layouts in the flags of struct |
655 | * drm_mode_modeinfo. |
656 | */ |
657 | #define DRM_CLIENT_CAP_STEREO_3D 1 |
658 | |
659 | /** |
660 | * DRM_CLIENT_CAP_UNIVERSAL_PLANES |
661 | * |
662 | * If set to 1, the DRM core will expose all planes (overlay, primary, and |
663 | * cursor) to userspace. |
664 | */ |
665 | #define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2 |
666 | |
667 | /** DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */ |
668 | struct drm_set_client_cap { |
669 | __u64 capability; |
670 | __u64 value; |
671 | }; |
672 | |
673 | #define DRM_CLOEXEC O_CLOEXEC |
674 | struct drm_prime_handle { |
675 | __u32 handle; |
676 | |
677 | /** Flags.. only applicable for handle->fd */ |
678 | __u32 flags; |
679 | |
680 | /** Returned dmabuf file descriptor */ |
681 | __s32 fd; |
682 | }; |
683 | |
684 | #include <drm/drm_mode.h> |
685 | |
686 | #define DRM_IOCTL_BASE 'd' |
687 | #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) |
688 | #define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) |
689 | #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) |
690 | #define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type) |
691 | |
692 | #define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version) |
693 | #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique) |
694 | #define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth) |
695 | #define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid) |
696 | #define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map) |
697 | #define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client) |
698 | #define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats) |
699 | #define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version) |
700 | #define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl) |
701 | #define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close) |
702 | #define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink) |
703 | #define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open) |
704 | #define DRM_IOCTL_GET_CAP DRM_IOWR(0x0c, struct drm_get_cap) |
705 | #define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW( 0x0d, struct drm_set_client_cap) |
706 | |
707 | #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique) |
708 | #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth) |
709 | #define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block) |
710 | #define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block) |
711 | #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control) |
712 | #define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map) |
713 | #define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc) |
714 | #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc) |
715 | #define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info) |
716 | #define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map) |
717 | #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free) |
718 | |
719 | #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map) |
720 | |
721 | #define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map) |
722 | #define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map) |
723 | |
724 | #define DRM_IOCTL_SET_MASTER DRM_IO(0x1e) |
725 | #define DRM_IOCTL_DROP_MASTER DRM_IO(0x1f) |
726 | |
727 | #define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx) |
728 | #define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx) |
729 | #define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx) |
730 | #define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx) |
731 | #define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx) |
732 | #define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx) |
733 | #define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res) |
734 | #define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw) |
735 | #define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw) |
736 | #define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma) |
737 | #define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock) |
738 | #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock) |
739 | #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock) |
740 | |
741 | #define DRM_IOCTL_PRIME_HANDLE_TO_FD DRM_IOWR(0x2d, struct drm_prime_handle) |
742 | #define DRM_IOCTL_PRIME_FD_TO_HANDLE DRM_IOWR(0x2e, struct drm_prime_handle) |
743 | |
744 | #define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30) |
745 | #define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31) |
746 | #define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode) |
747 | #define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info) |
748 | #define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer) |
749 | #define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer) |
750 | #define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding) |
751 | #define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding) |
752 | |
753 | #define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather) |
754 | #define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather) |
755 | |
756 | #define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank) |
757 | |
758 | #define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw) |
759 | |
760 | #define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res) |
761 | #define DRM_IOCTL_MODE_GETCRTC DRM_IOWR(0xA1, struct drm_mode_crtc) |
762 | #define DRM_IOCTL_MODE_SETCRTC DRM_IOWR(0xA2, struct drm_mode_crtc) |
763 | #define DRM_IOCTL_MODE_CURSOR DRM_IOWR(0xA3, struct drm_mode_cursor) |
764 | #define DRM_IOCTL_MODE_GETGAMMA DRM_IOWR(0xA4, struct drm_mode_crtc_lut) |
765 | #define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut) |
766 | #define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder) |
767 | #define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector) |
768 | #define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd) /* deprecated (never worked) */ |
769 | #define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd) /* deprecated (never worked) */ |
770 | |
771 | #define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property) |
772 | #define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property) |
773 | #define DRM_IOCTL_MODE_GETPROPBLOB DRM_IOWR(0xAC, struct drm_mode_get_blob) |
774 | #define DRM_IOCTL_MODE_GETFB DRM_IOWR(0xAD, struct drm_mode_fb_cmd) |
775 | #define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xAE, struct drm_mode_fb_cmd) |
776 | #define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xAF, unsigned int) |
777 | #define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip) |
778 | #define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd) |
779 | |
780 | #define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb) |
781 | #define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb) |
782 | #define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb) |
783 | #define DRM_IOCTL_MODE_GETPLANERESOURCES DRM_IOWR(0xB5, struct drm_mode_get_plane_res) |
784 | #define DRM_IOCTL_MODE_GETPLANE DRM_IOWR(0xB6, struct drm_mode_get_plane) |
785 | #define DRM_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct drm_mode_set_plane) |
786 | #define DRM_IOCTL_MODE_ADDFB2 DRM_IOWR(0xB8, struct drm_mode_fb_cmd2) |
787 | #define DRM_IOCTL_MODE_OBJ_GETPROPERTIES DRM_IOWR(0xB9, struct drm_mode_obj_get_properties) |
788 | #define DRM_IOCTL_MODE_OBJ_SETPROPERTY DRM_IOWR(0xBA, struct drm_mode_obj_set_property) |
789 | #define DRM_IOCTL_MODE_CURSOR2 DRM_IOWR(0xBB, struct drm_mode_cursor2) |
790 | |
791 | #ifdef __NetBSD__ |
792 | /* |
793 | * Instrumenting mmap is trickier than just making an ioctl to do it. |
794 | */ |
795 | struct drm_mmap { |
796 | void *dnm_addr; /* in/out */ |
797 | size_t dnm_size; /* in */ |
798 | int dnm_prot; /* in */ |
799 | int dnm_flags; /* in */ |
800 | off_t dnm_offset; /* in */ |
801 | }; |
802 | #define DRM_IOCTL_MMAP DRM_IOWR(0xff, struct drm_mmap) |
803 | #endif |
804 | |
805 | /** |
806 | * Device specific ioctls should only be in their respective headers |
807 | * The device specific ioctl range is from 0x40 to 0x99. |
808 | * Generic IOCTLS restart at 0xA0. |
809 | * |
810 | * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and |
811 | * drmCommandReadWrite(). |
812 | */ |
813 | #define DRM_COMMAND_BASE 0x40 |
814 | #define DRM_COMMAND_END 0xA0 |
815 | |
816 | /** |
817 | * Header for events written back to userspace on the drm fd. The |
818 | * type defines the type of event, the length specifies the total |
819 | * length of the event (including the header), and user_data is |
820 | * typically a 64 bit value passed with the ioctl that triggered the |
821 | * event. A read on the drm fd will always only return complete |
822 | * events, that is, if for example the read buffer is 100 bytes, and |
823 | * there are two 64 byte events pending, only one will be returned. |
824 | * |
825 | * Event types 0 - 0x7fffffff are generic drm events, 0x80000000 and |
826 | * up are chipset specific. |
827 | */ |
828 | struct drm_event { |
829 | __u32 type; |
830 | __u32 length; |
831 | }; |
832 | |
833 | #define DRM_EVENT_VBLANK 0x01 |
834 | #define DRM_EVENT_FLIP_COMPLETE 0x02 |
835 | |
836 | struct drm_event_vblank { |
837 | struct drm_event base; |
838 | __u64 user_data; |
839 | __u32 tv_sec; |
840 | __u32 tv_usec; |
841 | __u32 sequence; |
842 | __u32 reserved; |
843 | }; |
844 | |
845 | /* typedef area */ |
846 | #ifndef __KERNEL__ |
847 | typedef struct drm_clip_rect drm_clip_rect_t; |
848 | typedef struct drm_drawable_info drm_drawable_info_t; |
849 | typedef struct drm_tex_region drm_tex_region_t; |
850 | typedef struct drm_hw_lock drm_hw_lock_t; |
851 | typedef struct drm_version drm_version_t; |
852 | typedef struct drm_unique drm_unique_t; |
853 | typedef struct drm_list drm_list_t; |
854 | typedef struct drm_block drm_block_t; |
855 | typedef struct drm_control drm_control_t; |
856 | typedef enum drm_map_type drm_map_type_t; |
857 | typedef enum drm_map_flags drm_map_flags_t; |
858 | typedef struct drm_ctx_priv_map drm_ctx_priv_map_t; |
859 | typedef struct drm_map drm_map_t; |
860 | typedef struct drm_client drm_client_t; |
861 | typedef enum drm_stat_type drm_stat_type_t; |
862 | typedef struct drm_stats drm_stats_t; |
863 | typedef enum drm_lock_flags drm_lock_flags_t; |
864 | typedef struct drm_lock drm_lock_t; |
865 | typedef enum drm_dma_flags drm_dma_flags_t; |
866 | typedef struct drm_buf_desc drm_buf_desc_t; |
867 | typedef struct drm_buf_info drm_buf_info_t; |
868 | typedef struct drm_buf_free drm_buf_free_t; |
869 | typedef struct drm_buf_pub drm_buf_pub_t; |
870 | typedef struct drm_buf_map drm_buf_map_t; |
871 | typedef struct drm_dma drm_dma_t; |
872 | typedef union drm_wait_vblank drm_wait_vblank_t; |
873 | typedef struct drm_agp_mode drm_agp_mode_t; |
874 | typedef enum drm_ctx_flags drm_ctx_flags_t; |
875 | typedef struct drm_ctx drm_ctx_t; |
876 | typedef struct drm_ctx_res drm_ctx_res_t; |
877 | typedef struct drm_draw drm_draw_t; |
878 | typedef struct drm_update_draw drm_update_draw_t; |
879 | typedef struct drm_auth drm_auth_t; |
880 | typedef struct drm_irq_busid drm_irq_busid_t; |
881 | typedef enum drm_vblank_seq_type drm_vblank_seq_type_t; |
882 | |
883 | typedef struct drm_agp_buffer drm_agp_buffer_t; |
884 | typedef struct drm_agp_binding drm_agp_binding_t; |
885 | typedef struct drm_agp_info drm_agp_info_t; |
886 | typedef struct drm_scatter_gather drm_scatter_gather_t; |
887 | typedef struct drm_set_version drm_set_version_t; |
888 | #endif |
889 | |
890 | #endif |
891 | |