1 | /* $NetBSD: agp_amd.c,v 1.21 2010/11/13 13:52:04 uebayasi Exp $ */ |
2 | |
3 | /*- |
4 | * Copyright (c) 2000 Doug Rabson |
5 | * All rights reserved. |
6 | * |
7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions |
9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * 2. Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
15 | * |
16 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
17 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
20 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
21 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
22 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
23 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
24 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
25 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
26 | * SUCH DAMAGE. |
27 | * |
28 | * $FreeBSD: src/sys/pci/agp_amd.c,v 1.6 2001/07/05 21:28:46 jhb Exp $ |
29 | */ |
30 | |
31 | #include <sys/cdefs.h> |
32 | __KERNEL_RCSID(0, "$NetBSD: agp_amd.c,v 1.21 2010/11/13 13:52:04 uebayasi Exp $" ); |
33 | |
34 | #include <sys/param.h> |
35 | #include <sys/systm.h> |
36 | #include <sys/malloc.h> |
37 | #include <sys/kernel.h> |
38 | #include <sys/proc.h> |
39 | #include <sys/conf.h> |
40 | #include <sys/device.h> |
41 | #include <sys/agpio.h> |
42 | |
43 | #include <dev/pci/pcivar.h> |
44 | #include <dev/pci/pcireg.h> |
45 | #include <dev/pci/agpvar.h> |
46 | #include <dev/pci/agpreg.h> |
47 | |
48 | #include <dev/pci/pcidevs.h> |
49 | |
50 | #define READ2(off) bus_space_read_2(asc->iot, asc->ioh, off) |
51 | #define READ4(off) bus_space_read_4(asc->iot, asc->ioh, off) |
52 | #define WRITE2(off,v) bus_space_write_2(asc->iot, asc->ioh, off, v) |
53 | #define WRITE4(off,v) bus_space_write_4(asc->iot, asc->ioh, off, v) |
54 | |
55 | struct agp_amd_gatt { |
56 | bus_dmamap_t ag_dmamap; |
57 | bus_dma_segment_t ag_dmaseg; |
58 | int ag_nseg; |
59 | u_int32_t ag_entries; |
60 | u_int32_t *ag_vdir; /* virtual address of page dir */ |
61 | bus_addr_t ag_pdir; /* bus address of page dir */ |
62 | u_int32_t *ag_virtual; /* virtual address of gatt */ |
63 | bus_addr_t ag_physical; /* bus address of gatt */ |
64 | size_t ag_size; |
65 | }; |
66 | |
67 | struct agp_amd_softc { |
68 | u_int32_t initial_aperture; /* aperture size at startup */ |
69 | struct agp_amd_gatt *gatt; |
70 | bus_space_handle_t ioh; |
71 | bus_space_tag_t iot; |
72 | }; |
73 | |
74 | static u_int32_t agp_amd_get_aperture(struct agp_softc *); |
75 | static int agp_amd_set_aperture(struct agp_softc *, u_int32_t); |
76 | static int agp_amd_bind_page(struct agp_softc *, off_t, bus_addr_t); |
77 | static int agp_amd_unbind_page(struct agp_softc *, off_t); |
78 | static void agp_amd_flush_tlb(struct agp_softc *); |
79 | |
80 | |
81 | static struct agp_methods agp_amd_methods = { |
82 | agp_amd_get_aperture, |
83 | agp_amd_set_aperture, |
84 | agp_amd_bind_page, |
85 | agp_amd_unbind_page, |
86 | agp_amd_flush_tlb, |
87 | agp_generic_enable, |
88 | agp_generic_alloc_memory, |
89 | agp_generic_free_memory, |
90 | agp_generic_bind_memory, |
91 | agp_generic_unbind_memory, |
92 | }; |
93 | |
94 | |
95 | static struct agp_amd_gatt * |
96 | agp_amd_alloc_gatt(struct agp_softc *sc) |
97 | { |
98 | u_int32_t apsize = AGP_GET_APERTURE(sc); |
99 | u_int32_t entries = apsize >> AGP_PAGE_SHIFT; |
100 | struct agp_amd_gatt *gatt; |
101 | int i, npages; |
102 | void *vdir; |
103 | |
104 | gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT); |
105 | if (!gatt) |
106 | return 0; |
107 | |
108 | if (agp_alloc_dmamem(sc->as_dmat, |
109 | AGP_PAGE_SIZE + entries * sizeof(u_int32_t), 0, |
110 | &gatt->ag_dmamap, &vdir, &gatt->ag_pdir, |
111 | &gatt->ag_dmaseg, 1, &gatt->ag_nseg) != 0) { |
112 | printf("failed to allocate GATT\n" ); |
113 | free(gatt, M_AGP); |
114 | return NULL; |
115 | } |
116 | |
117 | gatt->ag_vdir = (u_int32_t *)vdir; |
118 | gatt->ag_entries = entries; |
119 | gatt->ag_virtual = (u_int32_t *)((char *)vdir + AGP_PAGE_SIZE); |
120 | gatt->ag_physical = gatt->ag_pdir + AGP_PAGE_SIZE; |
121 | gatt->ag_size = AGP_PAGE_SIZE + entries * sizeof(u_int32_t); |
122 | |
123 | memset(gatt->ag_vdir, 0, AGP_PAGE_SIZE); |
124 | memset(gatt->ag_virtual, 0, entries * sizeof(u_int32_t)); |
125 | |
126 | /* |
127 | * Map the pages of the GATT into the page directory. |
128 | */ |
129 | npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1) |
130 | >> AGP_PAGE_SHIFT); |
131 | |
132 | for (i = 0; i < npages; i++) |
133 | gatt->ag_vdir[i] = (gatt->ag_physical + i * AGP_PAGE_SIZE) | 1; |
134 | |
135 | /* |
136 | * Make sure the chipset can see everything. |
137 | */ |
138 | agp_flush_cache(); |
139 | |
140 | return gatt; |
141 | } |
142 | |
143 | #if 0 |
144 | static void |
145 | agp_amd_free_gatt(struct agp_softc *sc, struct agp_amd_gatt *gatt) |
146 | { |
147 | agp_free_dmamem(sc->as_dmat, gatt->ag_size, |
148 | gatt->ag_dmamap, (void *)gatt->ag_virtual, &gatt->ag_dmaseg, |
149 | gatt->ag_nseg); |
150 | free(gatt, M_AGP); |
151 | } |
152 | #endif |
153 | |
154 | int |
155 | agp_amd_match(const struct pci_attach_args *pa) |
156 | { |
157 | |
158 | switch (PCI_PRODUCT(pa->pa_id)) { |
159 | case PCI_PRODUCT_AMD_SC751_SC: |
160 | case PCI_PRODUCT_AMD_SC761_SC: |
161 | case PCI_PRODUCT_AMD_SC762_NB: |
162 | return 1; |
163 | } |
164 | |
165 | return 0; |
166 | } |
167 | |
168 | int |
169 | agp_amd_attach(device_t parent, device_t self, void *aux) |
170 | { |
171 | struct agp_softc *sc = device_private(self); |
172 | struct agp_amd_softc *asc; |
173 | struct pci_attach_args *pa = aux; |
174 | struct agp_amd_gatt *gatt; |
175 | pcireg_t reg; |
176 | int error; |
177 | |
178 | asc = malloc(sizeof *asc, M_AGP, M_NOWAIT|M_ZERO); |
179 | if (asc == NULL) { |
180 | aprint_error(": can't allocate softc\n" ); |
181 | /* agp_generic_detach(sc) */ |
182 | return ENOMEM; |
183 | } |
184 | |
185 | error = pci_mapreg_map(pa, AGP_AMD751_REGISTERS, PCI_MAPREG_TYPE_MEM, 0, |
186 | &asc->iot, &asc->ioh, NULL, NULL); |
187 | if (error != 0) { |
188 | aprint_error(": can't map AGP registers\n" ); |
189 | agp_generic_detach(sc); |
190 | free(asc, M_AGP); |
191 | return error; |
192 | } |
193 | |
194 | if (agp_map_aperture(pa, sc, AGP_APBASE) != 0) { |
195 | aprint_error(": can't map aperture\n" ); |
196 | agp_generic_detach(sc); |
197 | free(asc, M_AGP); |
198 | return ENXIO; |
199 | } |
200 | pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, &sc->as_capoff, |
201 | NULL); |
202 | sc->as_methods = &agp_amd_methods; |
203 | sc->as_chipc = asc; |
204 | asc->initial_aperture = AGP_GET_APERTURE(sc); |
205 | |
206 | for (;;) { |
207 | gatt = agp_amd_alloc_gatt(sc); |
208 | if (gatt) |
209 | break; |
210 | |
211 | /* |
212 | * Probably contigmalloc failure. Try reducing the |
213 | * aperture so that the gatt size reduces. |
214 | */ |
215 | if (AGP_SET_APERTURE(sc, AGP_GET_APERTURE(sc) / 2)) { |
216 | aprint_error(": can't set aperture\n" ); |
217 | return ENOMEM; |
218 | } |
219 | } |
220 | asc->gatt = gatt; |
221 | |
222 | /* Install the gatt. */ |
223 | WRITE4(AGP_AMD751_ATTBASE, gatt->ag_physical); |
224 | |
225 | /* Enable synchronisation between host and agp. */ |
226 | reg = pci_conf_read(pa->pa_pc, pa->pa_tag, AGP_AMD751_MODECTRL); |
227 | reg &= ~0x00ff00ff; |
228 | reg |= (AGP_AMD751_MODECTRL_SYNEN) | (AGP_AMD751_MODECTRL2_GPDCE << 16); |
229 | pci_conf_write(pa->pa_pc, pa->pa_tag, AGP_AMD751_MODECTRL, reg); |
230 | /* Enable the TLB and flush */ |
231 | WRITE2(AGP_AMD751_STATUS, |
232 | READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE); |
233 | AGP_FLUSH_TLB(sc); |
234 | |
235 | return 0; |
236 | } |
237 | |
238 | #if 0 |
239 | static int |
240 | agp_amd_detach(struct agp_softc *sc) |
241 | { |
242 | pcireg_t reg; |
243 | struct agp_amd_softc *asc = sc->as_chipc; |
244 | |
245 | /* Disable the TLB.. */ |
246 | WRITE2(AGP_AMD751_STATUS, |
247 | READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE); |
248 | |
249 | /* Disable host-agp sync */ |
250 | reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_AMD751_MODECTRL); |
251 | reg &= 0xffffff00; |
252 | pci_conf_write(sc->as_pc, sc->as_tag, AGP_AMD751_MODECTRL, reg); |
253 | |
254 | /* Clear the GATT base */ |
255 | WRITE4(AGP_AMD751_ATTBASE, 0); |
256 | |
257 | /* Put the aperture back the way it started. */ |
258 | AGP_SET_APERTURE(sc, asc->initial_aperture); |
259 | |
260 | agp_amd_free_gatt(sc, asc->gatt); |
261 | |
262 | /* XXXfvdl no pci_mapreg_unmap */ |
263 | |
264 | return 0; |
265 | } |
266 | #endif |
267 | |
268 | static u_int32_t |
269 | agp_amd_get_aperture(struct agp_softc *sc) |
270 | { |
271 | int vas; |
272 | |
273 | vas = (pci_conf_read(sc->as_pc, sc->as_tag, AGP_AMD751_APCTRL) & 0x06); |
274 | vas >>= 1; |
275 | /* |
276 | * The aperture size is equal to 32M<<vas. |
277 | */ |
278 | return (32*1024*1024) << vas; |
279 | } |
280 | |
281 | static int |
282 | agp_amd_set_aperture(struct agp_softc *sc, u_int32_t aperture) |
283 | { |
284 | int vas; |
285 | pcireg_t reg; |
286 | |
287 | /* |
288 | * Check for a power of two and make sure its within the |
289 | * programmable range. |
290 | */ |
291 | if (aperture & (aperture - 1) |
292 | || aperture < 32*1024*1024 |
293 | || aperture > 2U*1024*1024*1024) |
294 | return EINVAL; |
295 | |
296 | vas = ffs(aperture / 32*1024*1024) - 1; |
297 | |
298 | reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_AMD751_APCTRL); |
299 | reg = (reg & ~0x06) | (vas << 1); |
300 | pci_conf_write(sc->as_pc, sc->as_tag, AGP_AMD751_APCTRL, reg); |
301 | |
302 | return 0; |
303 | } |
304 | |
305 | static int |
306 | agp_amd_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical) |
307 | { |
308 | struct agp_amd_softc *asc = sc->as_chipc; |
309 | |
310 | if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT)) |
311 | return EINVAL; |
312 | |
313 | asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1; |
314 | return 0; |
315 | } |
316 | |
317 | static int |
318 | agp_amd_unbind_page(struct agp_softc *sc, off_t offset) |
319 | { |
320 | struct agp_amd_softc *asc = sc->as_chipc; |
321 | |
322 | if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT)) |
323 | return EINVAL; |
324 | |
325 | asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0; |
326 | return 0; |
327 | } |
328 | |
329 | static void |
330 | agp_amd_flush_tlb(struct agp_softc *sc) |
331 | { |
332 | struct agp_amd_softc *asc = sc->as_chipc; |
333 | |
334 | /* Set the cache invalidate bit and wait for the chipset to clear */ |
335 | WRITE4(AGP_AMD751_TLBCTRL, 1); |
336 | do { |
337 | DELAY(1); |
338 | } while (READ4(AGP_AMD751_TLBCTRL)); |
339 | } |
340 | |