1 | /****************************************************************************** |
2 | |
3 | Copyright (c) 2001-2013, Intel Corporation |
4 | All rights reserved. |
5 | |
6 | Redistribution and use in source and binary forms, with or without |
7 | modification, are permitted provided that the following conditions are met: |
8 | |
9 | 1. Redistributions of source code must retain the above copyright notice, |
10 | this list of conditions and the following disclaimer. |
11 | |
12 | 2. Redistributions in binary form must reproduce the above copyright |
13 | notice, this list of conditions and the following disclaimer in the |
14 | documentation and/or other materials provided with the distribution. |
15 | |
16 | 3. Neither the name of the Intel Corporation nor the names of its |
17 | contributors may be used to endorse or promote products derived from |
18 | this software without specific prior written permission. |
19 | |
20 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
21 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
22 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
23 | ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
24 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
25 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
26 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
27 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
28 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
29 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
30 | POSSIBILITY OF SUCH DAMAGE. |
31 | |
32 | ******************************************************************************/ |
33 | /* |
34 | * Copyright (c) 2011 The NetBSD Foundation, Inc. |
35 | * All rights reserved. |
36 | * |
37 | * This code is derived from software contributed to The NetBSD Foundation |
38 | * by Coyote Point Systems, Inc. |
39 | * |
40 | * Redistribution and use in source and binary forms, with or without |
41 | * modification, are permitted provided that the following conditions |
42 | * are met: |
43 | * 1. Redistributions of source code must retain the above copyright |
44 | * notice, this list of conditions and the following disclaimer. |
45 | * 2. Redistributions in binary form must reproduce the above copyright |
46 | * notice, this list of conditions and the following disclaimer in the |
47 | * documentation and/or other materials provided with the distribution. |
48 | * |
49 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
50 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
51 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
52 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
53 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
54 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
55 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
56 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
57 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
58 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
59 | * POSSIBILITY OF SUCH DAMAGE. |
60 | */ |
61 | /*$FreeBSD: head/sys/dev/ixgbe/ixgbe.h 279393 2015-02-28 14:57:57Z ngie $*/ |
62 | /*$NetBSD: ixgbe.h,v 1.9 2015/08/17 06:16:03 knakahara Exp $*/ |
63 | |
64 | |
65 | #ifndef _IXGBE_H_ |
66 | #define _IXGBE_H_ |
67 | |
68 | |
69 | #include <sys/param.h> |
70 | #include <sys/reboot.h> |
71 | #include <sys/systm.h> |
72 | #include <sys/time.h> |
73 | #if __FreeBSD_version >= 800000 |
74 | #include <sys/buf_ring.h> |
75 | #endif |
76 | #include <sys/mbuf.h> |
77 | #include <sys/protosw.h> |
78 | #include <sys/socket.h> |
79 | #include <sys/malloc.h> |
80 | #include <sys/kernel.h> |
81 | #include <sys/module.h> |
82 | #include <sys/sockio.h> |
83 | |
84 | #include <net/if.h> |
85 | #include <net/if_arp.h> |
86 | #include <net/bpf.h> |
87 | #include <net/if_ether.h> |
88 | #include <net/if_dl.h> |
89 | #include <net/if_media.h> |
90 | |
91 | #include <net/bpf.h> |
92 | #include <net/if_types.h> |
93 | #include <net/if_vlanvar.h> |
94 | |
95 | #include <netinet/in_systm.h> |
96 | #include <netinet/in.h> |
97 | #include <netinet/ip.h> |
98 | #include <netinet/ip6.h> |
99 | #include <netinet/tcp.h> |
100 | #include <netinet/udp.h> |
101 | |
102 | #include <sys/bus.h> |
103 | #include <dev/pci/pcivar.h> |
104 | #include <dev/pci/pcireg.h> |
105 | #include <sys/proc.h> |
106 | #include <sys/sysctl.h> |
107 | #include <sys/endian.h> |
108 | #include <sys/workqueue.h> |
109 | #include <sys/cpu.h> |
110 | #include <sys/interrupt.h> |
111 | |
112 | #include "ixgbe_netbsd.h" |
113 | #include "ixgbe_api.h" |
114 | |
115 | /* Tunables */ |
116 | |
117 | /* |
118 | * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the |
119 | * number of transmit descriptors allocated by the driver. Increasing this |
120 | * value allows the driver to queue more transmits. Each descriptor is 16 |
121 | * bytes. Performance tests have show the 2K value to be optimal for top |
122 | * performance. |
123 | */ |
124 | #define DEFAULT_TXD 1024 |
125 | #define PERFORM_TXD 2048 |
126 | #define MAX_TXD 4096 |
127 | #define MIN_TXD 64 |
128 | |
129 | /* |
130 | * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the |
131 | * number of receive descriptors allocated for each RX queue. Increasing this |
132 | * value allows the driver to buffer more incoming packets. Each descriptor |
133 | * is 16 bytes. A receive buffer is also allocated for each descriptor. |
134 | * |
135 | * Note: with 8 rings and a dual port card, it is possible to bump up |
136 | * against the system mbuf pool limit, you can tune nmbclusters |
137 | * to adjust for this. |
138 | */ |
139 | #define DEFAULT_RXD 1024 |
140 | #define PERFORM_RXD 2048 |
141 | #define MAX_RXD 4096 |
142 | #define MIN_RXD 64 |
143 | |
144 | /* Alignment for rings */ |
145 | #define DBA_ALIGN 128 |
146 | |
147 | /* |
148 | * This parameter controls the maximum no of times the driver will loop in |
149 | * the isr. Minimum Value = 1 |
150 | */ |
151 | #define MAX_LOOP 10 |
152 | |
153 | /* |
154 | * This is the max watchdog interval, ie. the time that can |
155 | * pass between any two TX clean operations, such only happening |
156 | * when the TX hardware is functioning. |
157 | */ |
158 | #define IXGBE_WATCHDOG (10 * hz) |
159 | |
160 | /* |
161 | * This parameters control when the driver calls the routine to reclaim |
162 | * transmit descriptors. |
163 | */ |
164 | #define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8) |
165 | #define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32) |
166 | |
167 | #define IXGBE_MAX_FRAME_SIZE 0x3F00 |
168 | |
169 | /* Flow control constants */ |
170 | #define IXGBE_FC_PAUSE 0xFFFF |
171 | #define IXGBE_FC_HI 0x20000 |
172 | #define IXGBE_FC_LO 0x10000 |
173 | |
174 | /* |
175 | * Used for optimizing small rx mbufs. Effort is made to keep the copy |
176 | * small and aligned for the CPU L1 cache. |
177 | * |
178 | * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting |
179 | * 32 byte alignment needed for the fast bcopy results in 8 bytes being |
180 | * wasted. Getting 64 byte alignment, which _should_ be ideal for |
181 | * modern Intel CPUs, results in 40 bytes wasted and a significant drop |
182 | * in observed efficiency of the optimization, 97.9% -> 81.8%. |
183 | */ |
184 | #define MPKTHSIZE (offsetof(struct _mbuf_dummy, m_pktdat)) |
185 | #define IXGBE_RX_COPY_HDR_PADDED ((((MPKTHSIZE - 1) / 32) + 1) * 32) |
186 | #define IXGBE_RX_COPY_LEN (MSIZE - IXGBE_RX_COPY_HDR_PADDED) |
187 | #define IXGBE_RX_COPY_ALIGN (IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE) |
188 | |
189 | /* Keep older OS drivers building... */ |
190 | #if !defined(SYSCTL_ADD_UQUAD) |
191 | #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD |
192 | #endif |
193 | |
194 | /* Defines for printing debug information */ |
195 | #define DEBUG_INIT 0 |
196 | #define DEBUG_IOCTL 0 |
197 | #define DEBUG_HW 0 |
198 | |
199 | #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") |
200 | #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) |
201 | #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) |
202 | #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") |
203 | #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) |
204 | #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) |
205 | #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") |
206 | #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) |
207 | #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) |
208 | |
209 | #define MAX_NUM_MULTICAST_ADDRESSES 128 |
210 | #define IXGBE_82598_SCATTER 100 |
211 | #define IXGBE_82599_SCATTER 32 |
212 | #define MSIX_82598_BAR 3 |
213 | #define MSIX_82599_BAR 4 |
214 | #define IXGBE_TSO_SIZE 262140 |
215 | #define IXGBE_TX_BUFFER_SIZE ((u32) 1514) |
216 | #define IXGBE_RX_HDR 128 |
217 | #define IXGBE_VFTA_SIZE 128 |
218 | #define IXGBE_BR_SIZE 4096 |
219 | #define IXGBE_QUEUE_MIN_FREE 32 |
220 | |
221 | /* IOCTL define to gather SFP+ Diagnostic data */ |
222 | #define SIOCGI2C SIOCGIFGENERIC |
223 | |
224 | /* Offload bits in mbuf flag */ |
225 | #define M_CSUM_OFFLOAD \ |
226 | (M_CSUM_IPv4|M_CSUM_UDPv4|M_CSUM_TCPv4|M_CSUM_UDPv6|M_CSUM_TCPv6) |
227 | |
228 | /* |
229 | * Interrupt Moderation parameters |
230 | */ |
231 | #define IXGBE_LOW_LATENCY 128 |
232 | #define IXGBE_AVE_LATENCY 400 |
233 | #define IXGBE_BULK_LATENCY 1200 |
234 | #define IXGBE_LINK_ITR 2000 |
235 | |
236 | |
237 | /* |
238 | ***************************************************************************** |
239 | * vendor_info_array |
240 | * |
241 | * This array contains the list of Subvendor/Subdevice IDs on which the driver |
242 | * should load. |
243 | * |
244 | ***************************************************************************** |
245 | */ |
246 | typedef struct _ixgbe_vendor_info_t { |
247 | unsigned int vendor_id; |
248 | unsigned int device_id; |
249 | unsigned int subvendor_id; |
250 | unsigned int subdevice_id; |
251 | unsigned int index; |
252 | } ixgbe_vendor_info_t; |
253 | |
254 | /* This is used to get SFP+ module data */ |
255 | struct ixgbe_i2c_req { |
256 | u8 dev_addr; |
257 | u8 offset; |
258 | u8 len; |
259 | u8 data[8]; |
260 | }; |
261 | |
262 | struct ixgbe_tx_buf { |
263 | union ixgbe_adv_tx_desc *eop; |
264 | struct mbuf *m_head; |
265 | bus_dmamap_t map; |
266 | }; |
267 | |
268 | struct ixgbe_rx_buf { |
269 | struct mbuf *buf; |
270 | struct mbuf *fmp; |
271 | bus_dmamap_t pmap; |
272 | u_int flags; |
273 | #define IXGBE_RX_COPY 0x01 |
274 | uint64_t addr; |
275 | }; |
276 | |
277 | /* |
278 | * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free. |
279 | */ |
280 | struct ixgbe_dma_alloc { |
281 | bus_addr_t dma_paddr; |
282 | void *dma_vaddr; |
283 | ixgbe_dma_tag_t *dma_tag; |
284 | bus_dmamap_t dma_map; |
285 | bus_dma_segment_t dma_seg; |
286 | bus_size_t dma_size; |
287 | }; |
288 | |
289 | /* |
290 | ** Driver queue struct: this is the interrupt container |
291 | ** for the associated tx and rx ring. |
292 | */ |
293 | struct ix_queue { |
294 | struct adapter *adapter; |
295 | u32 msix; /* This queue's MSIX vector */ |
296 | u32 eims; /* This queue's EIMS bit */ |
297 | u32 eitr_setting; |
298 | struct resource *res; |
299 | void *tag; |
300 | struct tx_ring *txr; |
301 | struct rx_ring *rxr; |
302 | void *que_si; |
303 | u64 irqs; |
304 | char namebuf[32]; |
305 | char evnamebuf[32]; |
306 | }; |
307 | |
308 | /* |
309 | * The transmit ring, one per queue |
310 | */ |
311 | struct tx_ring { |
312 | struct adapter *adapter; |
313 | kmutex_t tx_mtx; |
314 | u32 me; |
315 | struct timeval watchdog_time; |
316 | union ixgbe_adv_tx_desc *tx_base; |
317 | struct ixgbe_tx_buf *tx_buffers; |
318 | struct ixgbe_dma_alloc txdma; |
319 | volatile u16 tx_avail; |
320 | u16 next_avail_desc; |
321 | u16 next_to_clean; |
322 | u32 process_limit; |
323 | u16 num_desc; |
324 | enum { |
325 | IXGBE_QUEUE_IDLE, |
326 | IXGBE_QUEUE_WORKING, |
327 | IXGBE_QUEUE_HUNG, |
328 | } queue_status; |
329 | u32 txd_cmd; |
330 | ixgbe_dma_tag_t *txtag; |
331 | char mtx_name[16]; |
332 | #ifndef IXGBE_LEGACY_TX |
333 | struct buf_ring *br; |
334 | void *txq_si; |
335 | #endif |
336 | #ifdef IXGBE_FDIR |
337 | u16 atr_sample; |
338 | u16 atr_count; |
339 | #endif |
340 | u32 bytes; /* used for AIM */ |
341 | u32 packets; |
342 | /* Soft Stats */ |
343 | struct evcnt tso_tx; |
344 | struct evcnt no_tx_map_avail; |
345 | struct evcnt no_desc_avail; |
346 | struct evcnt total_packets; |
347 | }; |
348 | |
349 | |
350 | /* |
351 | * The Receive ring, one per rx queue |
352 | */ |
353 | struct rx_ring { |
354 | struct adapter *adapter; |
355 | kmutex_t rx_mtx; |
356 | u32 me; |
357 | union ixgbe_adv_rx_desc *rx_base; |
358 | struct ixgbe_dma_alloc rxdma; |
359 | #ifdef LRO |
360 | struct lro_ctrl lro; |
361 | #endif /* LRO */ |
362 | bool lro_enabled; |
363 | bool hw_rsc; |
364 | bool vtag_strip; |
365 | u16 next_to_refresh; |
366 | u16 next_to_check; |
367 | u16 num_desc; |
368 | u16 mbuf_sz; |
369 | u32 process_limit; |
370 | char mtx_name[16]; |
371 | struct ixgbe_rx_buf *rx_buffers; |
372 | ixgbe_dma_tag_t *ptag; |
373 | |
374 | u32 bytes; /* Used for AIM calc */ |
375 | u32 packets; |
376 | |
377 | /* Soft stats */ |
378 | struct evcnt rx_irq; |
379 | struct evcnt rx_copies; |
380 | struct evcnt rx_packets; |
381 | struct evcnt rx_bytes; |
382 | struct evcnt rx_discarded; |
383 | struct evcnt no_jmbuf; |
384 | u64 rsc_num; |
385 | #ifdef IXGBE_FDIR |
386 | u64 flm; |
387 | #endif |
388 | }; |
389 | |
390 | /* Our adapter structure */ |
391 | struct adapter { |
392 | struct ifnet *ifp; |
393 | struct ixgbe_hw hw; |
394 | |
395 | struct ixgbe_osdep osdep; |
396 | device_t dev; |
397 | |
398 | struct resource *pci_mem; |
399 | struct resource *msix_mem; |
400 | |
401 | /* |
402 | * Interrupt resources: this set is |
403 | * either used for legacy, or for Link |
404 | * when doing MSIX |
405 | */ |
406 | void *tag; |
407 | struct resource *res; |
408 | |
409 | struct ifmedia media; |
410 | callout_t timer; |
411 | int msix; |
412 | int if_flags; |
413 | |
414 | kmutex_t core_mtx; |
415 | |
416 | unsigned int num_queues; |
417 | |
418 | /* |
419 | ** Shadow VFTA table, this is needed because |
420 | ** the real vlan filter table gets cleared during |
421 | ** a soft reset and the driver needs to be able |
422 | ** to repopulate it. |
423 | */ |
424 | u32 shadow_vfta[IXGBE_VFTA_SIZE]; |
425 | |
426 | /* Info about the interface */ |
427 | u32 optics; |
428 | u32 fc; /* local flow ctrl setting */ |
429 | int advertise; /* link speeds */ |
430 | bool link_active; |
431 | u16 max_frame_size; |
432 | u16 num_segs; |
433 | u32 link_speed; |
434 | bool link_up; |
435 | u32 linkvec; |
436 | |
437 | /* Mbuf cluster size */ |
438 | u32 rx_mbuf_sz; |
439 | |
440 | /* Support for pluggable optics */ |
441 | bool sfp_probe; |
442 | void *link_si; /* Link tasklet */ |
443 | void *mod_si; /* SFP tasklet */ |
444 | void *msf_si; /* Multispeed Fiber */ |
445 | #ifdef IXGBE_FDIR |
446 | int fdir_reinit; |
447 | void *fdir_si; |
448 | #endif |
449 | |
450 | /* |
451 | ** Queues: |
452 | ** This is the irq holder, it has |
453 | ** and RX/TX pair or rings associated |
454 | ** with it. |
455 | */ |
456 | struct ix_queue *queues; |
457 | |
458 | /* |
459 | * Transmit rings: |
460 | * Allocated at run time, an array of rings. |
461 | */ |
462 | struct tx_ring *tx_rings; |
463 | u32 num_tx_desc; |
464 | |
465 | /* |
466 | * Receive rings: |
467 | * Allocated at run time, an array of rings. |
468 | */ |
469 | struct rx_ring *rx_rings; |
470 | u64 que_mask; |
471 | u32 num_rx_desc; |
472 | |
473 | /* Multicast array memory */ |
474 | u8 *mta; |
475 | |
476 | |
477 | /* Misc stats maintained by the driver */ |
478 | struct evcnt dropped_pkts; |
479 | struct evcnt mbuf_defrag_failed; |
480 | struct evcnt ; |
481 | struct evcnt mbuf_packet_failed; |
482 | struct evcnt efbig_tx_dma_setup; |
483 | struct evcnt efbig2_tx_dma_setup; |
484 | struct evcnt m_defrag_failed; |
485 | struct evcnt einval_tx_dma_setup; |
486 | struct evcnt other_tx_dma_setup; |
487 | struct evcnt eagain_tx_dma_setup; |
488 | struct evcnt enomem_tx_dma_setup; |
489 | struct evcnt watchdog_events; |
490 | struct evcnt tso_err; |
491 | struct evcnt link_irq; |
492 | struct evcnt morerx; |
493 | struct evcnt moretx; |
494 | struct evcnt txloops; |
495 | struct evcnt handleq; |
496 | struct evcnt req; |
497 | |
498 | struct ixgbe_hw_stats stats; |
499 | struct sysctllog *sysctllog; |
500 | ixgbe_extmem_head_t jcl_head; |
501 | }; |
502 | |
503 | |
504 | /* Precision Time Sync (IEEE 1588) defines */ |
505 | #define ETHERTYPE_IEEE1588 0x88F7 |
506 | #define PICOSECS_PER_TICK 20833 |
507 | #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ |
508 | #define IXGBE_ADVTXD_TSTAMP 0x00080000 |
509 | |
510 | |
511 | #define IXGBE_CORE_LOCK_INIT(_sc, _name) \ |
512 | mutex_init(&(_sc)->core_mtx, MUTEX_DEFAULT, IPL_SOFTNET) |
513 | #define IXGBE_CORE_LOCK_DESTROY(_sc) mutex_destroy(&(_sc)->core_mtx) |
514 | #define IXGBE_TX_LOCK_DESTROY(_sc) mutex_destroy(&(_sc)->tx_mtx) |
515 | #define IXGBE_RX_LOCK_DESTROY(_sc) mutex_destroy(&(_sc)->rx_mtx) |
516 | #define IXGBE_CORE_LOCK(_sc) mutex_enter(&(_sc)->core_mtx) |
517 | #define IXGBE_TX_LOCK(_sc) mutex_enter(&(_sc)->tx_mtx) |
518 | #define IXGBE_TX_TRYLOCK(_sc) mutex_tryenter(&(_sc)->tx_mtx) |
519 | #define IXGBE_RX_LOCK(_sc) mutex_enter(&(_sc)->rx_mtx) |
520 | #define IXGBE_CORE_UNLOCK(_sc) mutex_exit(&(_sc)->core_mtx) |
521 | #define IXGBE_TX_UNLOCK(_sc) mutex_exit(&(_sc)->tx_mtx) |
522 | #define IXGBE_RX_UNLOCK(_sc) mutex_exit(&(_sc)->rx_mtx) |
523 | #define IXGBE_CORE_LOCK_ASSERT(_sc) KASSERT(mutex_owned(&(_sc)->core_mtx)) |
524 | #define IXGBE_TX_LOCK_ASSERT(_sc) KASSERT(mutex_owned(&(_sc)->tx_mtx)) |
525 | |
526 | static inline bool |
527 | ixgbe_is_sfp(struct ixgbe_hw *hw) |
528 | { |
529 | switch (hw->phy.type) { |
530 | case ixgbe_phy_sfp_avago: |
531 | case ixgbe_phy_sfp_ftl: |
532 | case ixgbe_phy_sfp_intel: |
533 | case ixgbe_phy_sfp_unknown: |
534 | case ixgbe_phy_sfp_passive_tyco: |
535 | case ixgbe_phy_sfp_passive_unknown: |
536 | return TRUE; |
537 | default: |
538 | return FALSE; |
539 | } |
540 | } |
541 | |
542 | /* Workaround to make 8.0 buildable */ |
543 | #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504 |
544 | static __inline int |
545 | drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br) |
546 | { |
547 | #ifdef ALTQ |
548 | if (ALTQ_IS_ENABLED(&ifp->if_snd)) |
549 | return (1); |
550 | #endif |
551 | return (!buf_ring_empty(br)); |
552 | } |
553 | #endif |
554 | |
555 | /* |
556 | ** Find the number of unrefreshed RX descriptors |
557 | */ |
558 | static inline u16 |
559 | ixgbe_rx_unrefreshed(struct rx_ring *rxr) |
560 | { |
561 | if (rxr->next_to_check > rxr->next_to_refresh) |
562 | return (rxr->next_to_check - rxr->next_to_refresh - 1); |
563 | else |
564 | return ((rxr->num_desc + rxr->next_to_check) - |
565 | rxr->next_to_refresh - 1); |
566 | } |
567 | |
568 | #endif /* _IXGBE_H_ */ |
569 | |