1 | /* $NetBSD: nouveau_subdev_therm_nv84.c,v 1.1.1.1 2014/08/06 12:36:32 riastradh Exp $ */ |
2 | |
3 | /* |
4 | * Copyright 2012 Red Hat Inc. |
5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), |
8 | * to deal in the Software without restriction, including without limitation |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
10 | * and/or sell copies of the Software, and to permit persons to whom the |
11 | * Software is furnished to do so, subject to the following conditions: |
12 | * |
13 | * The above copyright notice and this permission notice shall be included in |
14 | * all copies or substantial portions of the Software. |
15 | * |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
22 | * OTHER DEALINGS IN THE SOFTWARE. |
23 | * |
24 | * Authors: Ben Skeggs |
25 | * Martin Peres |
26 | */ |
27 | |
28 | #include <sys/cdefs.h> |
29 | __KERNEL_RCSID(0, "$NetBSD: nouveau_subdev_therm_nv84.c,v 1.1.1.1 2014/08/06 12:36:32 riastradh Exp $" ); |
30 | |
31 | #include "priv.h" |
32 | |
33 | struct nv84_therm_priv { |
34 | struct nouveau_therm_priv base; |
35 | }; |
36 | |
37 | int |
38 | nv84_temp_get(struct nouveau_therm *therm) |
39 | { |
40 | return nv_rd32(therm, 0x20400); |
41 | } |
42 | |
43 | static void |
44 | nv84_therm_program_alarms(struct nouveau_therm *therm) |
45 | { |
46 | struct nouveau_therm_priv *priv = (void *)therm; |
47 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; |
48 | unsigned long flags; |
49 | |
50 | spin_lock_irqsave(&priv->sensor.alarm_program_lock, flags); |
51 | |
52 | /* enable RISING and FALLING IRQs for shutdown, THRS 0, 1, 2 and 4 */ |
53 | nv_wr32(therm, 0x20000, 0x000003ff); |
54 | |
55 | /* shutdown: The computer should be shutdown when reached */ |
56 | nv_wr32(therm, 0x20484, sensor->thrs_shutdown.hysteresis); |
57 | nv_wr32(therm, 0x20480, sensor->thrs_shutdown.temp); |
58 | |
59 | /* THRS_1 : fan boost*/ |
60 | nv_wr32(therm, 0x204c4, sensor->thrs_fan_boost.temp); |
61 | |
62 | /* THRS_2 : critical */ |
63 | nv_wr32(therm, 0x204c0, sensor->thrs_critical.temp); |
64 | |
65 | /* THRS_4 : down clock */ |
66 | nv_wr32(therm, 0x20414, sensor->thrs_down_clock.temp); |
67 | spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags); |
68 | |
69 | nv_debug(therm, |
70 | "Programmed thresholds [ %d(%d), %d(%d), %d(%d), %d(%d) ]\n" , |
71 | sensor->thrs_fan_boost.temp, sensor->thrs_fan_boost.hysteresis, |
72 | sensor->thrs_down_clock.temp, |
73 | sensor->thrs_down_clock.hysteresis, |
74 | sensor->thrs_critical.temp, sensor->thrs_critical.hysteresis, |
75 | sensor->thrs_shutdown.temp, sensor->thrs_shutdown.hysteresis); |
76 | |
77 | } |
78 | |
79 | /* must be called with alarm_program_lock taken ! */ |
80 | static void |
81 | nv84_therm_threshold_hyst_emulation(struct nouveau_therm *therm, |
82 | uint32_t thrs_reg, u8 status_bit, |
83 | const struct nvbios_therm_threshold *thrs, |
84 | enum nouveau_therm_thrs thrs_name) |
85 | { |
86 | enum nouveau_therm_thrs_direction direction; |
87 | enum nouveau_therm_thrs_state prev_state, new_state; |
88 | int temp, cur; |
89 | |
90 | prev_state = nouveau_therm_sensor_get_threshold_state(therm, thrs_name); |
91 | temp = nv_rd32(therm, thrs_reg); |
92 | |
93 | /* program the next threshold */ |
94 | if (temp == thrs->temp) { |
95 | nv_wr32(therm, thrs_reg, thrs->temp - thrs->hysteresis); |
96 | new_state = NOUVEAU_THERM_THRS_HIGHER; |
97 | } else { |
98 | nv_wr32(therm, thrs_reg, thrs->temp); |
99 | new_state = NOUVEAU_THERM_THRS_LOWER; |
100 | } |
101 | |
102 | /* fix the state (in case someone reprogrammed the alarms) */ |
103 | cur = therm->temp_get(therm); |
104 | if (new_state == NOUVEAU_THERM_THRS_LOWER && cur > thrs->temp) |
105 | new_state = NOUVEAU_THERM_THRS_HIGHER; |
106 | else if (new_state == NOUVEAU_THERM_THRS_HIGHER && |
107 | cur < thrs->temp - thrs->hysteresis) |
108 | new_state = NOUVEAU_THERM_THRS_LOWER; |
109 | nouveau_therm_sensor_set_threshold_state(therm, thrs_name, new_state); |
110 | |
111 | /* find the direction */ |
112 | if (prev_state < new_state) |
113 | direction = NOUVEAU_THERM_THRS_RISING; |
114 | else if (prev_state > new_state) |
115 | direction = NOUVEAU_THERM_THRS_FALLING; |
116 | else |
117 | return; |
118 | |
119 | /* advertise a change in direction */ |
120 | nouveau_therm_sensor_event(therm, thrs_name, direction); |
121 | } |
122 | |
123 | static void |
124 | nv84_therm_intr(struct nouveau_subdev *subdev) |
125 | { |
126 | struct nouveau_therm *therm = nouveau_therm(subdev); |
127 | struct nouveau_therm_priv *priv = (void *)therm; |
128 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; |
129 | unsigned long flags; |
130 | uint32_t intr; |
131 | |
132 | spin_lock_irqsave(&priv->sensor.alarm_program_lock, flags); |
133 | |
134 | intr = nv_rd32(therm, 0x20100) & 0x3ff; |
135 | |
136 | /* THRS_4: downclock */ |
137 | if (intr & 0x002) { |
138 | nv84_therm_threshold_hyst_emulation(therm, 0x20414, 24, |
139 | &sensor->thrs_down_clock, |
140 | NOUVEAU_THERM_THRS_DOWNCLOCK); |
141 | intr &= ~0x002; |
142 | } |
143 | |
144 | /* shutdown */ |
145 | if (intr & 0x004) { |
146 | nv84_therm_threshold_hyst_emulation(therm, 0x20480, 20, |
147 | &sensor->thrs_shutdown, |
148 | NOUVEAU_THERM_THRS_SHUTDOWN); |
149 | intr &= ~0x004; |
150 | } |
151 | |
152 | /* THRS_1 : fan boost */ |
153 | if (intr & 0x008) { |
154 | nv84_therm_threshold_hyst_emulation(therm, 0x204c4, 21, |
155 | &sensor->thrs_fan_boost, |
156 | NOUVEAU_THERM_THRS_FANBOOST); |
157 | intr &= ~0x008; |
158 | } |
159 | |
160 | /* THRS_2 : critical */ |
161 | if (intr & 0x010) { |
162 | nv84_therm_threshold_hyst_emulation(therm, 0x204c0, 22, |
163 | &sensor->thrs_critical, |
164 | NOUVEAU_THERM_THRS_CRITICAL); |
165 | intr &= ~0x010; |
166 | } |
167 | |
168 | if (intr) |
169 | nv_error(therm, "unhandled intr 0x%08x\n" , intr); |
170 | |
171 | /* ACK everything */ |
172 | nv_wr32(therm, 0x20100, 0xffffffff); |
173 | nv_wr32(therm, 0x1100, 0x10000); /* PBUS */ |
174 | |
175 | spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags); |
176 | } |
177 | |
178 | static int |
179 | nv84_therm_ctor(struct nouveau_object *parent, |
180 | struct nouveau_object *engine, |
181 | struct nouveau_oclass *oclass, void *data, u32 size, |
182 | struct nouveau_object **pobject) |
183 | { |
184 | struct nv84_therm_priv *priv; |
185 | int ret; |
186 | |
187 | ret = nouveau_therm_create(parent, engine, oclass, &priv); |
188 | *pobject = nv_object(priv); |
189 | if (ret) |
190 | return ret; |
191 | |
192 | priv->base.base.pwm_ctrl = nv50_fan_pwm_ctrl; |
193 | priv->base.base.pwm_get = nv50_fan_pwm_get; |
194 | priv->base.base.pwm_set = nv50_fan_pwm_set; |
195 | priv->base.base.pwm_clock = nv50_fan_pwm_clock; |
196 | priv->base.base.temp_get = nv84_temp_get; |
197 | priv->base.sensor.program_alarms = nv84_therm_program_alarms; |
198 | nv_subdev(priv)->intr = nv84_therm_intr; |
199 | |
200 | /* init the thresholds */ |
201 | nouveau_therm_sensor_set_threshold_state(&priv->base.base, |
202 | NOUVEAU_THERM_THRS_SHUTDOWN, |
203 | NOUVEAU_THERM_THRS_LOWER); |
204 | nouveau_therm_sensor_set_threshold_state(&priv->base.base, |
205 | NOUVEAU_THERM_THRS_FANBOOST, |
206 | NOUVEAU_THERM_THRS_LOWER); |
207 | nouveau_therm_sensor_set_threshold_state(&priv->base.base, |
208 | NOUVEAU_THERM_THRS_CRITICAL, |
209 | NOUVEAU_THERM_THRS_LOWER); |
210 | nouveau_therm_sensor_set_threshold_state(&priv->base.base, |
211 | NOUVEAU_THERM_THRS_DOWNCLOCK, |
212 | NOUVEAU_THERM_THRS_LOWER); |
213 | |
214 | return nouveau_therm_preinit(&priv->base.base); |
215 | } |
216 | |
217 | int |
218 | nv84_therm_fini(struct nouveau_object *object, bool suspend) |
219 | { |
220 | /* Disable PTherm IRQs */ |
221 | nv_wr32(object, 0x20000, 0x00000000); |
222 | |
223 | /* ACK all PTherm IRQs */ |
224 | nv_wr32(object, 0x20100, 0xffffffff); |
225 | nv_wr32(object, 0x1100, 0x10000); /* PBUS */ |
226 | |
227 | return _nouveau_therm_fini(object, suspend); |
228 | } |
229 | |
230 | struct nouveau_oclass |
231 | nv84_therm_oclass = { |
232 | .handle = NV_SUBDEV(THERM, 0x84), |
233 | .ofuncs = &(struct nouveau_ofuncs) { |
234 | .ctor = nv84_therm_ctor, |
235 | .dtor = _nouveau_therm_dtor, |
236 | .init = _nouveau_therm_init, |
237 | .fini = nv84_therm_fini, |
238 | }, |
239 | }; |
240 | |