1 | /* $NetBSD: pciide_sl82c105_reg.h,v 1.6 2008/04/28 20:23:55 martin Exp $ */ |
2 | |
3 | /*- |
4 | * Copyright (c) 2002 The NetBSD Foundation, Inc. |
5 | * All rights reserved. |
6 | * |
7 | * This code is derived from software contributed to The NetBSD Foundation |
8 | * by Jason R. Thorpe. |
9 | * |
10 | * Redistribution and use in source and binary forms, with or without |
11 | * modification, are permitted provided that the following conditions |
12 | * are met: |
13 | * 1. Redistributions of source code must retain the above copyright |
14 | * notice, this list of conditions and the following disclaimer. |
15 | * 2. Redistributions in binary form must reproduce the above copyright |
16 | * notice, this list of conditions and the following disclaimer in the |
17 | * documentation and/or other materials provided with the distribution. |
18 | * |
19 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
20 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
21 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
22 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
23 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
24 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
25 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
29 | * POSSIBILITY OF SUCH DAMAGE. |
30 | */ |
31 | |
32 | /* |
33 | * Register definitions for the Symphony Labs 82C105 PCI IDE |
34 | * interface. This 82C105 is also found embedded in the Winbond |
35 | * 83C553 Southbridge. |
36 | */ |
37 | |
38 | /* PCI configuration space registers */ |
39 | |
40 | #define SYMPH_PORT0_P (PCI_MAPREG_START + 0x00) /* port 0 primary */ |
41 | #define SYMPH_PORT0_S (PCI_MAPREG_START + 0x04) /* port 0 secondary */ |
42 | #define SYMPH_PORT1_P (PCI_MAPREG_START + 0x08) /* port 1 primary */ |
43 | #define SYMPH_PORT1_S (PCI_MAPREG_START + 0x0c) /* port 1 secondary */ |
44 | #define SYMPH_BMIDER (PCI_MAPREG_START + 0x10) /* bus master regs */ |
45 | |
46 | #define SYMPH_IDECSR 0x40 /* IDE control/status */ |
47 | #define SYMPH_P0D0CR 0x44 /* port 0 drive 0 control */ |
48 | #define SYMPH_P0D1CR 0x48 /* port 0 drive 1 control */ |
49 | #define SYMPH_P1D0CR 0x4c /* port 1 drive 0 control */ |
50 | #define SYMPH_P1D1CR 0x50 /* port 1 drive 1 control */ |
51 | |
52 | #define IDECR_IDE_IRQB (1U << 30) /* IDE_IRQB signal */ |
53 | #define IDECR_IDE_IRQA (1U << 28) /* IDE_IRQA signal */ |
54 | #define IDECR_RA_SHIFT 16 /* read-ahead duration */ |
55 | #define IDECR_RA_MASK (0x7ff << IDECR_RA_SHIFT) |
56 | #define IDECR_LEGIRQ (1U << 11) /* don't use legacy IRQ mode */ |
57 | #define IDECR_P1F16 (1U << 5) /* port 1 fast 16 */ |
58 | #define IDECR_P1EN (1U << 4) /* port 1 enable */ |
59 | #define IDECR_P0F16 (1U << 1) /* port 0 fast 16 */ |
60 | #define IDECR_P0EN (1U << 0) /* port 0 enable */ |
61 | |
62 | #define PxDx_USR_SHIFT 16 /* user defined bits */ |
63 | #define PxDx_USR_MASK (0xff << PxDx_USR_SHIFT) |
64 | #define PxDx_CMD_ON_SHIFT 8 /* CMD ON time */ |
65 | #define PxDx_CMD_ON_MASK (0x1f << PxDx_CMD_ON_SHIFT) |
66 | #define PxDx_PWEN (1U << 7) /* posted write enable */ |
67 | #define PxDx_RDYEN (1U << 6) /* IOCHRDY enable */ |
68 | #define PxDx_RAEN (1U << 5) /* read-ahead enable */ |
69 | #define PxDx_CMD_OFF_MASK (0x1f) /* CMD OFF time */ |
70 | |
71 | /* |
72 | * IDE CMD ON and CMD OFF times for a 33MHz PCI bus clock. |
73 | * |
74 | * These come from Table 4-4 of the 83c553 manual. |
75 | */ |
76 | struct symph_cmdtime { |
77 | int cmd_on; /* cmd on time */ |
78 | int cmd_off; /* cmd off time */ |
79 | }; |
80 | |
81 | static const struct symph_cmdtime symph_pio_times[] |
82 | __unused = { |
83 | /* programmed actual */ |
84 | { 5, 13 }, /* 6, 14 */ |
85 | { 4, 7 }, /* 5, 8 */ |
86 | { 3, 4 }, /* 4, 5 */ |
87 | { 2, 2 }, /* 3, 3 */ |
88 | { 2, 0 }, /* 3, 1 */ |
89 | { 1, 0 }, /* 2, 1 */ |
90 | }; |
91 | |
92 | static const struct symph_cmdtime symph_sw_dma_times[] |
93 | __unused = { |
94 | /* programmed actual */ |
95 | { 15, 15 }, /* 16, 16 */ |
96 | }; |
97 | |
98 | static const struct symph_cmdtime symph_mw_dma_times[] |
99 | __unused = { |
100 | /* programmed actual */ |
101 | { 7, 7 }, /* 8, 8 */ |
102 | { 2, 1 }, /* 3, 2 */ |
103 | { 2, 0 }, /* 3, 1 */ |
104 | { 1, 0 }, /* 2, 1 */ |
105 | }; |
106 | |