1/* $NetBSD: nouveau_engine_device_gm100.c,v 1.1.1.1 2014/08/06 12:36:24 riastradh Exp $ */
2
3/*
4 * Copyright 2012 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Ben Skeggs
25 */
26
27#include <sys/cdefs.h>
28__KERNEL_RCSID(0, "$NetBSD: nouveau_engine_device_gm100.c,v 1.1.1.1 2014/08/06 12:36:24 riastradh Exp $");
29
30#include <subdev/bios.h>
31#include <subdev/bus.h>
32#include <subdev/gpio.h>
33#include <subdev/i2c.h>
34#include <subdev/clock.h>
35#include <subdev/therm.h>
36#include <subdev/mxm.h>
37#include <subdev/devinit.h>
38#include <subdev/mc.h>
39#include <subdev/timer.h>
40#include <subdev/fb.h>
41#include <subdev/ltcg.h>
42#include <subdev/ibus.h>
43#include <subdev/instmem.h>
44#include <subdev/vm.h>
45#include <subdev/bar.h>
46#include <subdev/pwr.h>
47#include <subdev/volt.h>
48
49#include <engine/device.h>
50#include <engine/dmaobj.h>
51#include <engine/fifo.h>
52#include <engine/software.h>
53#include <engine/graph.h>
54#include <engine/disp.h>
55#include <engine/copy.h>
56#include <engine/bsp.h>
57#include <engine/vp.h>
58#include <engine/ppp.h>
59#include <engine/perfmon.h>
60
61int
62gm100_identify(struct nouveau_device *device)
63{
64 switch (device->chipset) {
65 case 0x117:
66 device->cname = "GM107";
67 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
68 device->oclass[NVDEV_SUBDEV_GPIO ] = &nve0_gpio_oclass;
69 device->oclass[NVDEV_SUBDEV_I2C ] = &nvd0_i2c_oclass;
70 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nve0_clock_oclass;
71#if 0
72 device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
73#endif
74 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
75 device->oclass[NVDEV_SUBDEV_DEVINIT] = gm107_devinit_oclass;
76 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
77 device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass;
78 device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
79 device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass;
80 device->oclass[NVDEV_SUBDEV_LTCG ] = gm107_ltcg_oclass;
81 device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass;
82 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
83 device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
84 device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
85#if 0
86 device->oclass[NVDEV_SUBDEV_PWR ] = &nv108_pwr_oclass;
87 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
88#endif
89 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;
90 device->oclass[NVDEV_ENGINE_FIFO ] = nv108_fifo_oclass;
91 device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
92 device->oclass[NVDEV_ENGINE_GR ] = gm107_graph_oclass;
93 device->oclass[NVDEV_ENGINE_DISP ] = gm107_disp_oclass;
94 device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
95#if 0
96 device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass;
97#endif
98 device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass;
99#if 0
100 device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass;
101 device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass;
102 device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
103#endif
104 break;
105 default:
106 nv_fatal(device, "unknown Maxwell chipset\n");
107 return -EINVAL;
108 }
109
110 return 0;
111}
112