1 | /* $NetBSD: aic7xxx_osm.h,v 1.25 2010/11/13 13:52:00 uebayasi Exp $ */ |
2 | |
3 | /* |
4 | * NetBSD platform specific driver option settings, data structures, |
5 | * function declarations and includes. |
6 | * |
7 | * Copyright (c) 1994-2001 Justin T. Gibbs. |
8 | * All rights reserved. |
9 | * |
10 | * Redistribution and use in source and binary forms, with or without |
11 | * modification, are permitted provided that the following conditions |
12 | * are met: |
13 | * 1. Redistributions of source code must retain the above copyright |
14 | * notice, this list of conditions, and the following disclaimer, |
15 | * without modification. |
16 | * 2. The name of the author may not be used to endorse or promote products |
17 | * derived from this software without specific prior written permission. |
18 | * |
19 | * Alternatively, this software may be distributed under the terms of the |
20 | * GNU Public License ("GPL"). |
21 | * |
22 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
23 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
25 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR |
26 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
28 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
29 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
30 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
31 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
32 | * SUCH DAMAGE. |
33 | * |
34 | * //depot/aic7xxx/freebsd/dev/aic7xxx/aic7xxx_osm.h#14 $ |
35 | * |
36 | * $FreeBSD: /repoman/r/ncvs/src/sys/dev/aic7xxx/aic7xxx_osm.h,v 1.20 2002/12/04 22:51:29 scottl Exp $ |
37 | */ |
38 | /* |
39 | * Ported from FreeBSD by Pascal Renauld, Network Storage Solutions, Inc. - April 2003 |
40 | */ |
41 | |
42 | #ifndef _AIC7XXX_NETBSD_H_ |
43 | #define _AIC7XXX_NETBSD_H_ |
44 | |
45 | #include "opt_ahc.h" /* for config options */ |
46 | |
47 | #include <sys/param.h> |
48 | #include <sys/kernel.h> |
49 | #include <sys/systm.h> |
50 | #include <sys/device.h> |
51 | #include <sys/malloc.h> |
52 | #include <sys/buf.h> |
53 | #include <sys/proc.h> |
54 | #include <sys/scsiio.h> |
55 | #include <sys/reboot.h> |
56 | #include <sys/kthread.h> |
57 | |
58 | #include <dev/pci/pcireg.h> |
59 | #include <dev/pci/pcivar.h> |
60 | |
61 | #include <sys/bus.h> |
62 | #include <sys/intr.h> |
63 | |
64 | #include <dev/scsipi/scsi_all.h> |
65 | #include <dev/scsipi/scsipi_all.h> |
66 | #include <dev/scsipi/scsi_message.h> |
67 | #include <dev/scsipi/scsipi_debug.h> |
68 | #include <dev/scsipi/scsiconf.h> |
69 | #include <dev/scsipi/scsi_iu.h> |
70 | |
71 | #ifdef CAM_NEW_TRAN_CODE |
72 | #define AHC_NEW_TRAN_SETTINGS |
73 | #endif /* CAM_NEW_TRAN_CODE */ |
74 | |
75 | |
76 | /****************************** Platform Macros *******************************/ |
77 | #define SIM_IS_SCSIBUS_B(ahc, sim) \ |
78 | ((sim) == ahc->platform_data->sim_b) |
79 | #define SIM_CHANNEL(ahc, sim) \ |
80 | (((sim) == ahc->platform_data->sim_b) ? 'B' : 'A') |
81 | #define SIM_SCSI_ID(ahc, sim) \ |
82 | (((sim) == ahc->platform_data->sim_b) ? ahc->our_id_b : ahc->our_id) |
83 | #define SIM_PATH(ahc, sim) \ |
84 | (((sim) == ahc->platform_data->sim_b) ? ahc->platform_data->path_b \ |
85 | : ahc->platform_data->path) |
86 | #define BUILD_SCSIID(ahc, sim, target_id, our_id) \ |
87 | ((((target_id) << TID_SHIFT) & TID) | (our_id)) |
88 | |
89 | #define SCB_GET_SIM(ahc, scb) \ |
90 | (SCB_GET_CHANNEL(ahc, scb) == 'A' ? (ahc)->platform_data->sim \ |
91 | : (ahc)->platform_data->sim_b) |
92 | |
93 | #ifndef offsetof |
94 | #define offsetof(type, member) ((size_t)(&((type *)0)->member)) |
95 | #endif |
96 | /************************* Forward Declarations *******************************/ |
97 | typedef pcireg_t ahc_dev_softc_t; |
98 | |
99 | /***************************** Bus Space/DMA **********************************/ |
100 | #define ahc_dma_tag_create(ahc, parent_tag, alignment, boundary, \ |
101 | lowaddr, highaddr, filter, filterarg, \ |
102 | maxsize, nsegments, maxsegsz, flags, \ |
103 | dma_tagp) \ |
104 | bus_dma_tag_create(parent_tag, alignment, boundary, \ |
105 | lowaddr, highaddr, filter, filterarg, \ |
106 | maxsize, nsegments, maxsegsz, flags, \ |
107 | dma_tagp) |
108 | |
109 | #define ahc_dma_tag_destroy(ahc, tag) \ |
110 | bus_dma_tag_destroy(tag) |
111 | |
112 | #define ahc_dmamem_alloc(ahc, dmat, vaddr, flags, mapp) \ |
113 | bus_dmamem_alloc(dmat, vaddr, flags, mapp) |
114 | |
115 | #define ahc_dmamem_free(ahc, dmat, vaddr, map) \ |
116 | bus_dmamem_free(dmat, vaddr, map) |
117 | |
118 | #define ahc_dmamap_create(ahc, tag, flags, mapp) \ |
119 | bus_dmamap_create(tag, flags, mapp) |
120 | |
121 | #define ahc_dmamap_destroy(ahc, tag, map) \ |
122 | bus_dmamap_destroy(tag, map) |
123 | |
124 | #define ahc_dmamap_load(ahc, dmat, map, addr, buflen, callback, \ |
125 | callback_arg, flags) \ |
126 | bus_dmamap_load(dmat, map, addr, buflen, callback, callback_arg, flags) |
127 | |
128 | #define ahc_dmamap_unload(ahc, tag, map) \ |
129 | bus_dmamap_unload(tag, map) |
130 | |
131 | /* XXX Need to update Bus DMA for partial map syncs */ |
132 | #define ahc_dmamap_sync(ahc, dma_tag, dmamap, offset, len, op) \ |
133 | bus_dmamap_sync(dma_tag, dmamap, offset, len, op) |
134 | |
135 | /************************ Tunable Driver Parameters **************************/ |
136 | /* |
137 | * The number of DMA segments supported. The sequencer can handle any number |
138 | * of physically contiguous S/G entrys. To reduce the driver's memory |
139 | * consumption, we limit the number supported to be sufficient to handle |
140 | * the largest mapping supported by the kernel, MAXPHYS. Assuming the |
141 | * transfer is as fragmented as possible and unaligned, this turns out to |
142 | * be the number of paged sized transfers in MAXPHYS plus an extra element |
143 | * to handle any unaligned residual. The sequencer fetches SG elements |
144 | * in cacheline sized chucks, so make the number per-transaction an even |
145 | * multiple of 16 which should align us on even the largest of cacheline |
146 | * boundaries. |
147 | */ |
148 | #define AHC_NSEG (roundup(btoc(MAXPHYS) + 1, 16)) |
149 | |
150 | /* This driver supports target mode */ |
151 | //#define AHC_TARGET_MODE 1 |
152 | |
153 | /************************** Softc/SCB Platform Data ***************************/ |
154 | struct ahc_platform_data { |
155 | /* |
156 | * Hooks into the XPT. |
157 | */ |
158 | #if 0 |
159 | struct cam_sim *sim; |
160 | struct cam_sim *sim_b; |
161 | struct cam_path *path; |
162 | struct cam_path *path_b; |
163 | |
164 | int regs_res_type; |
165 | int regs_res_id; |
166 | int irq_res_type; |
167 | struct resource *regs; |
168 | struct resource *irq; |
169 | void *ih; |
170 | eventhandler_tag eh; |
171 | #endif |
172 | }; |
173 | |
174 | struct scb_platform_data { |
175 | }; |
176 | |
177 | /********************************* Byte Order *********************************/ |
178 | #define ahc_htobe16(x) htobe16(x) |
179 | #define ahc_htobe32(x) htobe32(x) |
180 | #define ahc_htobe64(x) htobe64(x) |
181 | #define ahc_htole16(x) htole16(x) |
182 | #define ahc_htole32(x) htole32(x) |
183 | #define ahc_htole64(x) htole64(x) |
184 | |
185 | #define ahc_be16toh(x) be16toh(x) |
186 | #define ahc_be32toh(x) be32toh(x) |
187 | #define ahc_be64toh(x) be64toh(x) |
188 | #define ahc_le16toh(x) le16toh(x) |
189 | #define ahc_le32toh(x) le32toh(x) |
190 | #define ahc_le64toh(x) le64toh(x) |
191 | |
192 | /************************** Timer DataStructures ******************************/ |
193 | typedef struct callout ahc_timer_t; |
194 | |
195 | /***************************** Core Includes **********************************/ |
196 | #if AHC_REG_PRETTY_PRINT |
197 | #define AIC_DEBUG_REGISTERS 1 |
198 | #else |
199 | #define AIC_DEBUG_REGISTERS 0 |
200 | #endif |
201 | |
202 | #include <dev/ic/aic7xxxvar.h> |
203 | |
204 | /***************************** Timer Facilities *******************************/ |
205 | void ahc_timeout(void*); |
206 | |
207 | #define ahc_timer_init(x) callout_init(x, 0) |
208 | #define ahc_timer_stop callout_stop |
209 | |
210 | static __inline void |
211 | ahc_timer_reset(ahc_timer_t *timer, u_int usec, ahc_callback_t *func, void *arg) |
212 | { |
213 | callout_reset(timer, (usec * hz)/1000000, func, arg); |
214 | } |
215 | |
216 | static __inline void |
217 | ahc_scb_timer_reset(struct scb *scb, u_int usec) |
218 | { |
219 | if (!(scb->xs->xs_control & XS_CTL_POLL)) { |
220 | callout_reset(&scb->xs->xs_callout, |
221 | (usec * hz)/1000000, ahc_timeout, scb); |
222 | } |
223 | } |
224 | |
225 | /*************************** Device Access ************************************/ |
226 | #define ahc_inb(ahc, port) \ |
227 | bus_space_read_1((ahc)->tag, (ahc)->bsh, port) |
228 | |
229 | #define ahc_outb(ahc, port, value) \ |
230 | bus_space_write_1((ahc)->tag, (ahc)->bsh, port, value) |
231 | |
232 | #define ahc_outsb(ahc, port, valp, count) \ |
233 | bus_space_write_multi_1((ahc)->tag, (ahc)->bsh, port, valp, count) |
234 | |
235 | #define ahc_insb(ahc, port, valp, count) \ |
236 | bus_space_read_multi_1((ahc)->tag, (ahc)->bsh, port, valp, count) |
237 | |
238 | static __inline void ahc_flush_device_writes(struct ahc_softc *); |
239 | |
240 | static __inline void |
241 | ahc_flush_device_writes(struct ahc_softc *ahc) |
242 | { |
243 | /* XXX Is this sufficient for all architectures??? */ |
244 | (void)ahc_inb(ahc, INTSTAT); |
245 | } |
246 | |
247 | /**************************** Locking Primitives ******************************/ |
248 | /* Lock protecting internal data structures */ |
249 | static __inline void ahc_lockinit(struct ahc_softc *); |
250 | static __inline void ahc_lock(struct ahc_softc *, unsigned long *); |
251 | static __inline void ahc_unlock(struct ahc_softc *, unsigned long *); |
252 | |
253 | /* Lock held during command completion to the upper layer */ |
254 | static __inline void ahc_done_lockinit(struct ahc_softc *); |
255 | static __inline void ahc_done_lock(struct ahc_softc *, unsigned long *); |
256 | static __inline void ahc_done_unlock(struct ahc_softc *, unsigned long *); |
257 | |
258 | /* Lock held during ahc_list manipulation and ahc softc frees */ |
259 | static __inline void ahc_list_lockinit(void); |
260 | static __inline void ahc_list_lock(unsigned long *); |
261 | static __inline void ahc_list_unlock(unsigned long *); |
262 | |
263 | static __inline void |
264 | ahc_lockinit(struct ahc_softc *ahc) |
265 | { |
266 | } |
267 | |
268 | static __inline void |
269 | ahc_lock(struct ahc_softc *ahc, unsigned long *flags) |
270 | { |
271 | *flags = splbio(); |
272 | } |
273 | |
274 | static __inline void |
275 | ahc_unlock(struct ahc_softc *ahc, unsigned long *flags) |
276 | { |
277 | splx(*flags); |
278 | } |
279 | |
280 | /* Lock held during command completion to the upper layer */ |
281 | static __inline void |
282 | ahc_done_lockinit(struct ahc_softc *ahc) |
283 | { |
284 | } |
285 | |
286 | static __inline void |
287 | ahc_done_lock(struct ahc_softc *ahc, unsigned long *flags) |
288 | { |
289 | } |
290 | |
291 | static __inline void |
292 | ahc_done_unlock(struct ahc_softc *ahc, unsigned long *flags) |
293 | { |
294 | } |
295 | |
296 | /* Lock held during ahc_list manipulation and ahc softc frees */ |
297 | static __inline void |
298 | ahc_list_lockinit(void) |
299 | { |
300 | } |
301 | |
302 | static __inline void |
303 | ahc_list_lock(unsigned long *flags) |
304 | { |
305 | } |
306 | |
307 | static __inline void |
308 | ahc_list_unlock(unsigned long *flags) |
309 | { |
310 | } |
311 | /****************************** OS Primitives *********************************/ |
312 | #define ahc_delay DELAY |
313 | |
314 | /************************** Transaction Operations ****************************/ |
315 | static __inline void ahc_set_transaction_status(struct scb *, uint32_t); |
316 | static __inline void ahc_set_scsi_status(struct scb *, uint32_t); |
317 | static __inline uint32_t ahc_get_transaction_status(struct scb *); |
318 | static __inline uint32_t ahc_get_scsi_status(struct scb *); |
319 | static __inline void ahc_set_transaction_tag(struct scb *, int, u_int); |
320 | static __inline u_long ahc_get_transfer_length(struct scb *); |
321 | static __inline int ahc_get_transfer_dir(struct scb *); |
322 | static __inline void ahc_set_residual(struct scb *, u_long); |
323 | static __inline void ahc_set_sense_residual(struct scb *, u_long); |
324 | static __inline u_long ahc_get_residual(struct scb *); |
325 | static __inline int ahc_perform_autosense(struct scb *); |
326 | static __inline uint32_t ahc_get_sense_bufsize(struct ahc_softc *, |
327 | struct scb *); |
328 | static __inline void ahc_freeze_scb(struct scb *); |
329 | static __inline void ahc_platform_freeze_devq(struct ahc_softc *, struct scb *); |
330 | static __inline int ahc_platform_abort_scbs(struct ahc_softc *, int, char, |
331 | int, u_int, role_t, uint32_t); |
332 | |
333 | static __inline |
334 | void ahc_set_transaction_status(struct scb *scb, uint32_t status) |
335 | { |
336 | scb->xs->error = status; |
337 | } |
338 | |
339 | static __inline |
340 | void ahc_set_scsi_status(struct scb *scb, uint32_t status) |
341 | { |
342 | scb->xs->xs_status = status; |
343 | } |
344 | |
345 | static __inline |
346 | uint32_t ahc_get_transaction_status(struct scb *scb) |
347 | { |
348 | return (scb->xs->error); |
349 | } |
350 | |
351 | static __inline |
352 | uint32_t ahc_get_scsi_status(struct scb *scb) |
353 | { |
354 | return (scb->xs->xs_status); |
355 | } |
356 | |
357 | static __inline |
358 | void ahc_set_transaction_tag(struct scb *scb, int enabled, u_int type) |
359 | { |
360 | scb->xs->xs_tag_type = type; |
361 | } |
362 | |
363 | static __inline |
364 | u_long ahc_get_transfer_length(struct scb *scb) |
365 | { |
366 | return (scb->xs->datalen); |
367 | } |
368 | |
369 | static __inline |
370 | int ahc_get_transfer_dir(struct scb *scb) |
371 | { |
372 | return (scb->xs->xs_control & (XS_CTL_DATA_IN|XS_CTL_DATA_OUT)); |
373 | } |
374 | |
375 | static __inline |
376 | void ahc_set_residual(struct scb *scb, u_long resid) |
377 | { |
378 | scb->xs->resid = resid; |
379 | } |
380 | |
381 | static __inline |
382 | void ahc_set_sense_residual(struct scb *scb, u_long resid) |
383 | { |
384 | #ifdef notdef |
385 | scb->io_ctx->csio.sense_resid = resid; |
386 | #endif |
387 | } |
388 | |
389 | static __inline |
390 | u_long ahc_get_residual(struct scb *scb) |
391 | { |
392 | return (scb->xs->resid); |
393 | } |
394 | |
395 | static __inline |
396 | int ahc_perform_autosense(struct scb *scb) |
397 | { |
398 | return (!(scb->flags & SCB_SENSE)); |
399 | } |
400 | |
401 | static __inline uint32_t |
402 | ahc_get_sense_bufsize(struct ahc_softc *ahc, struct scb *scb) |
403 | { |
404 | return (sizeof(struct scsi_sense_data)); |
405 | } |
406 | |
407 | static __inline void |
408 | ahc_freeze_scb(struct scb *scb) |
409 | { |
410 | struct scsipi_xfer *xs = scb->xs; |
411 | |
412 | if (!(scb->flags & SCB_FREEZE_QUEUE)) { |
413 | scsipi_periph_freeze(xs->xs_periph, 1); |
414 | scb->flags |= SCB_FREEZE_QUEUE; |
415 | } |
416 | } |
417 | |
418 | static __inline void |
419 | ahc_platform_freeze_devq(struct ahc_softc *ahc, struct scb *scb) |
420 | { |
421 | } |
422 | |
423 | static __inline int |
424 | ahc_platform_abort_scbs(struct ahc_softc *ahc, int target, |
425 | char channel, int lun, u_int tag, |
426 | role_t role, uint32_t status) |
427 | { |
428 | return (0); |
429 | } |
430 | |
431 | static __inline void |
432 | ahc_platform_scb_free(struct ahc_softc *ahc, struct scb *scb) |
433 | { |
434 | #ifdef __FreeBSD__ |
435 | /* What do we do to generically handle driver resource shortages??? */ |
436 | if ((ahc->flags & AHC_RESOURCE_SHORTAGE) != 0 |
437 | && scb->io_ctx != NULL |
438 | && (scb->io_ctx->ccb_h.status & CAM_RELEASE_SIMQ) == 0) { |
439 | scb->io_ctx->ccb_h.status |= CAM_RELEASE_SIMQ; |
440 | ahc->flags &= ~AHC_RESOURCE_SHORTAGE; |
441 | } |
442 | scb->io_ctx = NULL; |
443 | #endif |
444 | } |
445 | |
446 | /********************************** PCI ***************************************/ |
447 | #ifdef AHC_PCI_CONFIG |
448 | static __inline uint32_t ahc_pci_read_config(ahc_dev_softc_t, int, int); |
449 | static __inline void ahc_pci_write_config(ahc_dev_softc_t, int, uint32_t, |
450 | int); |
451 | static __inline int ahc_get_pci_function(ahc_dev_softc_t); |
452 | static __inline int ahc_get_pci_slot(ahc_dev_softc_t); |
453 | static __inline int ahc_get_pci_bus(ahc_dev_softc_t); |
454 | |
455 | int ahc_pci_map_registers(struct ahc_softc *); |
456 | int ahc_pci_map_int(struct ahc_softc *); |
457 | |
458 | static __inline uint32_t |
459 | ahc_pci_read_config(ahc_dev_softc_t pci, int reg, int width) |
460 | { |
461 | return (pci_read_config(pci, reg, width)); |
462 | } |
463 | |
464 | static __inline void |
465 | ahc_pci_write_config(ahc_dev_softc_t pci, int reg, uint32_t value, int width) |
466 | { |
467 | pci_write_config(pci, reg, value, width); |
468 | } |
469 | |
470 | static __inline int |
471 | ahc_get_pci_function(ahc_dev_softc_t pci) |
472 | { |
473 | return (pci_get_function(pci)); |
474 | } |
475 | |
476 | static __inline int |
477 | ahc_get_pci_slot(ahc_dev_softc_t pci) |
478 | { |
479 | return (pci_get_slot(pci)); |
480 | } |
481 | |
482 | static __inline int |
483 | ahc_get_pci_bus(ahc_dev_softc_t pci) |
484 | { |
485 | return (pci_get_bus(pci)); |
486 | } |
487 | |
488 | typedef enum |
489 | { |
490 | AHC_POWER_STATE_D0, |
491 | AHC_POWER_STATE_D1, |
492 | AHC_POWER_STATE_D2, |
493 | AHC_POWER_STATE_D3 |
494 | } ahc_power_state; |
495 | |
496 | void ahc_power_state_change(struct ahc_softc *, ahc_power_state); |
497 | #endif |
498 | /******************************** VL/EISA *************************************/ |
499 | int aic7770_map_registers(struct ahc_softc *, u_int); |
500 | int aic7770_map_int(struct ahc_softc *, int); |
501 | |
502 | /********************************* Debug **************************************/ |
503 | static __inline void ahc_print_path(struct ahc_softc *, struct scb *); |
504 | static __inline void ahc_platform_dump_card_state(struct ahc_softc *); |
505 | |
506 | static __inline void |
507 | ahc_print_path(struct ahc_softc *ahc, struct scb *scb) |
508 | { |
509 | printf("%s:" , device_xname(ahc->sc_dev)); |
510 | } |
511 | |
512 | static __inline void |
513 | ahc_platform_dump_card_state(struct ahc_softc *ahc) |
514 | { |
515 | } |
516 | /**************************** Transfer Settings *******************************/ |
517 | void ahc_notify_xfer_settings_change(struct ahc_softc *, |
518 | struct ahc_devinfo *); |
519 | void ahc_platform_set_tags(struct ahc_softc *, struct ahc_devinfo *, int); |
520 | |
521 | /************************* Initialization/Teardown ****************************/ |
522 | int ahc_platform_alloc(struct ahc_softc *, void *); |
523 | void ahc_platform_free(struct ahc_softc *); |
524 | int ahc_map_int(struct ahc_softc *); |
525 | int ahc_attach(struct ahc_softc *); |
526 | int ahc_softc_comp(struct ahc_softc *, struct ahc_softc *); |
527 | int ahc_detach(struct ahc_softc *, int); |
528 | |
529 | /****************************** Interrupts ************************************/ |
530 | void ahc_platform_intr(void *); |
531 | static __inline void ahc_platform_flushwork(struct ahc_softc *); |
532 | static __inline void |
533 | ahc_platform_flushwork(struct ahc_softc *ahc) |
534 | { |
535 | } |
536 | |
537 | /************************ Misc Function Declarations **************************/ |
538 | void ahc_done(struct ahc_softc *, struct scb *); |
539 | void ahc_send_async(struct ahc_softc *, char, u_int, u_int, ac_code, |
540 | void *); |
541 | #endif /* _AIC7XXX_NETBSD_H_ */ |
542 | |