1 | /* $NetBSD: si4136reg.h,v 1.6 2009/10/19 23:19:39 rmind Exp $ */ |
2 | |
3 | /* |
4 | * Copyright (c) 2005 David Young. All rights reserved. |
5 | * |
6 | * This code was written by David Young. |
7 | * |
8 | * Redistribution and use in source and binary forms, with or without |
9 | * modification, are permitted provided that the following conditions |
10 | * are met: |
11 | * 1. Redistributions of source code must retain the above copyright |
12 | * notice, this list of conditions and the following disclaimer. |
13 | * 2. Redistributions in binary form must reproduce the above copyright |
14 | * notice, this list of conditions and the following disclaimer in the |
15 | * documentation and/or other materials provided with the distribution. |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY |
18 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, |
19 | * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A |
20 | * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David |
21 | * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
22 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED |
23 | * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
25 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
26 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
27 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY |
28 | * OF SUCH DAMAGE. |
29 | */ |
30 | |
31 | #ifndef _DEV_IC_SI4136REG_H_ |
32 | #define _DEV_IC_SI4136REG_H_ |
33 | |
34 | /* |
35 | * Serial bus format for Silicon Laboratories Si4126/Si4136 RF synthesizer. |
36 | */ |
37 | #define SI4126_TWI_DATA_MASK __BITS(21, 4) |
38 | #define SI4126_TWI_ADDR_MASK __BITS(3, 0) |
39 | |
40 | /* |
41 | * Registers for Silicon Laboratories Si4126/Si4136 RF synthesizer. |
42 | */ |
43 | #define SI4126_MAIN 0 /* main configuration */ |
44 | #define SI4126_MAIN_AUXSEL_MASK __BITS(13, 12) /* aux. output pin function */ |
45 | /* reserved */ |
46 | #define SI4126_MAIN_AUXSEL_RSVD __SHIFTIN(0x0, SI4126_MAIN_AUXSEL_MASK) |
47 | /* force low */ |
48 | #define SI4126_MAIN_AUXSEL_FRCLOW __SHIFTIN(0x1, SI4126_MAIN_AUXSEL_MASK) |
49 | /* Lock Detect (LDETB) */ |
50 | #define SI4126_MAIN_AUXSEL_LDETB __SHIFTIN(0x3, SI4126_MAIN_AUXSEL_MASK) |
51 | |
52 | #define SI4126_MAIN_IFDIV_MASK __BITS(11, 10) /* IFOUT = IFVCO |
53 | * frequency / 2**IFDIV. |
54 | */ |
55 | |
56 | /* 1: divide crystal input (XIN) by 2 */ |
57 | #define SI4126_MAIN_XINDIV2 __BIT(6) |
58 | #define SI4126_MAIN_LPWR __BIT(5) /* 1: low-power mode */ |
59 | #define SI4126_MAIN_AUTOPDB __BIT(3) /* 1: equivalent to |
60 | * reg[SI4126_POWER] <- |
61 | * SI4126_POWER_PDIB | |
62 | * SI4126_POWER_PDRB. |
63 | * |
64 | * 0: power-down under control |
65 | * of reg[SI4126_POWER]. |
66 | */ |
67 | |
68 | #define SI4126_GAIN 1 /* phase detector gain */ |
69 | #define SI4126_GAIN_KPI_MASK __BITS(5, 4) /* IF phase detector gain */ |
70 | #define SI4126_GAIN_KP2_MASK __BITS(3, 2) /* RF2 phase detector gain */ |
71 | #define SI4126_GAIN_KP1_MASK __BITS(1, 0) /* RF1 phase detector gain */ |
72 | |
73 | #define SI4126_POWER 2 /* powerdown */ |
74 | #define SI4126_POWER_PDIB __BIT(1) /* 1: IF synthesizer on */ |
75 | #define SI4126_POWER_PDRB __BIT(0) /* 1: RF synthesizer on */ |
76 | |
77 | #define SI4126_RF1N 3 /* RF1 N divider */ |
78 | #define SI4126_RF2N 4 /* RF2 N divider */ |
79 | #define SI4126_IFN 5 /* IF N divider */ |
80 | #define SI4126_RF1R 6 /* RF1 R divider */ |
81 | #define SI4126_RF2R 7 /* RF2 R divider */ |
82 | #define SI4126_IFR 8 /* IF R divider */ |
83 | |
84 | #endif /* _DEV_IC_SI4136REG_H_ */ |
85 | |