1/* $NetBSD: if_fpa.c,v 1.60 2015/01/25 07:33:24 martin Exp $ */
2
3/*-
4 * Copyright (c) 1995, 1996 Matt Thomas <matt@3am-software.com>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * Id: if_fpa.c,v 1.11 1997/06/05 01:56:35 thomas Exp
27 *
28 */
29
30/*
31 * DEC PDQ FDDI Controller; code for BSD derived operating systems
32 *
33 * This module supports the DEC DEFPA PCI FDDI Controller
34 */
35
36#include <sys/cdefs.h>
37__KERNEL_RCSID(0, "$NetBSD: if_fpa.c,v 1.60 2015/01/25 07:33:24 martin Exp $");
38
39#ifdef __NetBSD__
40#include "opt_inet.h"
41#endif
42
43#include <sys/param.h>
44#include <sys/kernel.h>
45#include <sys/mbuf.h>
46#include <sys/protosw.h>
47#include <sys/socket.h>
48#include <sys/ioctl.h>
49#include <sys/errno.h>
50#include <sys/malloc.h>
51#if defined(__FreeBSD__) && BSD < 199401
52#include <sys/devconf.h>
53#elif defined(__bsdi__) || defined(__NetBSD__)
54#include <sys/device.h>
55#endif
56
57#include <net/if.h>
58#include <net/if_types.h>
59#include <net/if_dl.h>
60#include <net/route.h>
61
62#include <net/bpf.h>
63#include <net/bpfdesc.h>
64
65#if defined(__FreeBSD__)
66#include <netinet/if_fddi.h>
67#else
68#include <net/if_fddi.h>
69#endif
70
71#if defined(__FreeBSD__)
72#include <vm/vm.h>
73#include "fpa.h"
74#include <netinet/if_ether.h>
75#include <pci/pcivar.h>
76#include <i386/isa/icu.h>
77#include <dev/pdq/pdqvar.h>
78#include <dev/pdq/pdqreg.h>
79#elif defined(__bsdi__)
80#include <netinet/if_ether.h>
81#include <i386/isa/isavar.h>
82#include <i386/isa/icu.h>
83#ifndef DRQNONE
84#define DRQNONE 0
85#endif
86#if _BSDI_VERSION < 199401
87#define IRQSHARE 0
88#endif
89#include <i386/pci/pci.h>
90#include <dev/pdq/pdqvar.h>
91#include <dev/pdq/pdqreg.h>
92#elif defined(__NetBSD__)
93#include <dev/pci/pcidevs.h>
94#include <dev/pci/pcivar.h>
95#include <dev/ic/pdqvar.h>
96#include <dev/ic/pdqreg.h>
97#endif /* __NetBSD__ */
98
99
100#define DEC_VENDORID 0x1011
101#define DEFPA_CHIPID 0x000F
102#define PCI_VENDORID(x) ((x) & 0xFFFF)
103#define PCI_CHIPID(x) (((x) >> 16) & 0xFFFF)
104
105#define DEFPA_LATENCY 0x88
106
107#define PCI_CFLT 0x0C /* Configuration Latency */
108#define PCI_CBMA 0x10 /* Configuration Base Memory Address */
109#define PCI_CBIO 0x14 /* Configuration Base I/O Address */
110
111#if defined(__FreeBSD__)
112#if NFPA < 4
113#undef NFPA
114#define NFPA 4
115#endif
116static pdq_softc_t *pdqs_pci[NFPA];
117#define PDQ_PCI_UNIT_TO_SOFTC(unit) (pdqs_pci[unit])
118#if BSD >= 199506
119#define pdq_pci_ifwatchdog NULL
120static void pdq_pci_shutdown(int howto, void *sc);
121#endif
122
123#elif defined(__bsdi__)
124extern struct cfdriver fpacd;
125#define PDQ_PCI_UNIT_TO_SOFTC(unit) ((pdq_softc_t *)device_lookup_private(&fpa_cd, unit))
126
127#elif defined(__NetBSD__)
128extern struct cfdriver fpa_cd;
129#define PDQ_PCI_UNIT_TO_SOFTC(unit) ((pdq_softc_t *)device_lookup_private(&fpa_cd, unit))
130#define pdq_pci_ifwatchdog NULL
131#endif
132
133#ifndef pdq_pci_ifwatchdog
134static ifnet_ret_t
135pdq_pci_ifwatchdog(
136 int unit)
137{
138 pdq_ifwatchdog(&PDQ_PCI_UNIT_TO_SOFTC(unit)->sc_if);
139}
140#endif
141
142#if defined(__FreeBSD__) && BSD >= 199506
143static void
144pdq_pci_ifintr(
145 void *arg)
146{
147 (void) pdq_interrupt(((pdq_softc_t *) arg)->sc_pdq);
148}
149#else
150static int
151pdq_pci_ifintr(
152 void *arg)
153{
154 pdq_softc_t * const sc = (pdq_softc_t *) arg;
155#ifdef __FreeBSD__
156 return pdq_interrupt(sc->sc_pdq);
157#elif defined(__bsdi__) || defined(__NetBSD__)
158 (void) pdq_interrupt(sc->sc_pdq);
159 return 1;
160#endif
161}
162#endif /* __FreeBSD && BSD */
163
164#if defined(__FreeBSD__)
165/*
166 * This is the PCI configuration support. Since the PDQ is available
167 * on both EISA and PCI boards, one must be careful in how defines the
168 * PDQ in the config file.
169 */
170static char *
171pdq_pci_probe(
172 pcici_t config_id,
173 pcidi_t device_id)
174{
175 if (PCI_VENDORID(device_id) == DEC_VENDORID &&
176 PCI_CHIPID(device_id) == DEFPA_CHIPID)
177 return "Digital DEFPA PCI FDDI Controller";
178 return NULL;
179}
180
181static void
182pdq_pci_attach(
183 pcici_t config_id,
184 int unit)
185{
186 pdq_softc_t *sc;
187 vaddr_t va_csrs;
188 paddr_t pa_csrs;
189 pdq_uint32_t data;
190
191 if (unit == NFPA) {
192 printf("fpa%d: not configured; kernel is built for only %d device%s.\n",
193 unit, NFPA, NFPA == 1 ? "" : "s");
194 return;
195 }
196
197 data = pci_conf_read(config_id, PCI_CFLT);
198 if ((data & 0xFF00) < (DEFPA_LATENCY << 8)) {
199 data &= ~0xFF00;
200 data |= DEFPA_LATENCY << 8;
201 pci_conf_write(config_id, PCI_CFLT, data);
202 }
203
204 sc = (pdq_softc_t *) malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT|M_ZERO);
205 if (sc == NULL)
206 return;
207
208 if (!pci_map_mem(config_id, PCI_CBMA, &va_csrs, &pa_csrs)) {
209 free((void *) sc, M_DEVBUF);
210 return;
211 }
212
213 sc->sc_if.if_name = "fpa";
214 sc->sc_if.if_unit = unit;
215 sc->sc_membase = (pdq_bus_memaddr_t) va_csrs;
216 sc->sc_pdq = pdq_initialize(PDQ_BUS_PCI, sc->sc_membase,
217 sc->sc_if.if_name, sc->sc_if.if_unit,
218 (void *) sc, PDQ_DEFPA);
219 if (sc->sc_pdq == NULL) {
220 free((void *) sc, M_DEVBUF);
221 return;
222 }
223 memcpy(sc->sc_ac.ac_enaddr, (void *) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes, 6);
224 pdqs_pci[unit] = sc;
225 pdq_ifattach(sc, pdq_pci_ifwatchdog);
226 pci_map_int(config_id, pdq_pci_ifintr, (void*) sc, &net_imask);
227#if BSD >= 199506
228 at_shutdown(pdq_pci_shutdown, (void *) sc, SHUTDOWN_POST_SYNC);
229#endif
230}
231
232#if BSD < 199401
233static int
234pdq_pci_shutdown(
235 struct kern_devconf *kdc,
236 int force)
237{
238 if (kdc->kdc_unit < NFPA)
239 pdq_hwreset(PDQ_PCI_UNIT_TO_SOFTC(kdc->kdc_unit)->sc_pdq);
240 (void) dev_detach(kdc);
241 return 0;
242}
243#else
244static void
245pdq_pci_shutdown(
246 int howto,
247 void *sc)
248{
249 pdq_hwreset(((pdq_softc_t *)sc)->sc_pdq);
250}
251#endif
252
253static u_long pdq_pci_count;
254
255struct pci_device fpadevice = {
256 "fpa",
257 pdq_pci_probe,
258 pdq_pci_attach,
259 &pdq_pci_count,
260#if BSD < 199401
261 pdq_pci_shutdown,
262#endif
263};
264
265#ifdef DATA_SET
266DATA_SET (pcidevice_set, fpadevice);
267#endif
268#elif defined(__bsdi__)
269
270static int
271pdq_pci_match(
272 pci_devaddr_t *pa)
273{
274 int irq;
275 int id;
276
277 id = pci_inl(pa, PCI_VENDOR_ID);
278 if (PCI_VENDORID(id) != DEC_VENDORID || PCI_CHIPID(id) != DEFPA_CHIPID)
279 return 0;
280
281 irq = pci_inl(pa, PCI_I_LINE) & 0xFF;
282 if (irq == 0 || irq >= 16)
283 return 0;
284
285 return 1;
286}
287
288int
289pdq_pci_probe(device_t parent, cfdata_t cf, void *aux)
290{
291 struct isa_attach_args *ia = (struct isa_attach_args *) aux;
292 pdq_uint32_t irq, data;
293 pci_devaddr_t *pa;
294
295 pa = pci_scan(pdq_pci_match);
296 if (pa == NULL)
297 return 0;
298
299 irq = (1 << (pci_inl(pa, PCI_I_LINE) & 0xFF));
300
301 if (ia->ia_irq != IRQUNK && irq != ia->ia_irq) {
302 printf("fpa%d: error: desired IRQ of %d does not match device's actual IRQ of %d\n",
303 cf->cf_unit,
304 ffs(ia->ia_irq) - 1, ffs(irq) - 1);
305 return 0;
306 }
307 if (ia->ia_irq == IRQUNK) {
308 (void) isa_irqalloc(irq);
309 ia->ia_irq = irq;
310 }
311
312 /* PCI bus masters don't use host DMA channels */
313 ia->ia_drq = DRQNONE;
314
315 /* Get the memory base address; assume the BIOS set it up correctly */
316 ia->ia_maddr = (void *) (pci_inl(pa, PCI_CBMA) & ~7);
317 pci_outl(pa, PCI_CBMA, 0xFFFFFFFF);
318 ia->ia_msize = ((~pci_inl(pa, PCI_CBMA)) | 7) + 1;
319 pci_outl(pa, PCI_CBMA, (int) ia->ia_maddr);
320
321 /* Disable I/O space access */
322 pci_outl(pa, PCI_COMMAND, pci_inl(pa, PCI_COMMAND) & ~1);
323 ia->ia_iobase = 0;
324 ia->ia_iosize = 0;
325
326 /* Make sure the latency timer is what the DEFPA likes */
327 data = pci_inl(pa, PCI_CFLT);
328 if ((data & 0xFF00) < (DEFPA_LATENCY << 8)) {
329 data &= ~0xFF00;
330 data |= DEFPA_LATENCY << 8;
331 pci_outl(pa, PCI_CFLT, data);
332 }
333 ia->ia_irq |= IRQSHARE;
334
335 return 1;
336}
337
338void
339pdq_pci_attach(device_t parent, device_t self, void *aux)
340{
341 pdq_softc_t *sc = device_private(self);
342 struct isa_attach_args *ia = (struct isa_attach_args *) aux;
343 struct ifnet *ifp = &sc->sc_if;
344 int i;
345
346 sc->sc_dev = self;
347 sc->sc_if.if_unit = sc->sc_dev.dv_unit;
348 sc->sc_if.if_name = "fpa";
349 sc->sc_if.if_flags = 0;
350 sc->sc_membase = (pdq_bus_memaddr_t) mapphys((vaddr_t)ia->ia_maddr, ia->ia_msize);
351
352 sc->sc_pdq = pdq_initialize(PDQ_BUS_PCI, sc->sc_membase,
353 sc->sc_if.if_name, sc->sc_if.if_unit,
354 (void *) sc, PDQ_DEFPA);
355 if (sc->sc_pdq == NULL) {
356 printf("fpa%d: initialization failed\n", sc->sc_if.if_unit);
357 return;
358 }
359
360 memcpy(sc->sc_ac.ac_enaddr, (void *) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes, 6);
361
362 pdq_ifattach(sc, pdq_pci_ifwatchdog);
363
364 isa_establish(&sc->sc_id, &sc->sc_dev);
365
366 sc->sc_ih.ih_fun = pdq_pci_ifintr;
367 sc->sc_ih.ih_arg = (void *)sc;
368 intr_establish(ia->ia_irq, &sc->sc_ih, DV_NET);
369
370 sc->sc_ats.func = (void (*)(void *)) pdq_hwreset;
371 sc->sc_ats.arg = (void *) sc->sc_pdq;
372 atshutdown(&sc->sc_ats, ATSH_ADD);
373}
374
375struct cfdriver fpacd = {
376 0, "fpa", pdq_pci_probe, pdq_pci_attach,
377#if _BSDI_VERSION >= 199401
378 DV_IFNET,
379#endif
380 sizeof(pdq_softc_t)
381};
382
383#elif defined(__NetBSD__)
384
385static int
386pdq_pci_match(device_t parent, cfdata_t match, void *aux)
387{
388 struct pci_attach_args *pa = (struct pci_attach_args *) aux;
389
390 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_DEC)
391 return 0;
392 if (PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_DEC_DEFPA)
393 return 0;
394
395 return 1;
396}
397
398static void
399pdq_pci_attach(device_t const parent, device_t const self, void *const aux)
400{
401 pdq_softc_t * const sc = device_private(self);
402 struct pci_attach_args * const pa = (struct pci_attach_args *) aux;
403 pdq_uint32_t data;
404 pci_intr_handle_t intrhandle;
405 const char *intrstr;
406 bus_space_tag_t iot, memt;
407 bus_space_handle_t ioh, memh;
408 int ioh_valid, memh_valid;
409 char intrbuf[PCI_INTRSTR_LEN];
410
411 aprint_naive(": FDDI controller\n");
412
413 sc->sc_dev = self;
414
415 data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CFLT);
416 if ((data & 0xFF00) < (DEFPA_LATENCY << 8)) {
417 data &= ~0xFF00;
418 data |= DEFPA_LATENCY << 8;
419 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_CFLT, data);
420 }
421
422 strlcpy(sc->sc_if.if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
423 sc->sc_if.if_flags = 0;
424 sc->sc_if.if_softc = sc;
425
426 ioh_valid = (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
427 &iot, &ioh, NULL, NULL) == 0);
428 memh_valid = (pci_mapreg_map(pa, PCI_CBMA,
429 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
430 &memt, &memh, NULL, NULL) == 0);
431
432#if defined(DEFPA_IOMAPED)
433 if (ioh_valid) {
434 sc->sc_csrtag = iot;
435 sc->sc_membase = ioh;
436 } else if (memh_valid) {
437 sc->sc_csrtag = memt;
438 sc->sc_membase = memh;
439 }
440#else /* defined(DEFPA_IOMAPPED) */
441 if (memh_valid) {
442 sc->sc_csrtag = memt;
443 sc->sc_membase = memh;
444 } else if (ioh_valid) {
445 sc->sc_csrtag = iot;
446 sc->sc_membase = ioh;
447 }
448#endif /* DEFPA_IOMAPPED */
449 else {
450 aprint_error(": unable to map device registers\n");
451 return;
452 }
453
454 sc->sc_dmatag = pa->pa_dmat;
455
456 /* Make sure bus mastering is enabled. */
457 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
458 pci_conf_read(pa->pa_pc, pa->pa_tag,
459 PCI_COMMAND_STATUS_REG) |
460 PCI_COMMAND_MASTER_ENABLE);
461
462 sc->sc_pdq = pdq_initialize(sc->sc_csrtag, sc->sc_membase,
463 sc->sc_if.if_xname, 0,
464 (void *) sc, PDQ_DEFPA);
465 if (sc->sc_pdq == NULL) {
466 aprint_error_dev(sc->sc_dev, "initialization failed\n");
467 return;
468 }
469
470 pdq_ifattach(sc, pdq_pci_ifwatchdog);
471
472 if (pci_intr_map(pa, &intrhandle)) {
473 aprint_error_dev(self, "couldn't map interrupt\n");
474 return;
475 }
476 intrstr = pci_intr_string(pa->pa_pc, intrhandle, intrbuf, sizeof(intrbuf));
477 sc->sc_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_NET, pdq_pci_ifintr, sc);
478 if (sc->sc_ih == NULL) {
479 aprint_error_dev(self, "couldn't establish interrupt");
480 if (intrstr != NULL)
481 aprint_error(" at %s", intrstr);
482 aprint_error("\n");
483 return;
484 }
485
486 sc->sc_ats = shutdownhook_establish((void (*)(void *)) pdq_hwreset, sc->sc_pdq);
487 if (sc->sc_ats == NULL)
488 aprint_error_dev(self, "warning: couldn't establish shutdown hook\n");
489 if (intrstr != NULL)
490 aprint_normal_dev(self, "interrupting at %s\n", intrstr);
491}
492
493CFATTACH_DECL_NEW(fpa, sizeof(pdq_softc_t),
494 pdq_pci_match, pdq_pci_attach, NULL, NULL);
495
496#endif /* __NetBSD__ */
497