1/*
2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 */
29
30#include <acpi/button.h>
31#include <linux/dmi.h>
32#include <linux/i2c.h>
33#include <linux/slab.h>
34#include <drm/drmP.h>
35#include <drm/drm_crtc.h>
36#include <drm/drm_edid.h>
37#include "intel_drv.h"
38#include <drm/i915_drm.h>
39#include "i915_drv.h"
40#include <linux/acpi.h>
41#include <linux/err.h>
42#include <linux/notifier.h>
43
44/* Private structure for the integrated LVDS support */
45struct intel_lvds_connector {
46 struct intel_connector base;
47
48 struct notifier_block lid_notifier;
49};
50
51struct intel_lvds_encoder {
52 struct intel_encoder base;
53
54 bool is_dual_link;
55 u32 reg;
56
57 struct intel_lvds_connector *attached_connector;
58};
59
60static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
61{
62 return container_of(encoder, struct intel_lvds_encoder, base.base);
63}
64
65static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
66{
67 return container_of(connector, struct intel_lvds_connector, base.base);
68}
69
70static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
71 enum i915_pipe *pipe)
72{
73 struct drm_device *dev = encoder->base.dev;
74 struct drm_i915_private *dev_priv = dev->dev_private;
75 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
76 u32 tmp;
77
78 tmp = I915_READ(lvds_encoder->reg);
79
80 if (!(tmp & LVDS_PORT_EN))
81 return false;
82
83 if (HAS_PCH_CPT(dev))
84 *pipe = PORT_TO_PIPE_CPT(tmp);
85 else
86 *pipe = PORT_TO_PIPE(tmp);
87
88 return true;
89}
90
91static void intel_lvds_get_config(struct intel_encoder *encoder,
92 struct intel_crtc_config *pipe_config)
93{
94 struct drm_device *dev = encoder->base.dev;
95 struct drm_i915_private *dev_priv = dev->dev_private;
96 u32 lvds_reg, tmp, flags = 0;
97 int dotclock;
98
99 if (HAS_PCH_SPLIT(dev))
100 lvds_reg = PCH_LVDS;
101 else
102 lvds_reg = LVDS;
103
104 tmp = I915_READ(lvds_reg);
105 if (tmp & LVDS_HSYNC_POLARITY)
106 flags |= DRM_MODE_FLAG_NHSYNC;
107 else
108 flags |= DRM_MODE_FLAG_PHSYNC;
109 if (tmp & LVDS_VSYNC_POLARITY)
110 flags |= DRM_MODE_FLAG_NVSYNC;
111 else
112 flags |= DRM_MODE_FLAG_PVSYNC;
113
114 pipe_config->adjusted_mode.flags |= flags;
115
116 /* gen2/3 store dither state in pfit control, needs to match */
117 if (INTEL_INFO(dev)->gen < 4) {
118 tmp = I915_READ(PFIT_CONTROL);
119
120 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
121 }
122
123 dotclock = pipe_config->port_clock;
124
125 if (HAS_PCH_SPLIT(dev_priv->dev))
126 ironlake_check_encoder_dotclock(pipe_config, dotclock);
127
128 pipe_config->adjusted_mode.crtc_clock = dotclock;
129}
130
131/* The LVDS pin pair needs to be on before the DPLLs are enabled.
132 * This is an exception to the general rule that mode_set doesn't turn
133 * things on.
134 */
135static void intel_pre_enable_lvds(struct intel_encoder *encoder)
136{
137 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
138 struct drm_device *dev = encoder->base.dev;
139 struct drm_i915_private *dev_priv = dev->dev_private;
140 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
141 const struct drm_display_mode *adjusted_mode =
142 &crtc->config.adjusted_mode;
143 int pipe = crtc->pipe;
144 u32 temp;
145
146 if (HAS_PCH_SPLIT(dev)) {
147 assert_fdi_rx_pll_disabled(dev_priv, pipe);
148 assert_shared_dpll_disabled(dev_priv,
149 intel_crtc_to_shared_dpll(crtc));
150 } else {
151 assert_pll_disabled(dev_priv, pipe);
152 }
153
154 temp = I915_READ(lvds_encoder->reg);
155 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
156
157 if (HAS_PCH_CPT(dev)) {
158 temp &= ~PORT_TRANS_SEL_MASK;
159 temp |= PORT_TRANS_SEL_CPT(pipe);
160 } else {
161 if (pipe == 1) {
162 temp |= LVDS_PIPEB_SELECT;
163 } else {
164 temp &= ~LVDS_PIPEB_SELECT;
165 }
166 }
167
168 /* set the corresponsding LVDS_BORDER bit */
169 temp &= ~LVDS_BORDER_ENABLE;
170 temp |= crtc->config.gmch_pfit.lvds_border_bits;
171 /* Set the B0-B3 data pairs corresponding to whether we're going to
172 * set the DPLLs for dual-channel mode or not.
173 */
174 if (lvds_encoder->is_dual_link)
175 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
176 else
177 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
178
179 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
180 * appropriately here, but we need to look more thoroughly into how
181 * panels behave in the two modes.
182 */
183
184 /* Set the dithering flag on LVDS as needed, note that there is no
185 * special lvds dither control bit on pch-split platforms, dithering is
186 * only controlled through the PIPECONF reg. */
187 if (INTEL_INFO(dev)->gen == 4) {
188 /* Bspec wording suggests that LVDS port dithering only exists
189 * for 18bpp panels. */
190 if (crtc->config.dither && crtc->config.pipe_bpp == 18)
191 temp |= LVDS_ENABLE_DITHER;
192 else
193 temp &= ~LVDS_ENABLE_DITHER;
194 }
195 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
196 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
197 temp |= LVDS_HSYNC_POLARITY;
198 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
199 temp |= LVDS_VSYNC_POLARITY;
200
201 I915_WRITE(lvds_encoder->reg, temp);
202}
203
204/**
205 * Sets the power state for the panel.
206 */
207static void intel_enable_lvds(struct intel_encoder *encoder)
208{
209 struct drm_device *dev = encoder->base.dev;
210 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
211 struct intel_connector *intel_connector =
212 &lvds_encoder->attached_connector->base;
213 struct drm_i915_private *dev_priv = dev->dev_private;
214 u32 ctl_reg, stat_reg;
215
216 if (HAS_PCH_SPLIT(dev)) {
217 ctl_reg = PCH_PP_CONTROL;
218 stat_reg = PCH_PP_STATUS;
219 } else {
220 ctl_reg = PP_CONTROL;
221 stat_reg = PP_STATUS;
222 }
223
224 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
225
226 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
227 POSTING_READ(lvds_encoder->reg);
228 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
229 DRM_ERROR("timed out waiting for panel to power on\n");
230
231 intel_panel_enable_backlight(intel_connector);
232}
233
234static void intel_disable_lvds(struct intel_encoder *encoder)
235{
236 struct drm_device *dev = encoder->base.dev;
237 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
238 struct intel_connector *intel_connector =
239 &lvds_encoder->attached_connector->base;
240 struct drm_i915_private *dev_priv = dev->dev_private;
241 u32 ctl_reg, stat_reg;
242
243 if (HAS_PCH_SPLIT(dev)) {
244 ctl_reg = PCH_PP_CONTROL;
245 stat_reg = PCH_PP_STATUS;
246 } else {
247 ctl_reg = PP_CONTROL;
248 stat_reg = PP_STATUS;
249 }
250
251 intel_panel_disable_backlight(intel_connector);
252
253 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
254 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
255 DRM_ERROR("timed out waiting for panel to power off\n");
256
257 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
258 POSTING_READ(lvds_encoder->reg);
259}
260
261static enum drm_mode_status
262intel_lvds_mode_valid(struct drm_connector *connector,
263 struct drm_display_mode *mode)
264{
265 struct intel_connector *intel_connector = to_intel_connector(connector);
266 struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
267
268 if (mode->hdisplay > fixed_mode->hdisplay)
269 return MODE_PANEL;
270 if (mode->vdisplay > fixed_mode->vdisplay)
271 return MODE_PANEL;
272
273 return MODE_OK;
274}
275
276static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
277 struct intel_crtc_config *pipe_config)
278{
279 struct drm_device *dev = intel_encoder->base.dev;
280 struct drm_i915_private *dev_priv = dev->dev_private;
281 struct intel_lvds_encoder *lvds_encoder =
282 to_lvds_encoder(&intel_encoder->base);
283 struct intel_connector *intel_connector =
284 &lvds_encoder->attached_connector->base;
285 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
286 struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
287 unsigned int lvds_bpp;
288
289 /* Should never happen!! */
290 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
291 DRM_ERROR("Can't support LVDS on pipe A\n");
292 return false;
293 }
294
295 if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
296 LVDS_A3_POWER_UP)
297 lvds_bpp = 8*3;
298 else
299 lvds_bpp = 6*3;
300
301 if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
302 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
303 pipe_config->pipe_bpp, lvds_bpp);
304 pipe_config->pipe_bpp = lvds_bpp;
305 }
306
307 /*
308 * We have timings from the BIOS for the panel, put them in
309 * to the adjusted mode. The CRTC will be set up for this mode,
310 * with the panel scaling set up to source from the H/VDisplay
311 * of the original mode.
312 */
313 intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
314 adjusted_mode);
315
316 if (HAS_PCH_SPLIT(dev)) {
317 pipe_config->has_pch_encoder = true;
318
319 intel_pch_panel_fitting(intel_crtc, pipe_config,
320 intel_connector->panel.fitting_mode);
321 } else {
322 intel_gmch_panel_fitting(intel_crtc, pipe_config,
323 intel_connector->panel.fitting_mode);
324
325 }
326
327 /*
328 * XXX: It would be nice to support lower refresh rates on the
329 * panels to reduce power consumption, and perhaps match the
330 * user's requested refresh rate.
331 */
332
333 return true;
334}
335
336static void intel_lvds_mode_set(struct intel_encoder *encoder)
337{
338 /*
339 * We don't do anything here, the LVDS port is fully set up in the pre
340 * enable hook - the ordering constraints for enabling the lvds port vs.
341 * enabling the display pll are too strict.
342 */
343}
344
345/**
346 * Detect the LVDS connection.
347 *
348 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
349 * connected and closed means disconnected. We also send hotplug events as
350 * needed, using lid status notification from the input layer.
351 */
352static enum drm_connector_status
353intel_lvds_detect(struct drm_connector *connector, bool force)
354{
355 struct drm_device *dev = connector->dev;
356 enum drm_connector_status status;
357
358 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
359 connector->base.id, drm_get_connector_name(connector));
360
361 status = intel_panel_detect(dev);
362 if (status != connector_status_unknown)
363 return status;
364
365 return connector_status_connected;
366}
367
368/**
369 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
370 */
371static int intel_lvds_get_modes(struct drm_connector *connector)
372{
373 struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
374 struct drm_device *dev = connector->dev;
375 struct drm_display_mode *mode;
376
377 /* use cached edid if we have one */
378 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
379 return drm_add_edid_modes(connector, lvds_connector->base.edid);
380
381 mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
382 if (mode == NULL)
383 return 0;
384
385 drm_mode_probed_add(connector, mode);
386 return 1;
387}
388
389static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
390{
391 DRM_INFO("Skipping forced modeset for %s\n", id->ident);
392 return 1;
393}
394
395/* The GPU hangs up on these systems if modeset is performed on LID open */
396static const struct dmi_system_id intel_no_modeset_on_lid[] = {
397 {
398 .callback = intel_no_modeset_on_lid_dmi_callback,
399 .ident = "Toshiba Tecra A11",
400 .matches = {
401 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
402 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
403 },
404 },
405
406 { .callback = NULL } /* terminating entry */
407};
408
409/*
410 * Lid events. Note the use of 'modeset':
411 * - we set it to MODESET_ON_LID_OPEN on lid close,
412 * and set it to MODESET_DONE on open
413 * - we use it as a "only once" bit (ie we ignore
414 * duplicate events where it was already properly set)
415 * - the suspend/resume paths will set it to
416 * MODESET_SUSPENDED and ignore the lid open event,
417 * because they restore the mode ("lid open").
418 */
419static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
420 void *unused)
421{
422 struct intel_lvds_connector *lvds_connector =
423 container_of(nb, struct intel_lvds_connector, lid_notifier);
424 struct drm_connector *connector = &lvds_connector->base.base;
425 struct drm_device *dev = connector->dev;
426 struct drm_i915_private *dev_priv = dev->dev_private;
427
428 if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
429 return NOTIFY_OK;
430
431 mutex_lock(&dev_priv->modeset_restore_lock);
432 if (dev_priv->modeset_restore == MODESET_SUSPENDED)
433 goto exit;
434 /*
435 * check and update the status of LVDS connector after receiving
436 * the LID nofication event.
437 */
438 connector->status = connector->funcs->detect(connector, false);
439
440 /* Don't force modeset on machines where it causes a GPU lockup */
441 if (dmi_check_system(intel_no_modeset_on_lid))
442 goto exit;
443 if (!acpi_lid_open()) {
444 /* do modeset on next lid open event */
445 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
446 goto exit;
447 }
448
449 if (dev_priv->modeset_restore == MODESET_DONE)
450 goto exit;
451
452 /*
453 * Some old platform's BIOS love to wreak havoc while the lid is closed.
454 * We try to detect this here and undo any damage. The split for PCH
455 * platforms is rather conservative and a bit arbitrary expect that on
456 * those platforms VGA disabling requires actual legacy VGA I/O access,
457 * and as part of the cleanup in the hw state restore we also redisable
458 * the vga plane.
459 */
460 if (!HAS_PCH_SPLIT(dev)) {
461 drm_modeset_lock_all(dev);
462 intel_modeset_setup_hw_state(dev, true);
463 drm_modeset_unlock_all(dev);
464 }
465
466 dev_priv->modeset_restore = MODESET_DONE;
467
468exit:
469 mutex_unlock(&dev_priv->modeset_restore_lock);
470 return NOTIFY_OK;
471}
472
473/**
474 * intel_lvds_destroy - unregister and free LVDS structures
475 * @connector: connector to free
476 *
477 * Unregister the DDC bus for this connector then free the driver private
478 * structure.
479 */
480static void intel_lvds_destroy(struct drm_connector *connector)
481{
482 struct intel_lvds_connector *lvds_connector =
483 to_lvds_connector(connector);
484
485 if (lvds_connector->lid_notifier.notifier_call)
486 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
487
488 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
489 kfree(lvds_connector->base.edid);
490
491 intel_panel_fini(&lvds_connector->base.panel);
492
493 drm_connector_cleanup(connector);
494 kfree(connector);
495}
496
497static int intel_lvds_set_property(struct drm_connector *connector,
498 struct drm_property *property,
499 uint64_t value)
500{
501 struct intel_connector *intel_connector = to_intel_connector(connector);
502 struct drm_device *dev = connector->dev;
503
504 if (property == dev->mode_config.scaling_mode_property) {
505 struct drm_crtc *crtc;
506
507 if (value == DRM_MODE_SCALE_NONE) {
508 DRM_DEBUG_KMS("no scaling not supported\n");
509 return -EINVAL;
510 }
511
512 if (intel_connector->panel.fitting_mode == value) {
513 /* the LVDS scaling property is not changed */
514 return 0;
515 }
516 intel_connector->panel.fitting_mode = value;
517
518 crtc = intel_attached_encoder(connector)->base.crtc;
519 if (crtc && crtc->enabled) {
520 /*
521 * If the CRTC is enabled, the display will be changed
522 * according to the new panel fitting mode.
523 */
524 intel_crtc_restore_mode(crtc);
525 }
526 }
527
528 return 0;
529}
530
531static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
532 .get_modes = intel_lvds_get_modes,
533 .mode_valid = intel_lvds_mode_valid,
534 .best_encoder = intel_best_encoder,
535};
536
537static const struct drm_connector_funcs intel_lvds_connector_funcs = {
538 .dpms = intel_connector_dpms,
539 .detect = intel_lvds_detect,
540 .fill_modes = drm_helper_probe_single_connector_modes,
541 .set_property = intel_lvds_set_property,
542 .destroy = intel_lvds_destroy,
543};
544
545static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
546 .destroy = intel_encoder_destroy,
547};
548
549static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
550{
551 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
552 return 1;
553}
554
555/* These systems claim to have LVDS, but really don't */
556static const struct dmi_system_id intel_no_lvds[] = {
557 {
558 .callback = intel_no_lvds_dmi_callback,
559 .ident = "Apple Mac Mini (Core series)",
560 .matches = {
561 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
562 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
563 },
564 },
565 {
566 .callback = intel_no_lvds_dmi_callback,
567 .ident = "Apple Mac Mini (Core 2 series)",
568 .matches = {
569 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
570 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
571 },
572 },
573 {
574 .callback = intel_no_lvds_dmi_callback,
575 .ident = "MSI IM-945GSE-A",
576 .matches = {
577 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
578 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
579 },
580 },
581 {
582 .callback = intel_no_lvds_dmi_callback,
583 .ident = "Dell Studio Hybrid",
584 .matches = {
585 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
586 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
587 },
588 },
589 {
590 .callback = intel_no_lvds_dmi_callback,
591 .ident = "Dell OptiPlex FX170",
592 .matches = {
593 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
594 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
595 },
596 },
597 {
598 .callback = intel_no_lvds_dmi_callback,
599 .ident = "AOpen Mini PC",
600 .matches = {
601 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
602 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
603 },
604 },
605 {
606 .callback = intel_no_lvds_dmi_callback,
607 .ident = "AOpen Mini PC MP915",
608 .matches = {
609 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
610 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
611 },
612 },
613 {
614 .callback = intel_no_lvds_dmi_callback,
615 .ident = "AOpen i915GMm-HFS",
616 .matches = {
617 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
618 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
619 },
620 },
621 {
622 .callback = intel_no_lvds_dmi_callback,
623 .ident = "AOpen i45GMx-I",
624 .matches = {
625 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
626 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
627 },
628 },
629 {
630 .callback = intel_no_lvds_dmi_callback,
631 .ident = "Aopen i945GTt-VFA",
632 .matches = {
633 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
634 },
635 },
636 {
637 .callback = intel_no_lvds_dmi_callback,
638 .ident = "Clientron U800",
639 .matches = {
640 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
641 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
642 },
643 },
644 {
645 .callback = intel_no_lvds_dmi_callback,
646 .ident = "Clientron E830",
647 .matches = {
648 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
649 DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
650 },
651 },
652 {
653 .callback = intel_no_lvds_dmi_callback,
654 .ident = "Asus EeeBox PC EB1007",
655 .matches = {
656 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
657 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
658 },
659 },
660 {
661 .callback = intel_no_lvds_dmi_callback,
662 .ident = "Asus AT5NM10T-I",
663 .matches = {
664 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
665 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
666 },
667 },
668 {
669 .callback = intel_no_lvds_dmi_callback,
670 .ident = "Hewlett-Packard HP t5740",
671 .matches = {
672 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
673 DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
674 },
675 },
676 {
677 .callback = intel_no_lvds_dmi_callback,
678 .ident = "Hewlett-Packard t5745",
679 .matches = {
680 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
681 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
682 },
683 },
684 {
685 .callback = intel_no_lvds_dmi_callback,
686 .ident = "Hewlett-Packard st5747",
687 .matches = {
688 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
689 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
690 },
691 },
692 {
693 .callback = intel_no_lvds_dmi_callback,
694 .ident = "MSI Wind Box DC500",
695 .matches = {
696 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
697 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
698 },
699 },
700 {
701 .callback = intel_no_lvds_dmi_callback,
702 .ident = "Gigabyte GA-D525TUD",
703 .matches = {
704 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
705 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
706 },
707 },
708 {
709 .callback = intel_no_lvds_dmi_callback,
710 .ident = "Supermicro X7SPA-H",
711 .matches = {
712 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
713 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
714 },
715 },
716 {
717 .callback = intel_no_lvds_dmi_callback,
718 .ident = "Fujitsu Esprimo Q900",
719 .matches = {
720 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
721 DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
722 },
723 },
724 {
725 .callback = intel_no_lvds_dmi_callback,
726 .ident = "Intel D410PT",
727 .matches = {
728 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
729 DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
730 },
731 },
732 {
733 .callback = intel_no_lvds_dmi_callback,
734 .ident = "Intel D425KT",
735 .matches = {
736 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
737 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
738 },
739 },
740 {
741 .callback = intel_no_lvds_dmi_callback,
742 .ident = "Intel D510MO",
743 .matches = {
744 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
745 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
746 },
747 },
748 {
749 .callback = intel_no_lvds_dmi_callback,
750 .ident = "Intel D525MW",
751 .matches = {
752 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
753 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
754 },
755 },
756
757 { .callback = NULL } /* terminating entry */
758};
759
760/*
761 * Enumerate the child dev array parsed from VBT to check whether
762 * the LVDS is present.
763 * If it is present, return 1.
764 * If it is not present, return false.
765 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
766 */
767static bool lvds_is_present_in_vbt(struct drm_device *dev,
768 u8 *i2c_pin)
769{
770 struct drm_i915_private *dev_priv = dev->dev_private;
771 int i;
772
773 if (!dev_priv->vbt.child_dev_num)
774 return true;
775
776 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
777 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
778 struct old_child_dev_config *child = &uchild->old;
779
780 /* If the device type is not LFP, continue.
781 * We have to check both the new identifiers as well as the
782 * old for compatibility with some BIOSes.
783 */
784 if (child->device_type != DEVICE_TYPE_INT_LFP &&
785 child->device_type != DEVICE_TYPE_LFP)
786 continue;
787
788 if (intel_gmbus_is_port_valid(child->i2c_pin))
789 *i2c_pin = child->i2c_pin;
790
791 /* However, we cannot trust the BIOS writers to populate
792 * the VBT correctly. Since LVDS requires additional
793 * information from AIM blocks, a non-zero addin offset is
794 * a good indicator that the LVDS is actually present.
795 */
796 if (child->addin_offset)
797 return true;
798
799 /* But even then some BIOS writers perform some black magic
800 * and instantiate the device without reference to any
801 * additional data. Trust that if the VBT was written into
802 * the OpRegion then they have validated the LVDS's existence.
803 */
804 if (dev_priv->opregion.vbt)
805 return true;
806 }
807
808 return false;
809}
810
811static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
812{
813 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
814 return 1;
815}
816
817static const struct dmi_system_id intel_dual_link_lvds[] = {
818 {
819 .callback = intel_dual_link_lvds_callback,
820 .ident = "Apple MacBook Pro (Core i5/i7 Series)",
821 .matches = {
822 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
823 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
824 },
825 },
826 { .callback = NULL } /* terminating entry */
827};
828
829bool intel_is_dual_link_lvds(struct drm_device *dev)
830{
831 struct intel_encoder *encoder;
832 struct intel_lvds_encoder *lvds_encoder;
833
834 list_for_each_entry(encoder, &dev->mode_config.encoder_list,
835 base.head) {
836 if (encoder->type == INTEL_OUTPUT_LVDS) {
837 lvds_encoder = to_lvds_encoder(&encoder->base);
838
839 return lvds_encoder->is_dual_link;
840 }
841 }
842
843 return false;
844}
845
846static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
847{
848 struct drm_device *dev = lvds_encoder->base.base.dev;
849 unsigned int val;
850 struct drm_i915_private *dev_priv = dev->dev_private;
851
852 /* use the module option value if specified */
853 if (i915.lvds_channel_mode > 0)
854 return i915.lvds_channel_mode == 2;
855
856 if (dmi_check_system(intel_dual_link_lvds))
857 return true;
858
859 /* BIOS should set the proper LVDS register value at boot, but
860 * in reality, it doesn't set the value when the lid is closed;
861 * we need to check "the value to be set" in VBT when LVDS
862 * register is uninitialized.
863 */
864 val = I915_READ(lvds_encoder->reg);
865 if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
866 val = dev_priv->vbt.bios_lvds_val;
867
868 return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
869}
870
871static bool intel_lvds_supported(struct drm_device *dev)
872{
873 /* With the introduction of the PCH we gained a dedicated
874 * LVDS presence pin, use it. */
875 if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
876 return true;
877
878 /* Otherwise LVDS was only attached to mobile products,
879 * except for the inglorious 830gm */
880 if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
881 return true;
882
883 return false;
884}
885
886/**
887 * intel_lvds_init - setup LVDS connectors on this device
888 * @dev: drm device
889 *
890 * Create the connector, register the LVDS DDC bus, and try to figure out what
891 * modes we can display on the LVDS panel (if present).
892 */
893void intel_lvds_init(struct drm_device *dev)
894{
895 struct drm_i915_private *dev_priv = dev->dev_private;
896 struct intel_lvds_encoder *lvds_encoder;
897 struct intel_encoder *intel_encoder;
898 struct intel_lvds_connector *lvds_connector;
899 struct intel_connector *intel_connector;
900 struct drm_connector *connector;
901 struct drm_encoder *encoder;
902 struct drm_display_mode *scan; /* *modes, *bios_mode; */
903 struct drm_display_mode *fixed_mode = NULL;
904 struct drm_display_mode *downclock_mode = NULL;
905 struct edid *edid;
906 struct drm_crtc *crtc;
907 u32 lvds;
908 int pipe;
909 u8 pin;
910
911 if (!intel_lvds_supported(dev))
912 return;
913
914 /* Skip init on machines we know falsely report LVDS */
915 if (dmi_check_system(intel_no_lvds))
916 return;
917
918 pin = GMBUS_PORT_PANEL;
919 if (!lvds_is_present_in_vbt(dev, &pin)) {
920 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
921 return;
922 }
923
924 if (HAS_PCH_SPLIT(dev)) {
925 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
926 return;
927 if (dev_priv->vbt.edp_support) {
928 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
929 return;
930 }
931 }
932
933 lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
934 if (!lvds_encoder)
935 return;
936
937 lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
938 if (!lvds_connector) {
939 kfree(lvds_encoder);
940 return;
941 }
942
943 lvds_encoder->attached_connector = lvds_connector;
944
945 intel_encoder = &lvds_encoder->base;
946 encoder = &intel_encoder->base;
947 intel_connector = &lvds_connector->base;
948 connector = &intel_connector->base;
949 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
950 DRM_MODE_CONNECTOR_LVDS);
951
952 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
953 DRM_MODE_ENCODER_LVDS);
954
955 intel_encoder->enable = intel_enable_lvds;
956 intel_encoder->pre_enable = intel_pre_enable_lvds;
957 intel_encoder->compute_config = intel_lvds_compute_config;
958 intel_encoder->mode_set = intel_lvds_mode_set;
959 intel_encoder->disable = intel_disable_lvds;
960 intel_encoder->get_hw_state = intel_lvds_get_hw_state;
961 intel_encoder->get_config = intel_lvds_get_config;
962 intel_connector->get_hw_state = intel_connector_get_hw_state;
963 intel_connector->unregister = intel_connector_unregister;
964
965 intel_connector_attach_encoder(intel_connector, intel_encoder);
966 intel_encoder->type = INTEL_OUTPUT_LVDS;
967
968 intel_encoder->cloneable = 0;
969 if (HAS_PCH_SPLIT(dev))
970 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
971 else if (IS_GEN4(dev))
972 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
973 else
974 intel_encoder->crtc_mask = (1 << 1);
975
976 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
977 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
978 connector->interlace_allowed = false;
979 connector->doublescan_allowed = false;
980
981 if (HAS_PCH_SPLIT(dev)) {
982 lvds_encoder->reg = PCH_LVDS;
983 } else {
984 lvds_encoder->reg = LVDS;
985 }
986
987 /* create the scaling mode property */
988 drm_mode_create_scaling_mode_property(dev);
989 drm_object_attach_property(&connector->base,
990 dev->mode_config.scaling_mode_property,
991 DRM_MODE_SCALE_ASPECT);
992 intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
993 /*
994 * LVDS discovery:
995 * 1) check for EDID on DDC
996 * 2) check for VBT data
997 * 3) check to see if LVDS is already on
998 * if none of the above, no panel
999 * 4) make sure lid is open
1000 * if closed, act like it's not there for now
1001 */
1002
1003 /*
1004 * Attempt to get the fixed panel mode from DDC. Assume that the
1005 * preferred mode is the right one.
1006 */
1007 mutex_lock(&dev->mode_config.mutex);
1008 edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1009 if (edid) {
1010 if (drm_add_edid_modes(connector, edid)) {
1011 drm_mode_connector_update_edid_property(connector,
1012 edid);
1013 } else {
1014 kfree(edid);
1015 edid = ERR_PTR(-EINVAL);
1016 }
1017 } else {
1018 edid = ERR_PTR(-ENOENT);
1019 }
1020 lvds_connector->base.edid = edid;
1021
1022 if (IS_ERR_OR_NULL(edid)) {
1023 /* Didn't get an EDID, so
1024 * Set wide sync ranges so we get all modes
1025 * handed to valid_mode for checking
1026 */
1027 connector->display_info.min_vfreq = 0;
1028 connector->display_info.max_vfreq = 200;
1029 connector->display_info.min_hfreq = 0;
1030 connector->display_info.max_hfreq = 200;
1031 }
1032
1033 list_for_each_entry(scan, &connector->probed_modes, head) {
1034 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1035 DRM_DEBUG_KMS("using preferred mode from EDID: ");
1036 drm_mode_debug_printmodeline(scan);
1037
1038 fixed_mode = drm_mode_duplicate(dev, scan);
1039 if (fixed_mode) {
1040 downclock_mode =
1041 intel_find_panel_downclock(dev,
1042 fixed_mode, connector);
1043 if (downclock_mode != NULL &&
1044 i915.lvds_downclock) {
1045 /* We found the downclock for LVDS. */
1046 dev_priv->lvds_downclock_avail = true;
1047 dev_priv->lvds_downclock =
1048 downclock_mode->clock;
1049 DRM_DEBUG_KMS("LVDS downclock is found"
1050 " in EDID. Normal clock %dKhz, "
1051 "downclock %dKhz\n",
1052 fixed_mode->clock,
1053 dev_priv->lvds_downclock);
1054 }
1055 goto out;
1056 }
1057 }
1058 }
1059
1060 /* Failed to get EDID, what about VBT? */
1061 if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1062 DRM_DEBUG_KMS("using mode from VBT: ");
1063 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1064
1065 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1066 if (fixed_mode) {
1067 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1068 goto out;
1069 }
1070 }
1071
1072 /*
1073 * If we didn't get EDID, try checking if the panel is already turned
1074 * on. If so, assume that whatever is currently programmed is the
1075 * correct mode.
1076 */
1077
1078 /* Ironlake: FIXME if still fail, not try pipe mode now */
1079 if (HAS_PCH_SPLIT(dev))
1080 goto failed;
1081
1082 lvds = I915_READ(LVDS);
1083 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1084 crtc = intel_get_crtc_for_pipe(dev, pipe);
1085
1086 if (crtc && (lvds & LVDS_PORT_EN)) {
1087 fixed_mode = intel_crtc_mode_get(dev, crtc);
1088 if (fixed_mode) {
1089 DRM_DEBUG_KMS("using current (BIOS) mode: ");
1090 drm_mode_debug_printmodeline(fixed_mode);
1091 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1092 goto out;
1093 }
1094 }
1095
1096 /* If we still don't have a mode after all that, give up. */
1097 if (!fixed_mode)
1098 goto failed;
1099
1100out:
1101 mutex_unlock(&dev->mode_config.mutex);
1102
1103 lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1104 DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1105 lvds_encoder->is_dual_link ? "dual" : "single");
1106
1107 /*
1108 * Unlock registers and just
1109 * leave them unlocked
1110 */
1111 if (HAS_PCH_SPLIT(dev)) {
1112 I915_WRITE(PCH_PP_CONTROL,
1113 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1114 } else {
1115 I915_WRITE(PP_CONTROL,
1116 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1117 }
1118 lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1119 if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1120 DRM_DEBUG_KMS("lid notifier registration failed\n");
1121 lvds_connector->lid_notifier.notifier_call = NULL;
1122 }
1123 drm_sysfs_connector_add(connector);
1124
1125 intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
1126 intel_panel_setup_backlight(connector);
1127
1128 return;
1129
1130failed:
1131 mutex_unlock(&dev->mode_config.mutex);
1132
1133 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1134 drm_connector_cleanup(connector);
1135 drm_encoder_cleanup(encoder);
1136 kfree(lvds_encoder);
1137 kfree(lvds_connector);
1138 return;
1139}
1140