1 | /* $NetBSD: ahcisata_pci.c,v 1.38 2016/10/13 17:11:09 jdolecek Exp $ */ |
2 | |
3 | /* |
4 | * Copyright (c) 2006 Manuel Bouyer. |
5 | * |
6 | * Redistribution and use in source and binary forms, with or without |
7 | * modification, are permitted provided that the following conditions |
8 | * are met: |
9 | * 1. Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * 2. Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
14 | * |
15 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
16 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
17 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
18 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
19 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
20 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
21 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
22 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
23 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
24 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
25 | * |
26 | */ |
27 | |
28 | #include <sys/cdefs.h> |
29 | __KERNEL_RCSID(0, "$NetBSD: ahcisata_pci.c,v 1.38 2016/10/13 17:11:09 jdolecek Exp $" ); |
30 | |
31 | #include <sys/types.h> |
32 | #include <sys/malloc.h> |
33 | #include <sys/param.h> |
34 | #include <sys/kernel.h> |
35 | #include <sys/systm.h> |
36 | #include <sys/disklabel.h> |
37 | #include <sys/pmf.h> |
38 | |
39 | #include <dev/pci/pcivar.h> |
40 | #include <dev/pci/pcidevs.h> |
41 | #include <dev/pci/pciidereg.h> |
42 | #include <dev/pci/pciidevar.h> |
43 | #include <dev/ic/ahcisatavar.h> |
44 | |
45 | struct ahci_pci_quirk { |
46 | pci_vendor_id_t vendor; /* Vendor ID */ |
47 | pci_product_id_t product; /* Product ID */ |
48 | int quirks; /* quirks; same as sc_ahci_quirks */ |
49 | }; |
50 | |
51 | static const struct ahci_pci_quirk ahci_pci_quirks[] = { |
52 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SATA, |
53 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
54 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SATA2, |
55 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
56 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SATA3, |
57 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
58 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SATA4, |
59 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
60 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_AHCI_1, |
61 | AHCI_QUIRK_BADPMP }, |
62 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_AHCI_2, |
63 | AHCI_QUIRK_BADPMP }, |
64 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_AHCI_3, |
65 | AHCI_QUIRK_BADPMP }, |
66 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_AHCI_4, |
67 | AHCI_QUIRK_BADPMP }, |
68 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_SATA, |
69 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
70 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_SATA2, |
71 | AHCI_QUIRK_BADPMP }, |
72 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_SATA3, |
73 | AHCI_QUIRK_BADPMP }, |
74 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_SATA4, |
75 | AHCI_QUIRK_BADPMP }, |
76 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_1, |
77 | AHCI_QUIRK_BADPMP }, |
78 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_2, |
79 | AHCI_QUIRK_BADPMP }, |
80 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_3, |
81 | AHCI_QUIRK_BADPMP }, |
82 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_4, |
83 | AHCI_QUIRK_BADPMP }, |
84 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_5, |
85 | AHCI_QUIRK_BADPMP }, |
86 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_6, |
87 | AHCI_QUIRK_BADPMP }, |
88 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_7, |
89 | AHCI_QUIRK_BADPMP }, |
90 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_8, |
91 | AHCI_QUIRK_BADPMP }, |
92 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_1, |
93 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
94 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_2, |
95 | AHCI_QUIRK_BADPMP }, |
96 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_3, |
97 | AHCI_QUIRK_BADPMP }, |
98 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_4, |
99 | AHCI_QUIRK_BADPMP }, |
100 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_5, |
101 | AHCI_QUIRK_BADPMP }, |
102 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_6, |
103 | AHCI_QUIRK_BADPMP }, |
104 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_7, |
105 | AHCI_QUIRK_BADPMP }, |
106 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_8, |
107 | AHCI_QUIRK_BADPMP }, |
108 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_9, |
109 | AHCI_QUIRK_BADPMP }, |
110 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_10, |
111 | AHCI_QUIRK_BADPMP }, |
112 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_11, |
113 | AHCI_QUIRK_BADPMP }, |
114 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_12, |
115 | AHCI_QUIRK_BADPMP }, |
116 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_1, |
117 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
118 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_2, |
119 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
120 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_3, |
121 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
122 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_4, |
123 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
124 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_5, |
125 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
126 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_6, |
127 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
128 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_7, |
129 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
130 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_8, |
131 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
132 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_9, |
133 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
134 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_10, |
135 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
136 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_11, |
137 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
138 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_12, |
139 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
140 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_1, |
141 | AHCI_QUIRK_BADPMP }, |
142 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_2, |
143 | AHCI_QUIRK_BADPMP }, |
144 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_3, |
145 | AHCI_QUIRK_BADPMP }, |
146 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_4, |
147 | AHCI_QUIRK_BADPMP }, |
148 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_5, |
149 | AHCI_QUIRK_BADPMP }, |
150 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_6, |
151 | AHCI_QUIRK_BADPMP }, |
152 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_7, |
153 | AHCI_QUIRK_BADPMP }, |
154 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_8, |
155 | AHCI_QUIRK_BADPMP }, |
156 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_9, |
157 | AHCI_QUIRK_BADPMP }, |
158 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_10, |
159 | AHCI_QUIRK_BADPMP }, |
160 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_11, |
161 | AHCI_QUIRK_BADPMP }, |
162 | { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_12, |
163 | AHCI_QUIRK_BADPMP }, |
164 | { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M5288, |
165 | AHCI_PCI_QUIRK_FORCE }, |
166 | { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SE6121, |
167 | AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP }, |
168 | { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SE6145, |
169 | AHCI_QUIRK_BADPMP }, |
170 | { PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE91XX, |
171 | AHCI_PCI_QUIRK_FORCE }, |
172 | /* ATI SB600 AHCI 64-bit DMA only works on some boards/BIOSes */ |
173 | { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_SATA_1, |
174 | AHCI_PCI_QUIRK_BAD64 | AHCI_QUIRK_BADPMPRESET }, |
175 | { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_SATA_AHCI, |
176 | AHCI_QUIRK_BADPMPRESET }, |
177 | { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_SATA_RAID, |
178 | AHCI_QUIRK_BADPMPRESET }, |
179 | { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_SATA_RAID5, |
180 | AHCI_QUIRK_BADPMPRESET }, |
181 | { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_SATA_AHCI2, |
182 | AHCI_QUIRK_BADPMPRESET }, |
183 | { PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_SATA_STORAGE, |
184 | AHCI_QUIRK_BADPMPRESET }, |
185 | { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237R_SATA, |
186 | AHCI_QUIRK_BADPMP }, |
187 | { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8251_SATA, |
188 | AHCI_QUIRK_BADPMP }, |
189 | { PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1061_01, |
190 | AHCI_PCI_QUIRK_FORCE }, |
191 | { PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1061_02, |
192 | AHCI_PCI_QUIRK_FORCE }, |
193 | { PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1061_11, |
194 | AHCI_PCI_QUIRK_FORCE }, |
195 | { PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1061_12, |
196 | AHCI_PCI_QUIRK_FORCE }, |
197 | }; |
198 | |
199 | struct ahci_pci_softc { |
200 | struct ahci_softc ah_sc; |
201 | pci_chipset_tag_t sc_pc; |
202 | pcitag_t sc_pcitag; |
203 | void * sc_ih; |
204 | }; |
205 | |
206 | static int ahci_pci_has_quirk(pci_vendor_id_t, pci_product_id_t); |
207 | static int ahci_pci_match(device_t, cfdata_t, void *); |
208 | static void ahci_pci_attach(device_t, device_t, void *); |
209 | static int ahci_pci_detach(device_t, int); |
210 | static bool ahci_pci_resume(device_t, const pmf_qual_t *); |
211 | |
212 | |
213 | CFATTACH_DECL_NEW(ahcisata_pci, sizeof(struct ahci_pci_softc), |
214 | ahci_pci_match, ahci_pci_attach, ahci_pci_detach, NULL); |
215 | |
216 | static int |
217 | ahci_pci_has_quirk(pci_vendor_id_t vendor, pci_product_id_t product) |
218 | { |
219 | int i; |
220 | |
221 | for (i = 0; i < __arraycount(ahci_pci_quirks); i++) |
222 | if (vendor == ahci_pci_quirks[i].vendor && |
223 | product == ahci_pci_quirks[i].product) |
224 | return ahci_pci_quirks[i].quirks; |
225 | return 0; |
226 | } |
227 | |
228 | static int |
229 | ahci_pci_match(device_t parent, cfdata_t match, void *aux) |
230 | { |
231 | struct pci_attach_args *pa = aux; |
232 | bus_space_tag_t regt; |
233 | bus_space_handle_t regh; |
234 | bus_size_t size; |
235 | int ret = 0; |
236 | bool force; |
237 | |
238 | force = ((ahci_pci_has_quirk( PCI_VENDOR(pa->pa_id), |
239 | PCI_PRODUCT(pa->pa_id)) & AHCI_PCI_QUIRK_FORCE) != 0); |
240 | |
241 | /* if wrong class and not forced by quirks, don't match */ |
242 | if ((PCI_CLASS(pa->pa_class) != PCI_CLASS_MASS_STORAGE || |
243 | ((PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_MASS_STORAGE_SATA || |
244 | PCI_INTERFACE(pa->pa_class) != PCI_INTERFACE_SATA_AHCI) && |
245 | PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_MASS_STORAGE_RAID)) && |
246 | (force == false)) |
247 | return 0; |
248 | |
249 | if (pci_mapreg_map(pa, AHCI_PCI_ABAR, |
250 | PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, |
251 | ®t, ®h, NULL, &size) != 0) |
252 | return 0; |
253 | |
254 | if ((PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_SATA && |
255 | PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_SATA_AHCI) || |
256 | (bus_space_read_4(regt, regh, AHCI_GHC) & AHCI_GHC_AE) || |
257 | (force == true)) |
258 | ret = 3; |
259 | |
260 | bus_space_unmap(regt, regh, size); |
261 | return ret; |
262 | } |
263 | |
264 | static void |
265 | ahci_pci_attach(device_t parent, device_t self, void *aux) |
266 | { |
267 | struct pci_attach_args *pa = aux; |
268 | struct ahci_pci_softc *psc = device_private(self); |
269 | struct ahci_softc *sc = &psc->ah_sc; |
270 | const char *intrstr; |
271 | bool ahci_cap_64bit; |
272 | bool ahci_bad_64bit; |
273 | pci_intr_handle_t intrhandle; |
274 | char intrbuf[PCI_INTRSTR_LEN]; |
275 | |
276 | sc->sc_atac.atac_dev = self; |
277 | |
278 | if (pci_mapreg_map(pa, AHCI_PCI_ABAR, |
279 | PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, |
280 | &sc->sc_ahcit, &sc->sc_ahcih, NULL, &sc->sc_ahcis) != 0) { |
281 | aprint_error_dev(self, "can't map ahci registers\n" ); |
282 | return; |
283 | } |
284 | psc->sc_pc = pa->pa_pc; |
285 | psc->sc_pcitag = pa->pa_tag; |
286 | |
287 | pci_aprint_devinfo(pa, "AHCI disk controller" ); |
288 | |
289 | if (pci_intr_map(pa, &intrhandle) != 0) { |
290 | aprint_error_dev(self, "couldn't map interrupt\n" ); |
291 | return; |
292 | } |
293 | intrstr = pci_intr_string(pa->pa_pc, intrhandle, |
294 | intrbuf, sizeof(intrbuf)); |
295 | psc->sc_ih = pci_intr_establish_xname(pa->pa_pc, intrhandle, IPL_BIO, |
296 | ahci_intr, sc, device_xname(sc->sc_atac.atac_dev)); |
297 | if (psc->sc_ih == NULL) { |
298 | aprint_error_dev(self, "couldn't establish interrupt\n" ); |
299 | return; |
300 | } |
301 | aprint_normal_dev(self, "interrupting at %s\n" , intrstr); |
302 | |
303 | sc->sc_dmat = pa->pa_dmat; |
304 | |
305 | sc->sc_ahci_quirks = ahci_pci_has_quirk(PCI_VENDOR(pa->pa_id), |
306 | PCI_PRODUCT(pa->pa_id)); |
307 | |
308 | ahci_cap_64bit = (AHCI_READ(sc, AHCI_CAP) & AHCI_CAP_64BIT) != 0; |
309 | ahci_bad_64bit = ((sc->sc_ahci_quirks & AHCI_PCI_QUIRK_BAD64) != 0); |
310 | |
311 | if (pci_dma64_available(pa) && ahci_cap_64bit) { |
312 | if (!ahci_bad_64bit) |
313 | sc->sc_dmat = pa->pa_dmat64; |
314 | aprint_verbose_dev(self, "64-bit DMA%s\n" , |
315 | (sc->sc_dmat == pa->pa_dmat) ? " unavailable" : "" ); |
316 | } |
317 | |
318 | if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_RAID) { |
319 | AHCIDEBUG_PRINT(("%s: RAID mode\n" , AHCINAME(sc)), DEBUG_PROBE); |
320 | sc->sc_atac_capflags = ATAC_CAP_RAID; |
321 | } else { |
322 | AHCIDEBUG_PRINT(("%s: SATA mode\n" , AHCINAME(sc)), DEBUG_PROBE); |
323 | } |
324 | |
325 | ahci_attach(sc); |
326 | |
327 | if (!pmf_device_register(self, NULL, ahci_pci_resume)) |
328 | aprint_error_dev(self, "couldn't establish power handler\n" ); |
329 | } |
330 | |
331 | static int |
332 | ahci_pci_detach(device_t dv, int flags) |
333 | { |
334 | struct ahci_pci_softc *psc; |
335 | struct ahci_softc *sc; |
336 | int rv; |
337 | |
338 | psc = device_private(dv); |
339 | sc = &psc->ah_sc; |
340 | |
341 | if ((rv = ahci_detach(sc, flags))) |
342 | return rv; |
343 | |
344 | pmf_device_deregister(dv); |
345 | |
346 | if (psc->sc_ih != NULL) |
347 | pci_intr_disestablish(psc->sc_pc, psc->sc_ih); |
348 | |
349 | bus_space_unmap(sc->sc_ahcit, sc->sc_ahcih, sc->sc_ahcis); |
350 | |
351 | return 0; |
352 | } |
353 | |
354 | static bool |
355 | ahci_pci_resume(device_t dv, const pmf_qual_t *qual) |
356 | { |
357 | struct ahci_pci_softc *psc = device_private(dv); |
358 | struct ahci_softc *sc = &psc->ah_sc; |
359 | int s; |
360 | |
361 | s = splbio(); |
362 | ahci_resume(sc); |
363 | splx(s); |
364 | |
365 | return true; |
366 | } |
367 | |