1 | /* $NetBSD: auvitekreg.h,v 1.1 2010/12/27 15:42:11 jmcneill Exp $ */ |
2 | |
3 | /*- |
4 | * Copyright (c) 2010 Jared D. McNeill <jmcneill@invisible.ca> |
5 | * All rights reserved. |
6 | * |
7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions |
9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * 2. Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
15 | * |
16 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
17 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
18 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
19 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
23 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
24 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
25 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
26 | * POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
28 | |
29 | #ifndef _AUVITEKREG_H |
30 | #define _AUVITEKREG_H |
31 | |
32 | #define AU0828_CMD_REQUEST_IN 0x00 |
33 | #define AU0828_CMD_REQUEST_OUT 0x01 |
34 | |
35 | #define AU0828_REG_GPIO1_OUTEN 0x0000 |
36 | #define AU0828_REG_GPIO2_OUTEN 0x0001 |
37 | #define AU0828_REG_GPIO1_PINDIR 0x0002 |
38 | #define AU0828_REG_GPIO2_PINDIR 0x0003 |
39 | |
40 | #define AU0828_REG_SENSOR_CTL 0x0100 |
41 | #define AU0828_REG_SENSORVBI_CTL 0x0103 |
42 | |
43 | #define AU0828_REG_HPOS_LO 0x0110 |
44 | #define AU0828_REG_HPOS_HI 0x0111 |
45 | #define AU0828_REG_VPOS_LO 0x0112 |
46 | #define AU0828_REG_VPOS_HI 0x0113 |
47 | #define AU0828_REG_HRES_LO 0x0114 |
48 | #define AU0828_REG_HRES_HI 0x0115 |
49 | #define AU0828_REG_VRES_LO 0x0116 |
50 | #define AU0828_REG_VRES_HI 0x0117 |
51 | |
52 | #define AU0828_REG_I2C_TRIGGER 0x0200 |
53 | #define AU0828_I2C_TRIGGER_WR 0x01 |
54 | #define AU0828_I2C_TRIGGER_RD 0x20 |
55 | #define AU0828_I2C_TRIGGER_HOLD 0x40 |
56 | #define AU0828_REG_I2C_STATUS 0x0201 |
57 | #define AU0828_I2C_STATUS_RD_DONE 0x01 |
58 | #define AU0828_I2C_STATUS_NO_RD_ACK 0x02 |
59 | #define AU0828_I2C_STATUS_WR_DONE 0x04 |
60 | #define AU0828_I2C_STATUS_NO_WR_ACK 0x08 |
61 | #define AU0828_I2C_STATUS_BUSY 0x10 |
62 | #define AU0828_REG_I2C_CLKDIV 0x0202 |
63 | #define AU0828_I2C_CLKDIV_250 0x07 |
64 | #define AU0828_I2C_CLKDIV_100 0x14 |
65 | #define AU0828_I2C_CLKDIV_30 0x40 |
66 | #define AU0828_REG_I2C_DSTADDR 0x0203 |
67 | #define AU0828_REG_I2C_FIFOWR 0x0205 |
68 | #define AU0828_REG_I2C_FIFORD 0x0209 |
69 | #define AU0828_REG_I2C_MBMODE 0x02ff |
70 | |
71 | #define AU0828_REG_AUDIOCTL 0x050c |
72 | |
73 | #define AU0828_REG_POWER_CTL 0x0600 |
74 | #define AU0828_POWER_EN 0x10 |
75 | |
76 | #endif /* !_AUVITEKREG_H */ |
77 | |