1/* $NetBSD: nouveau_engine_disp_hdminv84.c,v 1.1.1.1 2014/08/06 12:36:24 riastradh Exp $ */
2
3/*
4 * Copyright 2012 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Ben Skeggs
25 */
26
27#include <sys/cdefs.h>
28__KERNEL_RCSID(0, "$NetBSD: nouveau_engine_disp_hdminv84.c,v 1.1.1.1 2014/08/06 12:36:24 riastradh Exp $");
29
30#include <core/os.h>
31#include <core/class.h>
32
33#include "nv50.h"
34
35int
36nv84_hdmi_ctrl(struct nv50_disp_priv *priv, int head, int or, u32 data)
37{
38 const u32 hoff = (head * 0x800);
39
40 if (!(data & NV84_DISP_SOR_HDMI_PWR_STATE_ON)) {
41 nv_mask(priv, 0x6165a4 + hoff, 0x40000000, 0x00000000);
42 nv_mask(priv, 0x616520 + hoff, 0x00000001, 0x00000000);
43 nv_mask(priv, 0x616500 + hoff, 0x00000001, 0x00000000);
44 return 0;
45 }
46
47 /* AVI InfoFrame */
48 nv_mask(priv, 0x616520 + hoff, 0x00000001, 0x00000000);
49 nv_wr32(priv, 0x616528 + hoff, 0x000d0282);
50 nv_wr32(priv, 0x61652c + hoff, 0x0000006f);
51 nv_wr32(priv, 0x616530 + hoff, 0x00000000);
52 nv_wr32(priv, 0x616534 + hoff, 0x00000000);
53 nv_wr32(priv, 0x616538 + hoff, 0x00000000);
54 nv_mask(priv, 0x616520 + hoff, 0x00000001, 0x00000001);
55
56 /* Audio InfoFrame */
57 nv_mask(priv, 0x616500 + hoff, 0x00000001, 0x00000000);
58 nv_wr32(priv, 0x616508 + hoff, 0x000a0184);
59 nv_wr32(priv, 0x61650c + hoff, 0x00000071);
60 nv_wr32(priv, 0x616510 + hoff, 0x00000000);
61 nv_mask(priv, 0x616500 + hoff, 0x00000001, 0x00000001);
62
63 nv_mask(priv, 0x6165d0 + hoff, 0x00070001, 0x00010001); /* SPARE, HW_CTS */
64 nv_mask(priv, 0x616568 + hoff, 0x00010101, 0x00000000); /* ACR_CTRL, ?? */
65 nv_mask(priv, 0x616578 + hoff, 0x80000000, 0x80000000); /* ACR_0441_ENABLE */
66
67 /* ??? */
68 nv_mask(priv, 0x61733c, 0x00100000, 0x00100000); /* RESETF */
69 nv_mask(priv, 0x61733c, 0x10000000, 0x10000000); /* LOOKUP_EN */
70 nv_mask(priv, 0x61733c, 0x00100000, 0x00000000); /* !RESETF */
71
72 /* HDMI_CTRL */
73 nv_mask(priv, 0x6165a4 + hoff, 0x5f1f007f, data | 0x1f000000 /* ??? */);
74 return 0;
75}
76