1 | /* $NetBSD: nouveau_subdev_i2c_nv94.c,v 1.1.1.1 2014/08/06 12:36:30 riastradh Exp $ */ |
2 | |
3 | /* |
4 | * Copyright 2012 Red Hat Inc. |
5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), |
8 | * to deal in the Software without restriction, including without limitation |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
10 | * and/or sell copies of the Software, and to permit persons to whom the |
11 | * Software is furnished to do so, subject to the following conditions: |
12 | * |
13 | * The above copyright notice and this permission notice shall be included in |
14 | * all copies or substantial portions of the Software. |
15 | * |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
22 | * OTHER DEALINGS IN THE SOFTWARE. |
23 | * |
24 | * Authors: Ben Skeggs |
25 | */ |
26 | |
27 | #include <sys/cdefs.h> |
28 | __KERNEL_RCSID(0, "$NetBSD: nouveau_subdev_i2c_nv94.c,v 1.1.1.1 2014/08/06 12:36:30 riastradh Exp $" ); |
29 | |
30 | #include "nv50.h" |
31 | |
32 | #define AUX_DBG(fmt, args...) nv_debug(aux, "AUXCH(%d): " fmt, ch, ##args) |
33 | #define AUX_ERR(fmt, args...) nv_error(aux, "AUXCH(%d): " fmt, ch, ##args) |
34 | |
35 | static void |
36 | auxch_fini(struct nouveau_i2c *aux, int ch) |
37 | { |
38 | nv_mask(aux, 0x00e4e4 + (ch * 0x50), 0x00310000, 0x00000000); |
39 | } |
40 | |
41 | static int |
42 | auxch_init(struct nouveau_i2c *aux, int ch) |
43 | { |
44 | const u32 unksel = 1; /* nfi which to use, or if it matters.. */ |
45 | const u32 ureq = unksel ? 0x00100000 : 0x00200000; |
46 | const u32 urep = unksel ? 0x01000000 : 0x02000000; |
47 | u32 ctrl, timeout; |
48 | |
49 | /* wait up to 1ms for any previous transaction to be done... */ |
50 | timeout = 1000; |
51 | do { |
52 | ctrl = nv_rd32(aux, 0x00e4e4 + (ch * 0x50)); |
53 | udelay(1); |
54 | if (!timeout--) { |
55 | AUX_ERR("begin idle timeout 0x%08x\n" , ctrl); |
56 | return -EBUSY; |
57 | } |
58 | } while (ctrl & 0x03010000); |
59 | |
60 | /* set some magic, and wait up to 1ms for it to appear */ |
61 | nv_mask(aux, 0x00e4e4 + (ch * 0x50), 0x00300000, ureq); |
62 | timeout = 1000; |
63 | do { |
64 | ctrl = nv_rd32(aux, 0x00e4e4 + (ch * 0x50)); |
65 | udelay(1); |
66 | if (!timeout--) { |
67 | AUX_ERR("magic wait 0x%08x\n" , ctrl); |
68 | auxch_fini(aux, ch); |
69 | return -EBUSY; |
70 | } |
71 | } while ((ctrl & 0x03000000) != urep); |
72 | |
73 | return 0; |
74 | } |
75 | |
76 | int |
77 | nv94_aux(struct nouveau_i2c_port *base, u8 type, u32 addr, u8 *data, u8 size) |
78 | { |
79 | struct nouveau_i2c *aux = nouveau_i2c(base); |
80 | struct nv50_i2c_port *port = (void *)base; |
81 | u32 ctrl, stat, timeout, retries; |
82 | u32 xbuf[4] = {}; |
83 | int ch = port->addr; |
84 | int ret, i; |
85 | |
86 | AUX_DBG("%d: 0x%08x %d\n" , type, addr, size); |
87 | |
88 | ret = auxch_init(aux, ch); |
89 | if (ret) |
90 | goto out; |
91 | |
92 | stat = nv_rd32(aux, 0x00e4e8 + (ch * 0x50)); |
93 | if (!(stat & 0x10000000)) { |
94 | AUX_DBG("sink not detected\n" ); |
95 | ret = -ENXIO; |
96 | goto out; |
97 | } |
98 | |
99 | if (!(type & 1)) { |
100 | memcpy(xbuf, data, size); |
101 | for (i = 0; i < 16; i += 4) { |
102 | AUX_DBG("wr 0x%08x\n" , xbuf[i / 4]); |
103 | nv_wr32(aux, 0x00e4c0 + (ch * 0x50) + i, xbuf[i / 4]); |
104 | } |
105 | } |
106 | |
107 | ctrl = nv_rd32(aux, 0x00e4e4 + (ch * 0x50)); |
108 | ctrl &= ~0x0001f0ff; |
109 | ctrl |= type << 12; |
110 | ctrl |= size - 1; |
111 | nv_wr32(aux, 0x00e4e0 + (ch * 0x50), addr); |
112 | |
113 | /* retry transaction a number of times on failure... */ |
114 | ret = -EREMOTEIO; |
115 | for (retries = 0; retries < 32; retries++) { |
116 | /* reset, and delay a while if this is a retry */ |
117 | nv_wr32(aux, 0x00e4e4 + (ch * 0x50), 0x80000000 | ctrl); |
118 | nv_wr32(aux, 0x00e4e4 + (ch * 0x50), 0x00000000 | ctrl); |
119 | if (retries) |
120 | udelay(400); |
121 | |
122 | /* transaction request, wait up to 1ms for it to complete */ |
123 | nv_wr32(aux, 0x00e4e4 + (ch * 0x50), 0x00010000 | ctrl); |
124 | |
125 | timeout = 1000; |
126 | do { |
127 | ctrl = nv_rd32(aux, 0x00e4e4 + (ch * 0x50)); |
128 | udelay(1); |
129 | if (!timeout--) { |
130 | AUX_ERR("tx req timeout 0x%08x\n" , ctrl); |
131 | goto out; |
132 | } |
133 | } while (ctrl & 0x00010000); |
134 | |
135 | /* read status, and check if transaction completed ok */ |
136 | stat = nv_mask(aux, 0x00e4e8 + (ch * 0x50), 0, 0); |
137 | if (!(stat & 0x000f0f00)) { |
138 | ret = 0; |
139 | break; |
140 | } |
141 | |
142 | AUX_DBG("%02d 0x%08x 0x%08x\n" , retries, ctrl, stat); |
143 | } |
144 | |
145 | if (type & 1) { |
146 | for (i = 0; i < 16; i += 4) { |
147 | xbuf[i / 4] = nv_rd32(aux, 0x00e4d0 + (ch * 0x50) + i); |
148 | AUX_DBG("rd 0x%08x\n" , xbuf[i / 4]); |
149 | } |
150 | memcpy(data, xbuf, size); |
151 | } |
152 | |
153 | out: |
154 | auxch_fini(aux, ch); |
155 | return ret; |
156 | } |
157 | |
158 | void |
159 | nv94_i2c_acquire(struct nouveau_i2c_port *base) |
160 | { |
161 | struct nv50_i2c_priv *priv = (void *)nv_object(base)->engine; |
162 | struct nv50_i2c_port *port = (void *)base; |
163 | if (port->ctrl) { |
164 | nv_mask(priv, port->ctrl + 0x0c, 0x00000001, 0x00000000); |
165 | nv_mask(priv, port->ctrl + 0x00, 0x0000f003, port->data); |
166 | } |
167 | } |
168 | |
169 | void |
170 | nv94_i2c_release(struct nouveau_i2c_port *base) |
171 | { |
172 | } |
173 | |
174 | static const struct nouveau_i2c_func |
175 | nv94_i2c_func = { |
176 | .acquire = nv94_i2c_acquire, |
177 | .release = nv94_i2c_release, |
178 | .drive_scl = nv50_i2c_drive_scl, |
179 | .drive_sda = nv50_i2c_drive_sda, |
180 | .sense_scl = nv50_i2c_sense_scl, |
181 | .sense_sda = nv50_i2c_sense_sda, |
182 | }; |
183 | |
184 | static int |
185 | nv94_i2c_port_ctor(struct nouveau_object *parent, struct nouveau_object *engine, |
186 | struct nouveau_oclass *oclass, void *data, u32 index, |
187 | struct nouveau_object **pobject) |
188 | { |
189 | struct dcb_i2c_entry *info = data; |
190 | struct nv50_i2c_port *port; |
191 | int ret; |
192 | |
193 | ret = nouveau_i2c_port_create(parent, engine, oclass, index, |
194 | &nouveau_i2c_bit_algo, &nv94_i2c_func, |
195 | &port); |
196 | *pobject = nv_object(port); |
197 | if (ret) |
198 | return ret; |
199 | |
200 | if (info->drive >= nv50_i2c_addr_nr) |
201 | return -EINVAL; |
202 | |
203 | port->state = 7; |
204 | port->addr = nv50_i2c_addr[info->drive]; |
205 | if (info->share != DCB_I2C_UNUSED) { |
206 | port->ctrl = 0x00e500 + (info->share * 0x50); |
207 | port->data = 0x0000e001; |
208 | } |
209 | return 0; |
210 | } |
211 | |
212 | static const struct nouveau_i2c_func |
213 | nv94_aux_func = { |
214 | .acquire = nv94_i2c_acquire, |
215 | .release = nv94_i2c_release, |
216 | .aux = nv94_aux, |
217 | }; |
218 | |
219 | int |
220 | nv94_aux_port_ctor(struct nouveau_object *parent, struct nouveau_object *engine, |
221 | struct nouveau_oclass *oclass, void *data, u32 index, |
222 | struct nouveau_object **pobject) |
223 | { |
224 | struct dcb_i2c_entry *info = data; |
225 | struct nv50_i2c_port *port; |
226 | int ret; |
227 | |
228 | ret = nouveau_i2c_port_create(parent, engine, oclass, index, |
229 | &nouveau_i2c_aux_algo, &nv94_aux_func, |
230 | &port); |
231 | *pobject = nv_object(port); |
232 | if (ret) |
233 | return ret; |
234 | |
235 | port->addr = info->drive; |
236 | if (info->share != DCB_I2C_UNUSED) { |
237 | port->ctrl = 0x00e500 + (info->drive * 0x50); |
238 | port->data = 0x00002002; |
239 | } |
240 | |
241 | return 0; |
242 | } |
243 | |
244 | static struct nouveau_oclass |
245 | nv94_i2c_sclass[] = { |
246 | { .handle = NV_I2C_TYPE_DCBI2C(DCB_I2C_NVIO_BIT), |
247 | .ofuncs = &(struct nouveau_ofuncs) { |
248 | .ctor = nv94_i2c_port_ctor, |
249 | .dtor = _nouveau_i2c_port_dtor, |
250 | .init = nv50_i2c_port_init, |
251 | .fini = _nouveau_i2c_port_fini, |
252 | }, |
253 | }, |
254 | { .handle = NV_I2C_TYPE_DCBI2C(DCB_I2C_NVIO_AUX), |
255 | .ofuncs = &(struct nouveau_ofuncs) { |
256 | .ctor = nv94_aux_port_ctor, |
257 | .dtor = _nouveau_i2c_port_dtor, |
258 | .init = _nouveau_i2c_port_init, |
259 | .fini = _nouveau_i2c_port_fini, |
260 | }, |
261 | }, |
262 | {} |
263 | }; |
264 | |
265 | static int |
266 | nv94_i2c_ctor(struct nouveau_object *parent, struct nouveau_object *engine, |
267 | struct nouveau_oclass *oclass, void *data, u32 size, |
268 | struct nouveau_object **pobject) |
269 | { |
270 | struct nv50_i2c_priv *priv; |
271 | int ret; |
272 | |
273 | ret = nouveau_i2c_create(parent, engine, oclass, nv94_i2c_sclass, &priv); |
274 | *pobject = nv_object(priv); |
275 | if (ret) |
276 | return ret; |
277 | |
278 | return 0; |
279 | } |
280 | |
281 | struct nouveau_oclass |
282 | nv94_i2c_oclass = { |
283 | .handle = NV_SUBDEV(I2C, 0x94), |
284 | .ofuncs = &(struct nouveau_ofuncs) { |
285 | .ctor = nv94_i2c_ctor, |
286 | .dtor = _nouveau_i2c_dtor, |
287 | .init = _nouveau_i2c_init, |
288 | .fini = _nouveau_i2c_fini, |
289 | }, |
290 | }; |
291 | |