1/* $NetBSD: nouveau_subdev_bus_nv31.c,v 1.1.1.1 2014/08/06 12:36:29 riastradh Exp $ */
2
3/*
4 * Copyright 2012 Nouveau Community
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Martin Peres <martin.peres@labri.fr>
25 * Ben Skeggs
26 */
27
28#include <sys/cdefs.h>
29__KERNEL_RCSID(0, "$NetBSD: nouveau_subdev_bus_nv31.c,v 1.1.1.1 2014/08/06 12:36:29 riastradh Exp $");
30
31#include "nv04.h"
32
33static void
34nv31_bus_intr(struct nouveau_subdev *subdev)
35{
36 struct nouveau_bus *pbus = nouveau_bus(subdev);
37 u32 stat = nv_rd32(pbus, 0x001100) & nv_rd32(pbus, 0x001140);
38 u32 gpio = nv_rd32(pbus, 0x001104) & nv_rd32(pbus, 0x001144);
39
40 if (gpio) {
41 subdev = nouveau_subdev(pbus, NVDEV_SUBDEV_GPIO);
42 if (subdev && subdev->intr)
43 subdev->intr(subdev);
44 }
45
46 if (stat & 0x00000008) { /* NV41- */
47 u32 addr = nv_rd32(pbus, 0x009084);
48 u32 data = nv_rd32(pbus, 0x009088);
49
50 nv_error(pbus, "MMIO %s of 0x%08x FAULT at 0x%06x\n",
51 (addr & 0x00000002) ? "write" : "read", data,
52 (addr & 0x00fffffc));
53
54 stat &= ~0x00000008;
55 nv_wr32(pbus, 0x001100, 0x00000008);
56 }
57
58 if (stat & 0x00070000) {
59 subdev = nouveau_subdev(pbus, NVDEV_SUBDEV_THERM);
60 if (subdev && subdev->intr)
61 subdev->intr(subdev);
62 stat &= ~0x00070000;
63 nv_wr32(pbus, 0x001100, 0x00070000);
64 }
65
66 if (stat) {
67 nv_error(pbus, "unknown intr 0x%08x\n", stat);
68 nv_mask(pbus, 0x001140, stat, 0x00000000);
69 }
70}
71
72static int
73nv31_bus_init(struct nouveau_object *object)
74{
75 struct nv04_bus_priv *priv = (void *)object;
76 int ret;
77
78 ret = nouveau_bus_init(&priv->base);
79 if (ret)
80 return ret;
81
82 nv_wr32(priv, 0x001100, 0xffffffff);
83 nv_wr32(priv, 0x001140, 0x00070008);
84 return 0;
85}
86
87struct nouveau_oclass *
88nv31_bus_oclass = &(struct nv04_bus_impl) {
89 .base.handle = NV_SUBDEV(BUS, 0x31),
90 .base.ofuncs = &(struct nouveau_ofuncs) {
91 .ctor = nv04_bus_ctor,
92 .dtor = _nouveau_bus_dtor,
93 .init = nv31_bus_init,
94 .fini = _nouveau_bus_fini,
95 },
96 .intr = nv31_bus_intr,
97}.base;
98