1/* $NetBSD: max2820reg.h,v 1.8 2009/10/19 23:19:39 rmind Exp $ */
2
3/*
4 * Copyright (c) 2004 David Young. All rights reserved.
5 *
6 * This code was written by David Young.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
18 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
20 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
21 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
23 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
25 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
28 * OF SUCH DAMAGE.
29 */
30
31#ifndef _DEV_IC_MAX2820REG_H_
32#define _DEV_IC_MAX2820REG_H_
33
34/*
35 * Serial bus format for Maxim MAX2820/MAX2820A/MAX2821/MAX2821A
36 * 2.4GHz 802.11b Zero-IF Transceivers
37 */
38#define MAX2820_TWI_ADDR_MASK __BITS(15,12)
39#define MAX2820_TWI_DATA_MASK __BITS(11,0)
40
41/*
42 * Registers for Maxim MAX2820/MAX2820A/MAX2821/MAX2821A 2.4GHz
43 * 802.11b Zero-IF Transceivers
44 */
45#define MAX2820_TEST 0 /* Test Register */
46#define MAX2820_TEST_DEFAULT __BITS(2,0) /* Always set to this value. */
47
48#define MAX2820_ENABLE 1 /* Block-Enable Register */
49#define MAX2820_ENABLE_RSVD1 __BIT(11) /* reserved */
50#define MAX2820_ENABLE_PAB __BIT(10) /* Transmit Baseband Filters
51 * Enable
52 * PAB_EN = SHDNB &&
53 * (MAX2820_ENABLE_PAB ||
54 * TX_ON)
55 */
56#define MAX2820_ENABLE_TXFLT __BIT(9) /* Transmit Baseband Filters
57 * Enable
58 * TXFLT_EN = SHDNB &&
59 * (MAX2820_ENABLE_TXFLT ||
60 * TX_ON)
61 */
62#define MAX2820_ENABLE_TXUVD __BIT(8) /* Tx Upconverter, VGA, and
63 * Driver Amp Enable
64 * TXUVD_EN = SHDNB &&
65 * (MAX2820_ENABLE_TXUVD ||
66 * TX_ON)
67 */
68#define MAX2820_ENABLE_DET __BIT(7) /* Receive Detector Enable
69 * DET_EN = SHDNB &&
70 * (MAX2820_ENABLE_DET ||
71 * RX_ON)
72 */
73#define MAX2820_ENABLE_RXDFA __BIT(6) /* Rx Downconverter, Filters,
74 * and AGC Amps Enable
75 * RXDFA_EN = SHDNB &&
76 * (MAX2820_ENABLE_RXDFA ||
77 * RX_ON)
78 */
79#define MAX2820_ENABLE_RXLNA __BIT(5) /* Receive LNA Enable
80 * AT_EN = SHDNB &&
81 * (MAX2820_ENABLE_RXLNA ||
82 * RX_ON)
83 */
84#define MAX2820_ENABLE_AT __BIT(4) /* Auto-tuner Enable
85 * AT_EN = SHDNB &&
86 * (MAX2820_ENABLE_AT ||
87 * RX_ON || TX_ON)
88 */
89#define MAX2820_ENABLE_CP __BIT(3) /* PLL Charge-Pump Enable
90 * CP_EN = SHDNB
91 * && MAX2820_ENABLE_CP
92 */
93#define MAX2820_ENABLE_PLL __BIT(2) /* PLL Enable
94 * PLL_EN = SHDNB
95 * && MAX2820_ENABLE_PLL
96 */
97#define MAX2820_ENABLE_VCO __BIT(1) /* VCO Enable
98 * VCO_EN = SHDNB
99 * && MAX2820_ENABLE_VCO
100 */
101#define MAX2820_ENABLE_RSVD0 __BIT(0) /* reserved */
102#define MAX2820_ENABLE_DEFAULT (MAX2820_ENABLE_AT|MAX2820_ENABLE_CP|\
103 MAX2820_ENABLE_PLL|MAX2820_ENABLE_VCO)
104
105#define MAX2820_SYNTH 2 /* Synthesizer Register */
106#define MAX2820_SYNTH_RSVD0 __BITS(11,7) /* reserved */
107#define MAX2820_SYNTH_ICP __BIT(6) /* Charge-Pump Current Select
108 * 0 = +/-1mA
109 * 1 = +/-2mA
110 */
111#define MAX2820_SYNTH_R_MASK __BITS(5,0) /* Reference Frequency Divider
112 * 0 = 22MHz
113 * 1 = 44MHz
114 */
115#define MAX2820_SYNTH_R_22MHZ __SHIFTIN(0, MAX2820_SYNTH_R_MASK)
116#define MAX2820_SYNTH_R_44MHZ __SHIFTIN(1, MAX2820_SYNTH_R_MASK)
117#define MAX2820_SYNTH_ICP_DEFAULT MAX2820_SYNTH_ICP
118#define MAX2820_SYNTH_R_DEFAULT __SHIFTIN(0, MAX2820_SYNTH_R_MASK)
119
120#define MAX2820_CHANNEL 3 /* Channel Frequency Register */
121#define MAX2820_CHANNEL_RSVD __BITS(11,7) /* reserved */
122#define MAX2820_CHANNEL_CF_MASK __BITS(6,0) /* Channel Frequency Select
123 * fLO = 2400MHz + CF * 1MHz
124 */
125#define MAX2820_CHANNEL_RSVD_DEFAULT __SHIFTIN(0, MAX2820_CHANNEL_RSVD)
126#define MAX2820_CHANNEL_CF_DEFAULT __SHIFTIN(37, MAX2820_CHANNEL_CF_MASK)
127
128#define MAX2820_RECEIVE 4 /* Receiver Settings Register
129 * MAX2820/MAX2821
130 */
131#define MAX2820_RECEIVE_2C_MASK __BITS(11,9) /* VGA DC Offset Nulling
132 * Parameter 2
133 */
134#define MAX2820_RECEIVE_1C_MASK __BITS(8,6) /* VGA DC Offset Nulling
135 * Parameter 1
136 */
137#define MAX2820_RECEIVE_DL_MASK __BITS(5,4) /* Rx Level Detector Midpoint
138 * Select
139 * 11, 01 = 50.2mVp
140 * 10 = 70.9mVp
141 * 00 = 35.5mVp
142 */
143#define MAX2820_RECEIVE_SF __BIT(3) /* Special Function Select
144 * 0 = OFF
145 * 1 = ON
146 */
147#define MAX2820_RECEIVE_BW_MASK __BITS(2,0) /* Receive Filter -3dB Frequency
148 * Select (all frequencies are
149 * approximate)
150 */
151/* 8.5MHz */
152#define MAX2820_RECEIVE_BW_8_5MHZ __SHIFTIN(0, MAX2820_RECEIVE_BW_MASK)
153#define MAX2820_RECEIVE_BW_8MHZ __SHIFTIN(1, MAX2820_RECEIVE_BW_MASK)
154#define MAX2820_RECEIVE_BW_7_5MHZ __SHIFTIN(2, MAX2820_RECEIVE_BW_MASK)
155#define MAX2820_RECEIVE_BW_7MHZ __SHIFTIN(3, MAX2820_RECEIVE_BW_MASK)
156#define MAX2820_RECEIVE_BW_6_5MHZ __SHIFTIN(4, MAX2820_RECEIVE_BW_MASK)
157#define MAX2820_RECEIVE_BW_6MHZ __SHIFTIN(5, MAX2820_RECEIVE_BW_MASK)
158#define MAX2820_RECEIVE_2C_DEFAULT __SHIFTIN(7, MAX2820_RECEIVE_2C_MASK)
159#define MAX2820_RECEIVE_1C_DEFAULT __SHIFTIN(7, MAX2820_RECEIVE_1C_MASK)
160#define MAX2820_RECEIVE_DL_DEFAULT __SHIFTIN(1, MAX2820_RECEIVE_DL_MASK)
161#define MAX2820_RECEIVE_SF_DEFAULT __SHIFTIN(0, MAX2820_RECEIVE_SF)
162#define MAX2820_RECEIVE_BW_DEFAULT MAX2820_RECEIVE_BW_7_5MHZ
163
164#define MAX2820A_RECEIVE 4 /* Receiver Settings Register,
165 * MAX2820A/MAX2821A
166 */
167/* VGA DC Offset Nulling Parameter 2 */
168#define MAX2820A_RECEIVE_2C_MASK __BITS(11,9)
169#define MAX2820A_RECEIVE_2C_DEFAULT __SHIFTIN(7, MAX2820A_RECEIVE_2C_MASK)
170/* VGA DC Offset Nulling Parameter 1 */
171#define MAX2820A_RECEIVE_1C_MASK __BITS(8,6)
172#define MAX2820A_RECEIVE_1C_DEFAULT __SHIFTIN(7, MAX2820A_RECEIVE_1C_MASK)
173#define MAX2820A_RECEIVE_RSVD0_MASK __BITS(5,3)
174#define MAX2820A_RECEIVE_RSVD0_DEFAULT __SHIFTIN(2, MAX2820A_RECEIVE_RSVD0_MASK)
175#define MAX2820A_RECEIVE_RSVD1_MASK __BITS(2,0)
176#define MAX2820A_RECEIVE_RSVD1_DEFAULT __SHIFTIN(2,MAX2820_RECEIVE_RSVD1_MASK)
177
178#define MAX2820_TRANSMIT 5 /* Transmitter Settings Reg. */
179#define MAX2820_TRANSMIT_RSVD_MASK __BITS(11,4) /* reserved */
180#define MAX2820_TRANSMIT_PA_MASK __BITS(3,0) /* PA Bias Select
181 * 15 = Highest
182 * 0 = Lowest
183 */
184#define MAX2820_TRANSMIT_PA_DEFAULT __SHIFTIN(0, MAX2820_TRANSMIT_PA_MASK)
185
186#endif /* _DEV_IC_MAX2820REG_H_ */
187