1 | /* $NetBSD: nouveau_subdev_fb_nv30.c,v 1.1.1.1 2014/08/06 12:36:30 riastradh Exp $ */ |
2 | |
3 | /* |
4 | * Copyright (C) 2010 Francisco Jerez. |
5 | * All Rights Reserved. |
6 | * |
7 | * Permission is hereby granted, free of charge, to any person obtaining |
8 | * a copy of this software and associated documentation files (the |
9 | * "Software"), to deal in the Software without restriction, including |
10 | * without limitation the rights to use, copy, modify, merge, publish, |
11 | * distribute, sublicense, and/or sell copies of the Software, and to |
12 | * permit persons to whom the Software is furnished to do so, subject to |
13 | * the following conditions: |
14 | * |
15 | * The above copyright notice and this permission notice (including the |
16 | * next paragraph) shall be included in all copies or substantial |
17 | * portions of the Software. |
18 | * |
19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
20 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
21 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
22 | * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE |
23 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION |
24 | * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION |
25 | * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
26 | * |
27 | */ |
28 | |
29 | #include <sys/cdefs.h> |
30 | __KERNEL_RCSID(0, "$NetBSD: nouveau_subdev_fb_nv30.c,v 1.1.1.1 2014/08/06 12:36:30 riastradh Exp $" ); |
31 | |
32 | #include "nv04.h" |
33 | |
34 | void |
35 | nv30_fb_tile_init(struct nouveau_fb *pfb, int i, u32 addr, u32 size, u32 pitch, |
36 | u32 flags, struct nouveau_fb_tile *tile) |
37 | { |
38 | /* for performance, select alternate bank offset for zeta */ |
39 | if (!(flags & 4)) { |
40 | tile->addr = (0 << 4); |
41 | } else { |
42 | if (pfb->tile.comp) /* z compression */ |
43 | pfb->tile.comp(pfb, i, size, flags, tile); |
44 | tile->addr = (1 << 4); |
45 | } |
46 | |
47 | tile->addr |= 0x00000001; /* enable */ |
48 | tile->addr |= addr; |
49 | tile->limit = max(1u, addr + size) - 1; |
50 | tile->pitch = pitch; |
51 | } |
52 | |
53 | static void |
54 | nv30_fb_tile_comp(struct nouveau_fb *pfb, int i, u32 size, u32 flags, |
55 | struct nouveau_fb_tile *tile) |
56 | { |
57 | u32 tiles = DIV_ROUND_UP(size, 0x40); |
58 | u32 tags = round_up(tiles / pfb->ram->parts, 0x40); |
59 | if (!nouveau_mm_head(&pfb->tags, 1, tags, tags, 1, &tile->tag)) { |
60 | if (flags & 2) tile->zcomp |= 0x01000000; /* Z16 */ |
61 | else tile->zcomp |= 0x02000000; /* Z24S8 */ |
62 | tile->zcomp |= ((tile->tag->offset ) >> 6); |
63 | tile->zcomp |= ((tile->tag->offset + tags - 1) >> 6) << 12; |
64 | #ifdef __BIG_ENDIAN |
65 | tile->zcomp |= 0x10000000; |
66 | #endif |
67 | } |
68 | } |
69 | |
70 | static int |
71 | calc_bias(struct nv04_fb_priv *priv, int k, int i, int j) |
72 | { |
73 | struct nouveau_device *device = nv_device(priv); |
74 | int b = (device->chipset > 0x30 ? |
75 | nv_rd32(priv, 0x122c + 0x10 * k + 0x4 * j) >> (4 * (i ^ 1)) : |
76 | 0) & 0xf; |
77 | |
78 | return 2 * (b & 0x8 ? b - 0x10 : b); |
79 | } |
80 | |
81 | static int |
82 | calc_ref(struct nv04_fb_priv *priv, int l, int k, int i) |
83 | { |
84 | int j, x = 0; |
85 | |
86 | for (j = 0; j < 4; j++) { |
87 | int m = (l >> (8 * i) & 0xff) + calc_bias(priv, k, i, j); |
88 | |
89 | x |= (0x80 | clamp(m, 0, 0x1f)) << (8 * j); |
90 | } |
91 | |
92 | return x; |
93 | } |
94 | |
95 | int |
96 | nv30_fb_init(struct nouveau_object *object) |
97 | { |
98 | struct nouveau_device *device = nv_device(object); |
99 | struct nv04_fb_priv *priv = (void *)object; |
100 | int ret, i, j; |
101 | |
102 | ret = nouveau_fb_init(&priv->base); |
103 | if (ret) |
104 | return ret; |
105 | |
106 | /* Init the memory timing regs at 0x10037c/0x1003ac */ |
107 | if (device->chipset == 0x30 || |
108 | device->chipset == 0x31 || |
109 | device->chipset == 0x35) { |
110 | /* Related to ROP count */ |
111 | int n = (device->chipset == 0x31 ? 2 : 4); |
112 | int l = nv_rd32(priv, 0x1003d0); |
113 | |
114 | for (i = 0; i < n; i++) { |
115 | for (j = 0; j < 3; j++) |
116 | nv_wr32(priv, 0x10037c + 0xc * i + 0x4 * j, |
117 | calc_ref(priv, l, 0, j)); |
118 | |
119 | for (j = 0; j < 2; j++) |
120 | nv_wr32(priv, 0x1003ac + 0x8 * i + 0x4 * j, |
121 | calc_ref(priv, l, 1, j)); |
122 | } |
123 | } |
124 | |
125 | return 0; |
126 | } |
127 | |
128 | struct nouveau_oclass * |
129 | nv30_fb_oclass = &(struct nv04_fb_impl) { |
130 | .base.base.handle = NV_SUBDEV(FB, 0x30), |
131 | .base.base.ofuncs = &(struct nouveau_ofuncs) { |
132 | .ctor = nv04_fb_ctor, |
133 | .dtor = _nouveau_fb_dtor, |
134 | .init = nv30_fb_init, |
135 | .fini = _nouveau_fb_fini, |
136 | }, |
137 | .base.memtype = nv04_fb_memtype_valid, |
138 | .base.ram = &nv20_ram_oclass, |
139 | .tile.regions = 8, |
140 | .tile.init = nv30_fb_tile_init, |
141 | .tile.comp = nv30_fb_tile_comp, |
142 | .tile.fini = nv20_fb_tile_fini, |
143 | .tile.prog = nv20_fb_tile_prog, |
144 | }.base.base; |
145 | |