1 | /* $NetBSD: nouveau_engine_disp_nv04.c,v 1.2 2014/08/23 08:03:33 riastradh Exp $ */ |
2 | |
3 | /* |
4 | * Copyright 2012 Red Hat Inc. |
5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), |
8 | * to deal in the Software without restriction, including without limitation |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
10 | * and/or sell copies of the Software, and to permit persons to whom the |
11 | * Software is furnished to do so, subject to the following conditions: |
12 | * |
13 | * The above copyright notice and this permission notice shall be included in |
14 | * all copies or substantial portions of the Software. |
15 | * |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
22 | * OTHER DEALINGS IN THE SOFTWARE. |
23 | * |
24 | * Authors: Ben Skeggs |
25 | */ |
26 | |
27 | #include <sys/cdefs.h> |
28 | __KERNEL_RCSID(0, "$NetBSD: nouveau_engine_disp_nv04.c,v 1.2 2014/08/23 08:03:33 riastradh Exp $" ); |
29 | |
30 | #include "priv.h" |
31 | |
32 | #include <core/event.h> |
33 | #include <core/class.h> |
34 | |
35 | #include <linux/ktime.h> /* XXX */ |
36 | |
37 | struct nv04_disp_priv { |
38 | struct nouveau_disp base; |
39 | }; |
40 | |
41 | static int |
42 | nv04_disp_scanoutpos(struct nouveau_object *object, u32 mthd, |
43 | void *data, u32 size) |
44 | { |
45 | struct nv04_disp_priv *priv = (void *)object->engine; |
46 | struct nv04_display_scanoutpos *args = data; |
47 | const int head = (mthd & NV04_DISP_MTHD_HEAD); |
48 | u32 line; |
49 | |
50 | if (size < sizeof(*args)) |
51 | return -EINVAL; |
52 | |
53 | args->vblanks = nv_rd32(priv, 0x680800 + (head * 0x2000)) & 0xffff; |
54 | args->vtotal = nv_rd32(priv, 0x680804 + (head * 0x2000)) & 0xffff; |
55 | args->vblanke = args->vtotal - 1; |
56 | |
57 | args->hblanks = nv_rd32(priv, 0x680820 + (head * 0x2000)) & 0xffff; |
58 | args->htotal = nv_rd32(priv, 0x680824 + (head * 0x2000)) & 0xffff; |
59 | args->hblanke = args->htotal - 1; |
60 | |
61 | args->time[0] = ktime_to_ns(ktime_get()); |
62 | line = nv_rd32(priv, 0x600868 + (head * 0x2000)); |
63 | args->time[1] = ktime_to_ns(ktime_get()); |
64 | args->hline = (line & 0xffff0000) >> 16; |
65 | args->vline = (line & 0x0000ffff); |
66 | return 0; |
67 | } |
68 | |
69 | #define HEAD_MTHD(n) (n), (n) + 0x01 |
70 | |
71 | static struct nouveau_omthds |
72 | nv04_disp_omthds[] = { |
73 | { HEAD_MTHD(NV04_DISP_SCANOUTPOS), nv04_disp_scanoutpos }, |
74 | {} |
75 | }; |
76 | |
77 | static struct nouveau_oclass |
78 | nv04_disp_sclass[] = { |
79 | { NV04_DISP_CLASS, &nouveau_object_ofuncs, nv04_disp_omthds }, |
80 | {}, |
81 | }; |
82 | |
83 | /******************************************************************************* |
84 | * Display engine implementation |
85 | ******************************************************************************/ |
86 | |
87 | static void |
88 | nv04_disp_vblank_enable(struct nouveau_event *event, int head) |
89 | { |
90 | nv_wr32(event->priv, 0x600140 + (head * 0x2000) , 0x00000001); |
91 | } |
92 | |
93 | static void |
94 | nv04_disp_vblank_disable(struct nouveau_event *event, int head) |
95 | { |
96 | nv_wr32(event->priv, 0x600140 + (head * 0x2000) , 0x00000000); |
97 | } |
98 | |
99 | static void |
100 | nv04_disp_intr(struct nouveau_subdev *subdev) |
101 | { |
102 | struct nv04_disp_priv *priv = (void *)subdev; |
103 | u32 crtc0 = nv_rd32(priv, 0x600100); |
104 | u32 crtc1 = nv_rd32(priv, 0x602100); |
105 | u32 pvideo; |
106 | |
107 | if (crtc0 & 0x00000001) { |
108 | nouveau_event_trigger(priv->base.vblank, 0); |
109 | nv_wr32(priv, 0x600100, 0x00000001); |
110 | } |
111 | |
112 | if (crtc1 & 0x00000001) { |
113 | nouveau_event_trigger(priv->base.vblank, 1); |
114 | nv_wr32(priv, 0x602100, 0x00000001); |
115 | } |
116 | |
117 | if (nv_device(priv)->chipset >= 0x10 && |
118 | nv_device(priv)->chipset <= 0x40) { |
119 | pvideo = nv_rd32(priv, 0x8100); |
120 | if (pvideo & ~0x11) |
121 | nv_info(priv, "PVIDEO intr: %08x\n" , pvideo); |
122 | nv_wr32(priv, 0x8100, pvideo); |
123 | } |
124 | } |
125 | |
126 | static int |
127 | nv04_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, |
128 | struct nouveau_oclass *oclass, void *data, u32 size, |
129 | struct nouveau_object **pobject) |
130 | { |
131 | struct nv04_disp_priv *priv; |
132 | int ret; |
133 | |
134 | ret = nouveau_disp_create(parent, engine, oclass, 2, "DISPLAY" , |
135 | "display" , &priv); |
136 | *pobject = nv_object(priv); |
137 | if (ret) |
138 | return ret; |
139 | |
140 | nv_engine(priv)->sclass = nv04_disp_sclass; |
141 | nv_subdev(priv)->intr = nv04_disp_intr; |
142 | priv->base.vblank->priv = priv; |
143 | priv->base.vblank->enable = nv04_disp_vblank_enable; |
144 | priv->base.vblank->disable = nv04_disp_vblank_disable; |
145 | return 0; |
146 | } |
147 | |
148 | struct nouveau_oclass * |
149 | nv04_disp_oclass = &(struct nouveau_disp_impl) { |
150 | .base.handle = NV_ENGINE(DISP, 0x04), |
151 | .base.ofuncs = &(struct nouveau_ofuncs) { |
152 | .ctor = nv04_disp_ctor, |
153 | .dtor = _nouveau_disp_dtor, |
154 | .init = _nouveau_disp_init, |
155 | .fini = _nouveau_disp_fini, |
156 | }, |
157 | }.base; |
158 | |