1/* $NetBSD: if_atw_cardbus.c,v 1.36 2011/08/01 11:20:27 drochner Exp $ */
2
3/*-
4 * Copyright (c) 1999, 2000, 2003 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center. This code was adapted for the ADMtek ADM8211
10 * by David Young.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34/*
35 * CardBus bus front-end for the ADMtek ADM8211 802.11 MAC/BBP driver.
36 */
37
38#include <sys/cdefs.h>
39__KERNEL_RCSID(0, "$NetBSD: if_atw_cardbus.c,v 1.36 2011/08/01 11:20:27 drochner Exp $");
40
41#include "opt_inet.h"
42
43#include <sys/param.h>
44#include <sys/systm.h>
45#include <sys/mbuf.h>
46#include <sys/malloc.h>
47#include <sys/kernel.h>
48#include <sys/socket.h>
49#include <sys/ioctl.h>
50#include <sys/errno.h>
51#include <sys/device.h>
52
53#include <machine/endian.h>
54
55#include <net/if.h>
56#include <net/if_dl.h>
57#include <net/if_media.h>
58#include <net/if_ether.h>
59
60#include <net80211/ieee80211_netbsd.h>
61#include <net80211/ieee80211_radiotap.h>
62#include <net80211/ieee80211_var.h>
63
64#ifdef INET
65#include <netinet/in.h>
66#include <netinet/if_inarp.h>
67#endif
68
69
70#include <sys/bus.h>
71#include <sys/intr.h>
72
73#include <dev/ic/atwreg.h>
74#include <dev/ic/rf3000reg.h>
75#include <dev/ic/si4136reg.h>
76#include <dev/ic/atwvar.h>
77
78#include <dev/pci/pcivar.h>
79#include <dev/pci/pcireg.h>
80#include <dev/pci/pcidevs.h>
81
82#include <dev/cardbus/cardbusvar.h>
83#include <dev/pci/pcidevs.h>
84
85/*
86 * PCI configuration space registers used by the ADM8211.
87 */
88#define ATW_PCI_IOBA PCI_BAR(0) /* i/o mapped base */
89#define ATW_PCI_MMBA PCI_BAR(1) /* memory mapped base */
90
91struct atw_cardbus_softc {
92 struct atw_softc sc_atw;
93
94 /* CardBus-specific goo. */
95 void *sc_ih; /* interrupt handle */
96 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
97 pcitag_t sc_tag; /* our CardBus tag */
98 pcireg_t sc_csr; /* CSR bits */
99 bus_size_t sc_mapsize; /* the size of mapped bus space
100 * region
101 */
102
103 int sc_bar_reg; /* which BAR to use */
104 pcireg_t sc_bar_val; /* value of the BAR */
105};
106
107static int atw_cardbus_match(device_t, cfdata_t, void *);
108static void atw_cardbus_attach(device_t, device_t, void *);
109static int atw_cardbus_detach(device_t, int);
110
111CFATTACH_DECL3_NEW(atw_cardbus, sizeof(struct atw_cardbus_softc),
112 atw_cardbus_match, atw_cardbus_attach, atw_cardbus_detach, atw_activate,
113 NULL, NULL, DVF_DETACH_SHUTDOWN);
114
115static void atw_cardbus_setup(struct atw_cardbus_softc *);
116
117static bool atw_cardbus_suspend(device_t, const pmf_qual_t *);
118static bool atw_cardbus_resume(device_t, const pmf_qual_t *);
119
120static const struct atw_cardbus_product *atw_cardbus_lookup
121 (const struct cardbus_attach_args *);
122
123static const struct atw_cardbus_product {
124 u_int32_t acp_vendor; /* PCI vendor ID */
125 u_int32_t acp_product; /* PCI product ID */
126 const char *acp_product_name;
127} atw_cardbus_products[] = {
128 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM8211,
129 "ADMtek ADM8211 802.11 MAC/BBP" },
130
131 { 0, 0, NULL },
132};
133
134static const struct atw_cardbus_product *
135atw_cardbus_lookup(const struct cardbus_attach_args *ca)
136{
137 const struct atw_cardbus_product *acp;
138
139 for (acp = atw_cardbus_products; acp->acp_product_name != NULL; acp++) {
140 if (PCI_VENDOR(ca->ca_id) == acp->acp_vendor &&
141 PCI_PRODUCT(ca->ca_id) == acp->acp_product)
142 return acp;
143 }
144 return NULL;
145}
146
147static int
148atw_cardbus_match(device_t parent, cfdata_t match, void *aux)
149{
150 struct cardbus_attach_args *ca = aux;
151
152 if (atw_cardbus_lookup(ca) != NULL)
153 return 1;
154
155 return 0;
156}
157
158static void
159atw_cardbus_attach(device_t parent, device_t self, void *aux)
160{
161 struct atw_cardbus_softc *csc = device_private(self);
162 struct atw_softc *sc = &csc->sc_atw;
163 struct cardbus_attach_args *ca = aux;
164 cardbus_devfunc_t ct = ca->ca_ct;
165 const struct atw_cardbus_product *acp;
166#if 0
167 int i;
168#define FUNCREG(__x) {#__x, (__x)}
169 struct {
170 const char *name;
171 bus_size_t ofs;
172 } funcregs[] = {
173 FUNCREG(ATW_FER), FUNCREG(ATW_FEMR), FUNCREG(ATW_FPSR),
174 FUNCREG(ATW_FFER)
175 };
176#undef FUNCREG
177#endif
178 bus_addr_t adr;
179
180 sc->sc_dev = self;
181 sc->sc_dmat = ca->ca_dmat;
182 csc->sc_ct = ct;
183 csc->sc_tag = ca->ca_tag;
184
185 acp = atw_cardbus_lookup(ca);
186 if (acp == NULL) {
187 printf("\n");
188 panic("atw_cardbus_attach: impossible");
189 }
190
191 /* Get revision info. */
192 sc->sc_rev = PCI_REVISION(ca->ca_class);
193
194 printf(": %s, revision %d.%d\n", acp->acp_product_name,
195 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
196
197#if 0
198 printf("%s: signature %08x\n", device_xname(self),
199 (rev >> 4) & 0xf, rev & 0xf,
200 Cardbus_conf_read(ct, csc->sc_tag, 0x80));
201#endif
202
203 /*
204 * Map the device.
205 */
206 csc->sc_csr = PCI_COMMAND_MASTER_ENABLE |
207 PCI_COMMAND_PARITY_ENABLE |
208 PCI_COMMAND_SERR_ENABLE;
209 if (Cardbus_mapreg_map(ct, ATW_PCI_MMBA,
210 PCI_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &adr,
211 &csc->sc_mapsize) == 0) {
212#if 0
213 printf("%s: atw_cardbus_attach mapped %d bytes mem space\n",
214 device_xname(self), csc->sc_mapsize);
215#endif
216 csc->sc_csr |= PCI_COMMAND_MEM_ENABLE;
217 csc->sc_bar_reg = ATW_PCI_MMBA;
218 csc->sc_bar_val = adr | PCI_MAPREG_TYPE_MEM;
219 } else if (Cardbus_mapreg_map(ct, ATW_PCI_IOBA,
220 PCI_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr,
221 &csc->sc_mapsize) == 0) {
222#if 0
223 printf("%s: atw_cardbus_attach mapped %d bytes I/O space\n",
224 device_xname(self), csc->sc_mapsize);
225#endif
226 csc->sc_csr |= PCI_COMMAND_IO_ENABLE;
227 csc->sc_bar_reg = ATW_PCI_IOBA;
228 csc->sc_bar_val = adr | PCI_MAPREG_TYPE_IO;
229 } else {
230 aprint_error_dev(self, "unable to map device registers\n");
231 return;
232 }
233
234 /*
235 * Bring the chip out of powersave mode and initialize the
236 * configuration registers.
237 */
238 atw_cardbus_setup(csc);
239
240#if 0
241 /*
242 * The CardBus cards will make it to store-and-forward mode as
243 * soon as you put them under any kind of load, so just start
244 * out there.
245 */
246 sc->sc_txthresh = 3; /* TBD name constant */
247#endif
248
249#if 0
250 for (i = 0; i < __arraycount(funcregs); i++) {
251 aprint_error_dev(sc->sc_dev, "%s %" PRIx32 "\n",
252 funcregs[i].name, ATW_READ(sc, funcregs[i].ofs));
253 }
254#endif
255
256 ATW_WRITE(sc, ATW_FEMR, 0);
257 ATW_WRITE(sc, ATW_FER, ATW_READ(sc, ATW_FER));
258
259 /*
260 * Bus-independent attach.
261 */
262 atw_attach(sc);
263
264 if (pmf_device_register1(sc->sc_dev, atw_cardbus_suspend,
265 atw_cardbus_resume, atw_shutdown))
266 pmf_class_network_register(sc->sc_dev, &sc->sc_if);
267 else
268 aprint_error_dev(sc->sc_dev,
269 "couldn't establish power handler\n");
270
271 /*
272 * Power down the socket.
273 */
274 pmf_device_suspend(sc->sc_dev, &sc->sc_qual);
275}
276
277static int
278atw_cardbus_detach(device_t self, int flags)
279{
280 struct atw_cardbus_softc *csc = device_private(self);
281 struct atw_softc *sc = &csc->sc_atw;
282 struct cardbus_devfunc *ct = csc->sc_ct;
283 int rv;
284
285#if defined(DIAGNOSTIC)
286 if (ct == NULL)
287 panic("%s: data structure lacks", device_xname(self));
288#endif
289
290 rv = atw_detach(sc);
291 if (rv != 0)
292 return rv;
293
294 /*
295 * Unhook the interrupt handler.
296 */
297 if (csc->sc_ih != NULL)
298 Cardbus_intr_disestablish(ct, csc->sc_ih);
299
300 /*
301 * Release bus space and close window.
302 */
303 if (csc->sc_bar_reg != 0)
304 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
305 sc->sc_st, sc->sc_sh, csc->sc_mapsize);
306
307 return 0;
308}
309
310static bool
311atw_cardbus_resume(device_t self, const pmf_qual_t *qual)
312{
313 struct atw_cardbus_softc *csc = device_private(self);
314 struct atw_softc *sc = &csc->sc_atw;
315 cardbus_devfunc_t ct = csc->sc_ct;
316
317 /*
318 * Map and establish the interrupt.
319 */
320 csc->sc_ih = Cardbus_intr_establish(ct, IPL_NET, atw_intr, sc);
321 if (csc->sc_ih == NULL) {
322 aprint_error_dev(sc->sc_dev, "unable to establish interrupt\n");
323 return false;
324 }
325
326 return true;
327}
328
329static bool
330atw_cardbus_suspend(device_t self, const pmf_qual_t *qual)
331{
332 struct atw_cardbus_softc *csc = device_private(self);
333 cardbus_devfunc_t ct = csc->sc_ct;
334
335 /* Unhook the interrupt handler. */
336 Cardbus_intr_disestablish(ct, csc->sc_ih);
337 csc->sc_ih = NULL;
338
339 return atw_suspend(self, qual);
340}
341
342static void
343atw_cardbus_setup(struct atw_cardbus_softc *csc)
344{
345 cardbus_devfunc_t ct = csc->sc_ct;
346 pcireg_t csr;
347 int rc;
348
349 if ((rc = cardbus_set_powerstate(ct, csc->sc_tag, PCI_PWR_D0)) != 0)
350 aprint_debug("%s: cardbus_set_powerstate %d\n", __func__, rc);
351
352 /* Program the BAR. */
353 Cardbus_conf_write(ct, csc->sc_tag, csc->sc_bar_reg,
354 csc->sc_bar_val);
355
356 /* Enable the appropriate bits in the PCI CSR. */
357 csr = Cardbus_conf_read(ct, csc->sc_tag, PCI_COMMAND_STATUS_REG);
358 csr &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
359 csr |= csc->sc_csr;
360 Cardbus_conf_write(ct, csc->sc_tag, PCI_COMMAND_STATUS_REG, csr);
361}
362