1 | /* $NetBSD: if_tlregs.h,v 1.11 2014/10/18 08:33:28 snj Exp $ */ |
2 | |
3 | /* |
4 | * Copyright (c) 1997 Manuel Bouyer. All rights reserved. |
5 | * |
6 | * Redistribution and use in source and binary forms, with or without |
7 | * modification, are permitted provided that the following conditions |
8 | * are met: |
9 | * 1. Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * 2. Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
14 | * |
15 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
16 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
17 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
18 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
19 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
20 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
21 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
22 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
23 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
24 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
25 | */ |
26 | |
27 | #if !defined(_DEV_PCI_IF_TLREGS_H_) |
28 | #define _DEV_PCI_IF_TLREGS_H_ |
29 | |
30 | #define PCI_CFID 0x00 /* Configuration ID */ |
31 | #define PCI_CFCS 0x04 /* Configurtion Command/Status */ |
32 | #define PCI_CFRV 0x08 /* Configuration Revision */ |
33 | #define PCI_CFLT 0x0c /* Configuration Latency Timer */ |
34 | #define PCI_CBIO 0x10 /* Configuration Base IO Address */ |
35 | #define PCI_CBMA 0x14 /* Configuration Base Memory Address */ |
36 | #define PCI_CFIT 0x3c /* Configuration Interrupt */ |
37 | #define PCI_CFDA 0x40 /* Configuration Driver Area */ |
38 | |
39 | /* Host registers */ |
40 | #define TL_HOST_CMD 0x00 |
41 | #define TL_HOST_CH_PARM 0x04 |
42 | #define TL_HOST_INTR_DIOADR 0x08 |
43 | # define TL_HOST_INTR_MASK 0xffff0000 |
44 | # define TL_HOST_DIOADR_MASK 0x0000ffff |
45 | #define TL_HOST_DIO_DATA 0x0c |
46 | |
47 | #define TL_INTR_MASK 0x001c0000 |
48 | #define TL_INTR_TxEOF 0x00040000 |
49 | #define TL_INTR_Stat 0x00080000 |
50 | #define TL_INTR_RxEOF 0x000c0000 |
51 | #define TL_INTR_Dumm 0x00100000 |
52 | #define TL_INTR_TxEOC 0x00140000 |
53 | #define TL_INTR_Adc 0x00180000 |
54 | #define TL_INTR_RxEOC 0x001c0000 |
55 | #define TL_INTVec_MASK 0x1fe00000 |
56 | |
57 | /* HOST_CMD bits */ |
58 | #define HOST_CMD_GO 0x80000000 |
59 | #define HOST_CMD_STOP 0x40000000 |
60 | #define HOST_CMD_ACK 0x20000000 |
61 | #define HOST_CMD_CHSEL_mask 0x1fe00000 |
62 | #define HOST_CMD_EOC 0x00100000 |
63 | #define HOST_CMD_RT 0x00080000 |
64 | #define HOST_CMD_Nes 0x00040000 |
65 | #define HOST_CMD_Ad_Rst 0x00008000 |
66 | #define HOST_CMD_LdTmr 0x00004000 |
67 | #define HOST_CMD_LdThr 0x00002000 |
68 | #define HOST_CMD_ReqInt 0x00001000 |
69 | #define HOST_CMD_IntOff 0x00000800 |
70 | #define HOST_CMD_IntOn 0x00000400 |
71 | #define HOST_CMD_AckCnt_mask 0x000000ff |
72 | |
73 | |
74 | /* Internal registers */ |
75 | #define TL_INT_NET 0x00 |
76 | # define TL_INT_NetCmd 0x00 /* offsets from TL_INT_NET */ |
77 | # define TL_INT_NetSio 0x01 |
78 | # define TL_INT_NetSts 0x02 |
79 | # define TL_INT_NetMask 0x03 |
80 | #define TL_INT_NetConfig 0x04 |
81 | #define TL_INT_Defaults 0x08 |
82 | #define TL_INT_Areg0 0x10 |
83 | #define TL_INT_HASH1 0x28 |
84 | #define TL_INT_HASH2 0x2c |
85 | #define TL_INT_STATS_TX 0x30 |
86 | #define TL_INT_STATS_RX 0x34 |
87 | #define TL_INT_STATS_FERR 0x38 |
88 | # define TL_FERR_DEF 0x0000ffff |
89 | # define TL_FERR_CRC 0x00ff0000 |
90 | # define TL_FERR_CODE 0xff000000 |
91 | #define TL_INT_STATS_COLL 0x3c |
92 | # define TL_COL_MULTI 0x0000ffff |
93 | # define TL_COL_SINGLE 0xffff0000 |
94 | #define TL_INT_LERR 0x40 |
95 | # define TL_LERR_ECOLL 0x000000ff |
96 | # define TL_LERR_LCOLL 0x0000ff00 |
97 | # define TL_LERR_CL 0x00ff0000 |
98 | # define TL_LERR_AC 0xff000000 |
99 | #define TL_INT_MISC 0x44 |
100 | # define TL_MISC_LED 0x1 |
101 | # define TL_MISC_BSIZE 0x2 |
102 | # define TL_MISC_MaxRxL 0x3 |
103 | # define TL_MISC_MaxRxH 0x4 |
104 | |
105 | /* LEDs for the Integrated Netelligent 10/100 TX */ |
106 | #define TL_LED_LINK 0x01 |
107 | #define TL_LED_ACT 0x10 |
108 | |
109 | /* NETCOMMAND bits */ |
110 | #define TL_NETCOMMAND_NRESET 0x80 |
111 | #define TL_NETCOMMAND_NWRAP 0x40 |
112 | #define TL_NETCOMMAND_CSF 0x20 |
113 | #define TL_NETCOMMAND_CAF 0x10 |
114 | #define TL_NETCOMMAND_NOBRX 0x08 |
115 | #define TL_NETCOMMAND_DUPLEX 0x04 |
116 | #define TL_NETCOMMAND_TRFRAM 0x02 |
117 | #define TL_NETCOMMAND_TXPACE 0x01 |
118 | |
119 | /* NETCONFIG bits */ |
120 | #define TL_NETCONFIG_Trclk 0x8000 |
121 | #define TL_NETCONFIG_Ttclk 0x4000 |
122 | #define TL_NETCONFIG_Brate 0x2000 |
123 | #define TL_NETCONFIG_RxCRC 0x1000 |
124 | #define TL_NETCONFIG_PEF 0x0800 |
125 | #define TL_NETCONFIG_1F 0x0400 |
126 | #define TL_NETCONFIG_1chn 0x0200 |
127 | #define TL_NETCONFIG_Mtest 0x0100 |
128 | #define TL_NETCONFIG_PHY_EN 0x0080 |
129 | #define TL_NETCONFIG_MAC_MASK 0x007f |
130 | |
131 | /* NetSio bits definition */ |
132 | #define TL_NETSIO_MDATA 0x01 |
133 | #define TL_NETSIO_MTXEN 0x02 |
134 | #define TL_NETSIO_MCLK 0x04 |
135 | #define TL_NETSIO_NMRST 0x08 |
136 | #define TL_NETSIO_EDATA 0x10 |
137 | #define TL_NETSIO_ETXEN 0x20 |
138 | #define TL_NETSIO_ECLOCK 0x40 |
139 | #define TL_NETSIO_MINTEN 0x80 |
140 | |
141 | /* NetSts buts definition */ |
142 | #define TL_NETSTS_MIRQ 0x80 |
143 | #define TL_NETSTS_HBEAT 0x40 |
144 | #define TL_NETSTS_TXSTOP 0x20 |
145 | #define TL_NETSTS_RXSTOP 0x10 |
146 | |
147 | /* Linked lists for receive/transmit of datagrams */ |
148 | |
149 | struct tl_data_seg { |
150 | u_int32_t data_count; |
151 | u_int32_t data_addr; |
152 | } __packed; |
153 | |
154 | /* Receive list (one_frag = 1) */ |
155 | struct tl_Rx_list { |
156 | u_int32_t fwd; |
157 | u_int32_t stat; |
158 | struct tl_data_seg seg; |
159 | }__packed; |
160 | |
161 | #define TL_RX_CSTAT_CPLT 0x4000 /* Frame complete */ |
162 | #define TL_RX_CSTAT_EOC 0x0800 /* Rx EOC */ |
163 | #define TL_RX_CSTAT_Err 0x0400 /* Error frame */ |
164 | |
165 | /* transmit list */ |
166 | #define TL_NSEG 10 |
167 | #define TL_LAST_SEG 0x80000000 |
168 | struct tl_Tx_list { |
169 | u_int32_t fwd; |
170 | u_int32_t stat; |
171 | struct tl_data_seg seg[TL_NSEG]; |
172 | }__packed; |
173 | |
174 | #define TL_TX_CSTAT_CPLT 0x4000 /* Frame complete */ |
175 | #define TL_TX_CSTAT_EOC 0x0800 /* Tx EOC */ |
176 | |
177 | /* |
178 | * Structs used by the host used for lists management. Note that the adapter's |
179 | * lists must start on an 8 bytes boundary. |
180 | */ |
181 | |
182 | struct Rx_list { |
183 | struct mbuf *m; /* mbuf associated with this list */ |
184 | bus_dmamap_t m_dmamap; /* and its DMA map */ |
185 | struct Rx_list *next; |
186 | bus_addr_t hw_listaddr; |
187 | struct tl_Rx_list *hw_list; |
188 | }; |
189 | |
190 | struct Tx_list { |
191 | struct mbuf *m; /* mbuf associated with this list */ |
192 | bus_dmamap_t m_dmamap; /* and its DMA map */ |
193 | struct Tx_list *next; |
194 | bus_addr_t hw_listaddr; |
195 | struct tl_Tx_list *hw_list; |
196 | }; |
197 | |
198 | #endif /* ! _DEV_PCI_IF_TLREGS_H_ */ |
199 | |