1/* $NetBSD: rt2560.c,v 1.28 2016/06/10 13:27:13 ozaki-r Exp $ */
2/* $OpenBSD: rt2560.c,v 1.15 2006/04/20 20:31:12 miod Exp $ */
3/* $FreeBSD: rt2560.c,v 1.3 2006/03/21 21:15:43 damien Exp $*/
4
5/*-
6 * Copyright (c) 2005, 2006
7 * Damien Bergamini <damien.bergamini@free.fr>
8 *
9 * Permission to use, copy, modify, and distribute this software for any
10 * purpose with or without fee is hereby granted, provided that the above
11 * copyright notice and this permission notice appear in all copies.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 */
21
22/*-
23 * Ralink Technology RT2560 chipset driver
24 * http://www.ralinktech.com/
25 */
26#include <sys/cdefs.h>
27__KERNEL_RCSID(0, "$NetBSD: rt2560.c,v 1.28 2016/06/10 13:27:13 ozaki-r Exp $");
28
29
30#include <sys/param.h>
31#include <sys/sockio.h>
32#include <sys/mbuf.h>
33#include <sys/kernel.h>
34#include <sys/socket.h>
35#include <sys/systm.h>
36#include <sys/malloc.h>
37#include <sys/callout.h>
38#include <sys/conf.h>
39#include <sys/device.h>
40
41#include <sys/bus.h>
42#include <machine/endian.h>
43#include <sys/intr.h>
44
45#include <net/bpf.h>
46#include <net/if.h>
47#include <net/if_arp.h>
48#include <net/if_dl.h>
49#include <net/if_media.h>
50#include <net/if_types.h>
51#include <net/if_ether.h>
52
53#include <netinet/in.h>
54#include <netinet/in_systm.h>
55#include <netinet/in_var.h>
56#include <netinet/ip.h>
57
58#include <net80211/ieee80211_var.h>
59#include <net80211/ieee80211_rssadapt.h>
60#include <net80211/ieee80211_radiotap.h>
61
62#include <dev/ic/rt2560reg.h>
63#include <dev/ic/rt2560var.h>
64
65#ifdef RAL_DEBUG
66#define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0)
67#define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0)
68int rt2560_debug = 0;
69#else
70#define DPRINTF(x)
71#define DPRINTFN(n, x)
72#endif
73
74static int rt2560_alloc_tx_ring(struct rt2560_softc *,
75 struct rt2560_tx_ring *, int);
76static void rt2560_reset_tx_ring(struct rt2560_softc *,
77 struct rt2560_tx_ring *);
78static void rt2560_free_tx_ring(struct rt2560_softc *,
79 struct rt2560_tx_ring *);
80static int rt2560_alloc_rx_ring(struct rt2560_softc *,
81 struct rt2560_rx_ring *, int);
82static void rt2560_reset_rx_ring(struct rt2560_softc *,
83 struct rt2560_rx_ring *);
84static void rt2560_free_rx_ring(struct rt2560_softc *,
85 struct rt2560_rx_ring *);
86static struct ieee80211_node *
87 rt2560_node_alloc(struct ieee80211_node_table *);
88static int rt2560_media_change(struct ifnet *);
89static void rt2560_next_scan(void *);
90static void rt2560_iter_func(void *, struct ieee80211_node *);
91static void rt2560_update_rssadapt(void *);
92static int rt2560_newstate(struct ieee80211com *, enum ieee80211_state,
93 int);
94static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t);
95static void rt2560_encryption_intr(struct rt2560_softc *);
96static void rt2560_tx_intr(struct rt2560_softc *);
97static void rt2560_prio_intr(struct rt2560_softc *);
98static void rt2560_decryption_intr(struct rt2560_softc *);
99static void rt2560_rx_intr(struct rt2560_softc *);
100static void rt2560_beacon_expire(struct rt2560_softc *);
101static void rt2560_wakeup_expire(struct rt2560_softc *);
102static uint8_t rt2560_rxrate(struct rt2560_rx_desc *);
103static int rt2560_ack_rate(struct ieee80211com *, int);
104static uint16_t rt2560_txtime(int, int, uint32_t);
105static uint8_t rt2560_plcp_signal(int);
106static void rt2560_setup_tx_desc(struct rt2560_softc *,
107 struct rt2560_tx_desc *, uint32_t, int, int, int,
108 bus_addr_t);
109static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *,
110 struct ieee80211_node *);
111static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *,
112 struct ieee80211_node *);
113static struct mbuf *rt2560_get_rts(struct rt2560_softc *,
114 struct ieee80211_frame *, uint16_t);
115static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *,
116 struct ieee80211_node *);
117static void rt2560_start(struct ifnet *);
118static void rt2560_watchdog(struct ifnet *);
119static int rt2560_reset(struct ifnet *);
120static int rt2560_ioctl(struct ifnet *, u_long, void *);
121static void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t);
122static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t);
123static void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t);
124static void rt2560_set_chan(struct rt2560_softc *,
125 struct ieee80211_channel *);
126static void rt2560_disable_rf_tune(struct rt2560_softc *);
127static void rt2560_enable_tsf_sync(struct rt2560_softc *);
128static void rt2560_update_plcp(struct rt2560_softc *);
129static void rt2560_update_slot(struct ifnet *);
130static void rt2560_set_basicrates(struct rt2560_softc *);
131static void rt2560_update_led(struct rt2560_softc *, int, int);
132static void rt2560_set_bssid(struct rt2560_softc *, uint8_t *);
133static void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *);
134static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *);
135static void rt2560_update_promisc(struct rt2560_softc *);
136static void rt2560_set_txantenna(struct rt2560_softc *, int);
137static void rt2560_set_rxantenna(struct rt2560_softc *, int);
138static const char *rt2560_get_rf(int);
139static void rt2560_read_eeprom(struct rt2560_softc *);
140static int rt2560_bbp_init(struct rt2560_softc *);
141static int rt2560_init(struct ifnet *);
142static void rt2560_stop(struct ifnet *, int);
143
144/*
145 * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
146 */
147static const struct ieee80211_rateset rt2560_rateset_11a =
148 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
149
150static const struct ieee80211_rateset rt2560_rateset_11b =
151 { 4, { 2, 4, 11, 22 } };
152
153static const struct ieee80211_rateset rt2560_rateset_11g =
154 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
155
156/*
157 * Default values for MAC registers; values taken from the reference driver.
158 */
159static const struct {
160 uint32_t reg;
161 uint32_t val;
162} rt2560_def_mac[] = {
163 { RT2560_PSCSR0, 0x00020002 },
164 { RT2560_PSCSR1, 0x00000002 },
165 { RT2560_PSCSR2, 0x00020002 },
166 { RT2560_PSCSR3, 0x00000002 },
167 { RT2560_TIMECSR, 0x00003f21 },
168 { RT2560_CSR9, 0x00000780 },
169 { RT2560_CSR11, 0x07041483 },
170 { RT2560_CNT3, 0x00000000 },
171 { RT2560_TXCSR1, 0x07614562 },
172 { RT2560_ARSP_PLCP_0, 0x8c8d8b8a },
173 { RT2560_ACKPCTCSR, 0x7038140a },
174 { RT2560_ARTCSR1, 0x1d21252d },
175 { RT2560_ARTCSR2, 0x1919191d },
176 { RT2560_RXCSR0, 0xffffffff },
177 { RT2560_RXCSR3, 0xb3aab3af },
178 { RT2560_PCICSR, 0x000003b8 },
179 { RT2560_PWRCSR0, 0x3f3b3100 },
180 { RT2560_GPIOCSR, 0x0000ff00 },
181 { RT2560_TESTCSR, 0x000000f0 },
182 { RT2560_PWRCSR1, 0x000001ff },
183 { RT2560_MACCSR0, 0x00213223 },
184 { RT2560_MACCSR1, 0x00235518 },
185 { RT2560_RLPWCSR, 0x00000040 },
186 { RT2560_RALINKCSR, 0x9a009a11 },
187 { RT2560_CSR7, 0xffffffff },
188 { RT2560_BBPCSR1, 0x82188200 },
189 { RT2560_TXACKCSR0, 0x00000020 },
190 { RT2560_SECCSR3, 0x0000e78f }
191};
192
193/*
194 * Default values for BBP registers; values taken from the reference driver.
195 */
196static const struct {
197 uint8_t reg;
198 uint8_t val;
199} rt2560_def_bbp[] = {
200 { 3, 0x02 },
201 { 4, 0x19 },
202 { 14, 0x1c },
203 { 15, 0x30 },
204 { 16, 0xac },
205 { 17, 0x48 },
206 { 18, 0x18 },
207 { 19, 0xff },
208 { 20, 0x1e },
209 { 21, 0x08 },
210 { 22, 0x08 },
211 { 23, 0x08 },
212 { 24, 0x80 },
213 { 25, 0x50 },
214 { 26, 0x08 },
215 { 27, 0x23 },
216 { 30, 0x10 },
217 { 31, 0x2b },
218 { 32, 0xb9 },
219 { 34, 0x12 },
220 { 35, 0x50 },
221 { 39, 0xc4 },
222 { 40, 0x02 },
223 { 41, 0x60 },
224 { 53, 0x10 },
225 { 54, 0x18 },
226 { 56, 0x08 },
227 { 57, 0x10 },
228 { 58, 0x08 },
229 { 61, 0x60 },
230 { 62, 0x10 },
231 { 75, 0xff }
232};
233
234/*
235 * Default values for RF register R2 indexed by channel numbers; values taken
236 * from the reference driver.
237 */
238static const uint32_t rt2560_rf2522_r2[] = {
239 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
240 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
241};
242
243static const uint32_t rt2560_rf2523_r2[] = {
244 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
245 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
246};
247
248static const uint32_t rt2560_rf2524_r2[] = {
249 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
250 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
251};
252
253static const uint32_t rt2560_rf2525_r2[] = {
254 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
255 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
256};
257
258static const uint32_t rt2560_rf2525_hi_r2[] = {
259 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
260 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
261};
262
263static const uint32_t rt2560_rf2525e_r2[] = {
264 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
265 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
266};
267
268static const uint32_t rt2560_rf2526_hi_r2[] = {
269 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
270 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
271};
272
273static const uint32_t rt2560_rf2526_r2[] = {
274 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
275 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
276};
277
278/*
279 * For dual-band RF, RF registers R1 and R4 also depend on channel number;
280 * values taken from the reference driver.
281 */
282static const struct {
283 uint8_t chan;
284 uint32_t r1;
285 uint32_t r2;
286 uint32_t r4;
287} rt2560_rf5222[] = {
288 { 1, 0x08808, 0x0044d, 0x00282 },
289 { 2, 0x08808, 0x0044e, 0x00282 },
290 { 3, 0x08808, 0x0044f, 0x00282 },
291 { 4, 0x08808, 0x00460, 0x00282 },
292 { 5, 0x08808, 0x00461, 0x00282 },
293 { 6, 0x08808, 0x00462, 0x00282 },
294 { 7, 0x08808, 0x00463, 0x00282 },
295 { 8, 0x08808, 0x00464, 0x00282 },
296 { 9, 0x08808, 0x00465, 0x00282 },
297 { 10, 0x08808, 0x00466, 0x00282 },
298 { 11, 0x08808, 0x00467, 0x00282 },
299 { 12, 0x08808, 0x00468, 0x00282 },
300 { 13, 0x08808, 0x00469, 0x00282 },
301 { 14, 0x08808, 0x0046b, 0x00286 },
302
303 { 36, 0x08804, 0x06225, 0x00287 },
304 { 40, 0x08804, 0x06226, 0x00287 },
305 { 44, 0x08804, 0x06227, 0x00287 },
306 { 48, 0x08804, 0x06228, 0x00287 },
307 { 52, 0x08804, 0x06229, 0x00287 },
308 { 56, 0x08804, 0x0622a, 0x00287 },
309 { 60, 0x08804, 0x0622b, 0x00287 },
310 { 64, 0x08804, 0x0622c, 0x00287 },
311
312 { 100, 0x08804, 0x02200, 0x00283 },
313 { 104, 0x08804, 0x02201, 0x00283 },
314 { 108, 0x08804, 0x02202, 0x00283 },
315 { 112, 0x08804, 0x02203, 0x00283 },
316 { 116, 0x08804, 0x02204, 0x00283 },
317 { 120, 0x08804, 0x02205, 0x00283 },
318 { 124, 0x08804, 0x02206, 0x00283 },
319 { 128, 0x08804, 0x02207, 0x00283 },
320 { 132, 0x08804, 0x02208, 0x00283 },
321 { 136, 0x08804, 0x02209, 0x00283 },
322 { 140, 0x08804, 0x0220a, 0x00283 },
323
324 { 149, 0x08808, 0x02429, 0x00281 },
325 { 153, 0x08808, 0x0242b, 0x00281 },
326 { 157, 0x08808, 0x0242d, 0x00281 },
327 { 161, 0x08808, 0x0242f, 0x00281 }
328};
329
330int
331rt2560_attach(void *xsc, int id)
332{
333 struct rt2560_softc *sc = xsc;
334 struct ieee80211com *ic = &sc->sc_ic;
335 struct ifnet *ifp = &sc->sc_if;
336 int error, i;
337
338 callout_init(&sc->scan_ch, 0);
339 callout_init(&sc->rssadapt_ch, 0);
340
341 /* retrieve RT2560 rev. no */
342 sc->asic_rev = RAL_READ(sc, RT2560_CSR0);
343
344 /* retrieve MAC address */
345 rt2560_get_macaddr(sc, ic->ic_myaddr);
346
347 aprint_normal_dev(sc->sc_dev, "802.11 address %s\n",
348 ether_sprintf(ic->ic_myaddr));
349
350 /* retrieve RF rev. no and various other things from EEPROM */
351 rt2560_read_eeprom(sc);
352
353 aprint_normal_dev(sc->sc_dev, "MAC/BBP RT2560 (rev 0x%02x), RF %s\n",
354 sc->asic_rev, rt2560_get_rf(sc->rf_rev));
355
356 /*
357 * Allocate Tx and Rx rings.
358 */
359 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT);
360 if (error != 0) {
361 aprint_error_dev(sc->sc_dev, "could not allocate Tx ring\n)");
362 goto fail1;
363 }
364
365 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT);
366 if (error != 0) {
367 aprint_error_dev(sc->sc_dev, "could not allocate ATIM ring\n");
368 goto fail2;
369 }
370
371 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT);
372 if (error != 0) {
373 aprint_error_dev(sc->sc_dev, "could not allocate Prio ring\n");
374 goto fail3;
375 }
376
377 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT);
378 if (error != 0) {
379 aprint_error_dev(sc->sc_dev, "could not allocate Beacon ring\n");
380 goto fail4;
381 }
382
383 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT);
384 if (error != 0) {
385 aprint_error_dev(sc->sc_dev, "could not allocate Rx ring\n");
386 goto fail5;
387 }
388
389 ifp->if_softc = sc;
390 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
391 ifp->if_init = rt2560_init;
392 ifp->if_stop = rt2560_stop;
393 ifp->if_ioctl = rt2560_ioctl;
394 ifp->if_start = rt2560_start;
395 ifp->if_watchdog = rt2560_watchdog;
396 IFQ_SET_READY(&ifp->if_snd);
397 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
398
399 ic->ic_ifp = ifp;
400 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
401 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
402 ic->ic_state = IEEE80211_S_INIT;
403
404 /* set device capabilities */
405 ic->ic_caps =
406 IEEE80211_C_IBSS | /* IBSS mode supported */
407 IEEE80211_C_MONITOR | /* monitor mode supported */
408 IEEE80211_C_HOSTAP | /* HostAp mode supported */
409 IEEE80211_C_TXPMGT | /* tx power management */
410 IEEE80211_C_SHPREAMBLE | /* short preamble supported */
411 IEEE80211_C_SHSLOT | /* short slot time supported */
412 IEEE80211_C_WPA; /* 802.11i */
413
414 if (sc->rf_rev == RT2560_RF_5222) {
415 /* set supported .11a rates */
416 ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2560_rateset_11a;
417
418 /* set supported .11a channels */
419 for (i = 36; i <= 64; i += 4) {
420 ic->ic_channels[i].ic_freq =
421 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
422 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
423 }
424 for (i = 100; i <= 140; i += 4) {
425 ic->ic_channels[i].ic_freq =
426 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
427 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
428 }
429 for (i = 149; i <= 161; i += 4) {
430 ic->ic_channels[i].ic_freq =
431 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
432 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
433 }
434 }
435
436 /* set supported .11b and .11g rates */
437 ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2560_rateset_11b;
438 ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2560_rateset_11g;
439
440 /* set supported .11b and .11g channels (1 through 14) */
441 for (i = 1; i <= 14; i++) {
442 ic->ic_channels[i].ic_freq =
443 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
444 ic->ic_channels[i].ic_flags =
445 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
446 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
447 }
448
449 if_attach(ifp);
450 ieee80211_ifattach(ic);
451 ic->ic_node_alloc = rt2560_node_alloc;
452 ic->ic_updateslot = rt2560_update_slot;
453 ic->ic_reset = rt2560_reset;
454
455 /* override state transition machine */
456 sc->sc_newstate = ic->ic_newstate;
457 ic->ic_newstate = rt2560_newstate;
458 ieee80211_media_init(ic, rt2560_media_change, ieee80211_media_status);
459
460 bpf_attach2(ifp, DLT_IEEE802_11_RADIO,
461 sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf);
462
463 sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
464 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
465 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT);
466
467 sc->sc_txtap_len = sizeof sc->sc_txtapu;
468 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
469 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT);
470
471
472 sc->dwelltime = 200;
473
474 ieee80211_announce(ic);
475
476 if (pmf_device_register(sc->sc_dev, NULL, NULL))
477 pmf_class_network_register(sc->sc_dev, ifp);
478 else
479 aprint_error_dev(sc->sc_dev,
480 "couldn't establish power handler\n");
481
482 return 0;
483
484fail5: rt2560_free_tx_ring(sc, &sc->bcnq);
485fail4: rt2560_free_tx_ring(sc, &sc->prioq);
486fail3: rt2560_free_tx_ring(sc, &sc->atimq);
487fail2: rt2560_free_tx_ring(sc, &sc->txq);
488fail1:
489 return ENXIO;
490}
491
492
493int
494rt2560_detach(void *xsc)
495{
496 struct rt2560_softc *sc = xsc;
497 struct ifnet *ifp = &sc->sc_if;
498
499 callout_stop(&sc->scan_ch);
500 callout_stop(&sc->rssadapt_ch);
501
502 pmf_device_deregister(sc->sc_dev);
503
504 rt2560_stop(ifp, 1);
505
506 ieee80211_ifdetach(&sc->sc_ic); /* free all nodes */
507 if_detach(ifp);
508
509 rt2560_free_tx_ring(sc, &sc->txq);
510 rt2560_free_tx_ring(sc, &sc->atimq);
511 rt2560_free_tx_ring(sc, &sc->prioq);
512 rt2560_free_tx_ring(sc, &sc->bcnq);
513 rt2560_free_rx_ring(sc, &sc->rxq);
514
515 return 0;
516}
517
518int
519rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring,
520 int count)
521{
522 int i, nsegs, error;
523
524 ring->count = count;
525 ring->queued = 0;
526 ring->cur = ring->next = 0;
527 ring->cur_encrypt = ring->next_encrypt = 0;
528
529 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1,
530 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map);
531 if (error != 0) {
532 aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n");
533 goto fail;
534 }
535
536 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE,
537 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT);
538 if (error != 0) {
539 aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n");
540 goto fail;
541 }
542
543 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
544 count * RT2560_TX_DESC_SIZE, (void **)&ring->desc,
545 BUS_DMA_NOWAIT);
546 if (error != 0) {
547 aprint_error_dev(sc->sc_dev, "could not map desc DMA memory\n");
548 goto fail;
549 }
550
551 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
552 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT);
553 if (error != 0) {
554 aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n");
555 goto fail;
556 }
557
558 memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE);
559 ring->physaddr = ring->map->dm_segs->ds_addr;
560
561 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF,
562 M_NOWAIT);
563 if (ring->data == NULL) {
564 aprint_error_dev(sc->sc_dev, "could not allocate soft data\n");
565 error = ENOMEM;
566 goto fail;
567 }
568
569 memset(ring->data, 0, count * sizeof (struct rt2560_tx_data));
570 for (i = 0; i < count; i++) {
571 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
572 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT,
573 &ring->data[i].map);
574 if (error != 0) {
575 aprint_error_dev(sc->sc_dev, "could not create DMA map\n");
576 goto fail;
577 }
578 }
579
580 return 0;
581
582fail: rt2560_free_tx_ring(sc, ring);
583 return error;
584}
585
586void
587rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
588{
589 struct rt2560_tx_desc *desc;
590 struct rt2560_tx_data *data;
591 int i;
592
593 for (i = 0; i < ring->count; i++) {
594 desc = &ring->desc[i];
595 data = &ring->data[i];
596
597 if (data->m != NULL) {
598 bus_dmamap_sync(sc->sc_dmat, data->map, 0,
599 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
600 bus_dmamap_unload(sc->sc_dmat, data->map);
601 m_freem(data->m);
602 data->m = NULL;
603 }
604
605 if (data->ni != NULL) {
606 ieee80211_free_node(data->ni);
607 data->ni = NULL;
608 }
609
610 desc->flags = 0;
611 }
612
613 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
614 BUS_DMASYNC_PREWRITE);
615
616 ring->queued = 0;
617 ring->cur = ring->next = 0;
618 ring->cur_encrypt = ring->next_encrypt = 0;
619}
620
621void
622rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
623{
624 struct rt2560_tx_data *data;
625 int i;
626
627 if (ring->desc != NULL) {
628 bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
629 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
630 bus_dmamap_unload(sc->sc_dmat, ring->map);
631 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc,
632 ring->count * RT2560_TX_DESC_SIZE);
633 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
634 }
635
636 if (ring->data != NULL) {
637 for (i = 0; i < ring->count; i++) {
638 data = &ring->data[i];
639
640 if (data->m != NULL) {
641 bus_dmamap_sync(sc->sc_dmat, data->map, 0,
642 data->map->dm_mapsize,
643 BUS_DMASYNC_POSTWRITE);
644 bus_dmamap_unload(sc->sc_dmat, data->map);
645 m_freem(data->m);
646 }
647
648 if (data->ni != NULL)
649 ieee80211_free_node(data->ni);
650
651
652 if (data->map != NULL)
653 bus_dmamap_destroy(sc->sc_dmat, data->map);
654 }
655 free(ring->data, M_DEVBUF);
656 }
657}
658
659int
660rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring,
661 int count)
662{
663 struct rt2560_rx_desc *desc;
664 struct rt2560_rx_data *data;
665 int i, nsegs, error;
666
667 ring->count = count;
668 ring->cur = ring->next = 0;
669 ring->cur_decrypt = 0;
670
671 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1,
672 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map);
673 if (error != 0) {
674 aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n");
675 goto fail;
676 }
677
678 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE,
679 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT);
680 if (error != 0) {
681 aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n");
682 goto fail;
683 }
684
685 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
686 count * RT2560_RX_DESC_SIZE, (void **)&ring->desc,
687 BUS_DMA_NOWAIT);
688 if (error != 0) {
689 aprint_error_dev(sc->sc_dev, "could not map desc DMA memory\n");
690 goto fail;
691 }
692
693 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
694 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT);
695 if (error != 0) {
696 aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n");
697 goto fail;
698 }
699
700 memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE);
701 ring->physaddr = ring->map->dm_segs->ds_addr;
702
703 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF,
704 M_NOWAIT);
705 if (ring->data == NULL) {
706 aprint_error_dev(sc->sc_dev, "could not allocate soft data\n");
707 error = ENOMEM;
708 goto fail;
709 }
710
711 /*
712 * Pre-allocate Rx buffers and populate Rx ring.
713 */
714 memset(ring->data, 0, count * sizeof (struct rt2560_rx_data));
715 for (i = 0; i < count; i++) {
716 desc = &sc->rxq.desc[i];
717 data = &sc->rxq.data[i];
718
719 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
720 0, BUS_DMA_NOWAIT, &data->map);
721 if (error != 0) {
722 aprint_error_dev(sc->sc_dev, "could not create DMA map\n");
723 goto fail;
724 }
725
726 MGETHDR(data->m, M_DONTWAIT, MT_DATA);
727 if (data->m == NULL) {
728 aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf\n");
729 error = ENOMEM;
730 goto fail;
731 }
732
733 MCLGET(data->m, M_DONTWAIT);
734 if (!(data->m->m_flags & M_EXT)) {
735 aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf cluster\n");
736 error = ENOMEM;
737 goto fail;
738 }
739
740 error = bus_dmamap_load(sc->sc_dmat, data->map,
741 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT);
742 if (error != 0) {
743 aprint_error_dev(sc->sc_dev, "could not load rx buf DMA map");
744 goto fail;
745 }
746
747 desc->flags = htole32(RT2560_RX_BUSY);
748 desc->physaddr = htole32(data->map->dm_segs->ds_addr);
749 }
750
751 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
752 BUS_DMASYNC_PREWRITE);
753
754 return 0;
755
756fail: rt2560_free_rx_ring(sc, ring);
757 return error;
758}
759
760void
761rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
762{
763 int i;
764
765 for (i = 0; i < ring->count; i++) {
766 ring->desc[i].flags = htole32(RT2560_RX_BUSY);
767 ring->data[i].drop = 0;
768 }
769
770 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
771 BUS_DMASYNC_PREWRITE);
772
773 ring->cur = ring->next = 0;
774 ring->cur_decrypt = 0;
775}
776
777void
778rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
779{
780 struct rt2560_rx_data *data;
781 int i;
782
783 if (ring->desc != NULL) {
784 bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
785 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
786 bus_dmamap_unload(sc->sc_dmat, ring->map);
787 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc,
788 ring->count * RT2560_RX_DESC_SIZE);
789 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
790 }
791
792 if (ring->data != NULL) {
793 for (i = 0; i < ring->count; i++) {
794 data = &ring->data[i];
795
796 if (data->m != NULL) {
797 bus_dmamap_sync(sc->sc_dmat, data->map, 0,
798 data->map->dm_mapsize,
799 BUS_DMASYNC_POSTREAD);
800 bus_dmamap_unload(sc->sc_dmat, data->map);
801 m_freem(data->m);
802 }
803
804 if (data->map != NULL)
805 bus_dmamap_destroy(sc->sc_dmat, data->map);
806 }
807 free(ring->data, M_DEVBUF);
808 }
809}
810
811struct ieee80211_node *
812rt2560_node_alloc(struct ieee80211_node_table *nt)
813{
814 struct rt2560_node *rn;
815
816 rn = malloc(sizeof (struct rt2560_node), M_80211_NODE,
817 M_NOWAIT | M_ZERO);
818
819 return (rn != NULL) ? &rn->ni : NULL;
820}
821
822int
823rt2560_media_change(struct ifnet *ifp)
824{
825 int error;
826
827 error = ieee80211_media_change(ifp);
828 if (error != ENETRESET)
829 return error;
830
831 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
832 rt2560_init(ifp);
833
834 return 0;
835}
836
837/*
838 * This function is called periodically (every 200ms) during scanning to
839 * switch from one channel to another.
840 */
841void
842rt2560_next_scan(void *arg)
843{
844 struct rt2560_softc *sc = arg;
845 struct ieee80211com *ic = &sc->sc_ic;
846
847 if (ic->ic_state == IEEE80211_S_SCAN)
848 ieee80211_next_scan(ic);
849}
850
851/*
852 * This function is called for each neighbor node.
853 */
854void
855rt2560_iter_func(void *arg, struct ieee80211_node *ni)
856{
857 struct rt2560_node *rn = (struct rt2560_node *)ni;
858
859 ieee80211_rssadapt_updatestats(&rn->rssadapt);
860}
861
862/*
863 * This function is called periodically (every 100ms) in RUN state to update
864 * the rate adaptation statistics.
865 */
866void
867rt2560_update_rssadapt(void *arg)
868{
869 struct rt2560_softc *sc = arg;
870 struct ieee80211com *ic = &sc->sc_ic;
871
872 ieee80211_iterate_nodes(&ic->ic_sta, rt2560_iter_func, arg);
873
874 callout_reset(&sc->rssadapt_ch, hz / 10, rt2560_update_rssadapt, sc);
875}
876
877int
878rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
879{
880 struct rt2560_softc *sc = ic->ic_ifp->if_softc;
881 enum ieee80211_state ostate;
882 struct ieee80211_node *ni;
883 struct mbuf *m;
884 int error = 0;
885
886 ostate = ic->ic_state;
887 callout_stop(&sc->scan_ch);
888
889 switch (nstate) {
890 case IEEE80211_S_INIT:
891 callout_stop(&sc->rssadapt_ch);
892
893 if (ostate == IEEE80211_S_RUN) {
894 /* abort TSF synchronization */
895 RAL_WRITE(sc, RT2560_CSR14, 0);
896
897 /* turn association led off */
898 rt2560_update_led(sc, 0, 0);
899 }
900 break;
901
902 case IEEE80211_S_SCAN:
903 rt2560_set_chan(sc, ic->ic_curchan);
904 callout_reset(&sc->scan_ch, (sc->dwelltime * hz) / 1000,
905 rt2560_next_scan, sc);
906 break;
907
908 case IEEE80211_S_AUTH:
909 rt2560_set_chan(sc, ic->ic_curchan);
910 break;
911
912 case IEEE80211_S_ASSOC:
913 rt2560_set_chan(sc, ic->ic_curchan);
914 break;
915
916 case IEEE80211_S_RUN:
917 rt2560_set_chan(sc, ic->ic_curchan);
918
919 ni = ic->ic_bss;
920
921 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
922 rt2560_update_plcp(sc);
923 rt2560_set_basicrates(sc);
924 rt2560_set_bssid(sc, ni->ni_bssid);
925 }
926
927 if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
928 ic->ic_opmode == IEEE80211_M_IBSS) {
929 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo);
930 if (m == NULL) {
931 aprint_error_dev(sc->sc_dev, "could not allocate beacon\n");
932 error = ENOBUFS;
933 break;
934 }
935
936 ieee80211_ref_node(ni);
937 error = rt2560_tx_bcn(sc, m, ni);
938 if (error != 0)
939 break;
940 }
941
942 /* turn assocation led on */
943 rt2560_update_led(sc, 1, 0);
944
945 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
946 callout_reset(&sc->rssadapt_ch, hz / 10,
947 rt2560_update_rssadapt, sc);
948 rt2560_enable_tsf_sync(sc);
949 }
950 break;
951 }
952
953 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg);
954}
955
956/*
957 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
958 * 93C66).
959 */
960uint16_t
961rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr)
962{
963 uint32_t tmp;
964 uint16_t val;
965 int n;
966
967 /* clock C once before the first command */
968 RT2560_EEPROM_CTL(sc, 0);
969
970 RT2560_EEPROM_CTL(sc, RT2560_S);
971 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
972 RT2560_EEPROM_CTL(sc, RT2560_S);
973
974 /* write start bit (1) */
975 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
976 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
977
978 /* write READ opcode (10) */
979 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
980 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
981 RT2560_EEPROM_CTL(sc, RT2560_S);
982 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
983
984 /* write address (A5-A0 or A7-A0) */
985 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7;
986 for (; n >= 0; n--) {
987 RT2560_EEPROM_CTL(sc, RT2560_S |
988 (((addr >> n) & 1) << RT2560_SHIFT_D));
989 RT2560_EEPROM_CTL(sc, RT2560_S |
990 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C);
991 }
992
993 RT2560_EEPROM_CTL(sc, RT2560_S);
994
995 /* read data Q15-Q0 */
996 val = 0;
997 for (n = 15; n >= 0; n--) {
998 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
999 tmp = RAL_READ(sc, RT2560_CSR21);
1000 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n;
1001 RT2560_EEPROM_CTL(sc, RT2560_S);
1002 }
1003
1004 RT2560_EEPROM_CTL(sc, 0);
1005
1006 /* clear Chip Select and clock C */
1007 RT2560_EEPROM_CTL(sc, RT2560_S);
1008 RT2560_EEPROM_CTL(sc, 0);
1009 RT2560_EEPROM_CTL(sc, RT2560_C);
1010
1011 return val;
1012}
1013
1014/*
1015 * Some frames were processed by the hardware cipher engine and are ready for
1016 * transmission.
1017 */
1018void
1019rt2560_encryption_intr(struct rt2560_softc *sc)
1020{
1021 struct rt2560_tx_desc *desc;
1022 int hw;
1023
1024 /* retrieve last descriptor index processed by cipher engine */
1025 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) /
1026 RT2560_TX_DESC_SIZE;
1027
1028 for (; sc->txq.next_encrypt != hw;) {
1029 desc = &sc->txq.desc[sc->txq.next_encrypt];
1030
1031 bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
1032 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE,
1033 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD);
1034
1035 if (le32toh(desc->flags) &
1036 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY))
1037 break;
1038
1039 /* for TKIP, swap eiv field to fix a bug in ASIC */
1040 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) ==
1041 RT2560_TX_CIPHER_TKIP)
1042 desc->eiv = bswap32(desc->eiv);
1043
1044 /* mark the frame ready for transmission */
1045 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID);
1046
1047 bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
1048 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE,
1049 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE);
1050
1051 DPRINTFN(15, ("encryption done idx=%u\n",
1052 sc->txq.next_encrypt));
1053
1054 sc->txq.next_encrypt =
1055 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT;
1056 }
1057
1058 /* kick Tx */
1059 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX);
1060}
1061
1062void
1063rt2560_tx_intr(struct rt2560_softc *sc)
1064{
1065 struct ieee80211com *ic = &sc->sc_ic;
1066 struct ifnet *ifp = ic->ic_ifp;
1067 struct rt2560_tx_desc *desc;
1068 struct rt2560_tx_data *data;
1069 struct rt2560_node *rn;
1070
1071 for (;;) {
1072 desc = &sc->txq.desc[sc->txq.next];
1073 data = &sc->txq.data[sc->txq.next];
1074
1075 bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
1076 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1077 BUS_DMASYNC_POSTREAD);
1078
1079 if ((le32toh(desc->flags) & RT2560_TX_BUSY) ||
1080 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY) ||
1081 !(le32toh(desc->flags) & RT2560_TX_VALID))
1082 break;
1083
1084 rn = (struct rt2560_node *)data->ni;
1085
1086 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) {
1087 case RT2560_TX_SUCCESS:
1088 DPRINTFN(10, ("data frame sent successfully\n"));
1089 if (data->id.id_node != NULL) {
1090 ieee80211_rssadapt_raise_rate(ic,
1091 &rn->rssadapt, &data->id);
1092 }
1093 ifp->if_opackets++;
1094 break;
1095
1096 case RT2560_TX_SUCCESS_RETRY:
1097 DPRINTFN(9, ("data frame sent after %u retries\n",
1098 (le32toh(desc->flags) >> 5) & 0x7));
1099 ifp->if_opackets++;
1100 break;
1101
1102 case RT2560_TX_FAIL_RETRY:
1103 DPRINTFN(9, ("sending data frame failed (too much "
1104 "retries)\n"));
1105 if (data->id.id_node != NULL) {
1106 ieee80211_rssadapt_lower_rate(ic, data->ni,
1107 &rn->rssadapt, &data->id);
1108 }
1109 ifp->if_oerrors++;
1110 break;
1111
1112 case RT2560_TX_FAIL_INVALID:
1113 case RT2560_TX_FAIL_OTHER:
1114 default:
1115 aprint_error_dev(sc->sc_dev, "sending data frame failed 0x%08x\n",
1116 le32toh(desc->flags));
1117 ifp->if_oerrors++;
1118 }
1119
1120 bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1121 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
1122 bus_dmamap_unload(sc->sc_dmat, data->map);
1123 m_freem(data->m);
1124 data->m = NULL;
1125 ieee80211_free_node(data->ni);
1126 data->ni = NULL;
1127
1128 /* descriptor is no longer valid */
1129 desc->flags &= ~htole32(RT2560_TX_VALID);
1130
1131 bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
1132 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1133 BUS_DMASYNC_PREWRITE);
1134
1135 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next));
1136
1137 sc->txq.queued--;
1138 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT;
1139 }
1140
1141 sc->sc_tx_timer = 0;
1142 ifp->if_flags &= ~IFF_OACTIVE;
1143 rt2560_start(ifp);
1144}
1145
1146void
1147rt2560_prio_intr(struct rt2560_softc *sc)
1148{
1149 struct ieee80211com *ic = &sc->sc_ic;
1150 struct ifnet *ifp = ic->ic_ifp;
1151 struct rt2560_tx_desc *desc;
1152 struct rt2560_tx_data *data;
1153
1154 for (;;) {
1155 desc = &sc->prioq.desc[sc->prioq.next];
1156 data = &sc->prioq.data[sc->prioq.next];
1157
1158 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,
1159 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1160 BUS_DMASYNC_POSTREAD);
1161
1162 if ((le32toh(desc->flags) & RT2560_TX_BUSY) ||
1163 !(le32toh(desc->flags) & RT2560_TX_VALID))
1164 break;
1165
1166 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) {
1167 case RT2560_TX_SUCCESS:
1168 DPRINTFN(10, ("mgt frame sent successfully\n"));
1169 break;
1170
1171 case RT2560_TX_SUCCESS_RETRY:
1172 DPRINTFN(9, ("mgt frame sent after %u retries\n",
1173 (le32toh(desc->flags) >> 5) & 0x7));
1174 break;
1175
1176 case RT2560_TX_FAIL_RETRY:
1177 DPRINTFN(9, ("sending mgt frame failed (too much "
1178 "retries)\n"));
1179 break;
1180
1181 case RT2560_TX_FAIL_INVALID:
1182 case RT2560_TX_FAIL_OTHER:
1183 default:
1184 aprint_error_dev(sc->sc_dev, "sending mgt frame failed 0x%08x\n",
1185 le32toh(desc->flags));
1186 }
1187
1188 bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1189 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
1190 bus_dmamap_unload(sc->sc_dmat, data->map);
1191 m_freem(data->m);
1192 data->m = NULL;
1193 ieee80211_free_node(data->ni);
1194 data->ni = NULL;
1195
1196 /* descriptor is no longer valid */
1197 desc->flags &= ~htole32(RT2560_TX_VALID);
1198
1199 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,
1200 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1201 BUS_DMASYNC_PREWRITE);
1202
1203 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next));
1204
1205 sc->prioq.queued--;
1206 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT;
1207 }
1208
1209 sc->sc_tx_timer = 0;
1210 ifp->if_flags &= ~IFF_OACTIVE;
1211 rt2560_start(ifp);
1212}
1213
1214/*
1215 * Some frames were processed by the hardware cipher engine and are ready for
1216 * transmission to the IEEE802.11 layer.
1217 */
1218void
1219rt2560_decryption_intr(struct rt2560_softc *sc)
1220{
1221 struct ieee80211com *ic = &sc->sc_ic;
1222 struct ifnet *ifp = ic->ic_ifp;
1223 struct rt2560_rx_desc *desc;
1224 struct rt2560_rx_data *data;
1225 struct rt2560_node *rn;
1226 struct ieee80211_frame *wh;
1227 struct ieee80211_node *ni;
1228 struct mbuf *mnew, *m;
1229 int hw, error;
1230
1231 /* retrieve last decriptor index processed by cipher engine */
1232 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) /
1233 RT2560_RX_DESC_SIZE;
1234
1235 for (; sc->rxq.cur_decrypt != hw;) {
1236 desc = &sc->rxq.desc[sc->rxq.cur_decrypt];
1237 data = &sc->rxq.data[sc->rxq.cur_decrypt];
1238
1239 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1240 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE,
1241 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD);
1242
1243 if (le32toh(desc->flags) &
1244 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY))
1245 break;
1246
1247 if (data->drop) {
1248 ifp->if_ierrors++;
1249 goto skip;
1250 }
1251
1252 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 &&
1253 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) {
1254 ifp->if_ierrors++;
1255 goto skip;
1256 }
1257
1258 /*
1259 * Try to allocate a new mbuf for this ring element and load it
1260 * before processing the current mbuf. If the ring element
1261 * cannot be loaded, drop the received packet and reuse the old
1262 * mbuf. In the unlikely case that the old mbuf can't be
1263 * reloaded either, explicitly panic.
1264 */
1265 MGETHDR(mnew, M_DONTWAIT, MT_DATA);
1266 if (mnew == NULL) {
1267 ifp->if_ierrors++;
1268 goto skip;
1269 }
1270
1271 MCLGET(mnew, M_DONTWAIT);
1272 if (!(mnew->m_flags & M_EXT)) {
1273 m_freem(mnew);
1274 ifp->if_ierrors++;
1275 goto skip;
1276 }
1277
1278 bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1279 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD);
1280 bus_dmamap_unload(sc->sc_dmat, data->map);
1281
1282 error = bus_dmamap_load(sc->sc_dmat, data->map,
1283 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT);
1284 if (error != 0) {
1285 m_freem(mnew);
1286
1287 /* try to reload the old mbuf */
1288 error = bus_dmamap_load(sc->sc_dmat, data->map,
1289 mtod(data->m, void *), MCLBYTES, NULL,
1290 BUS_DMA_NOWAIT);
1291 if (error != 0) {
1292 /* very unlikely that it will fail... */
1293 panic("%s: could not load old rx mbuf",
1294 device_xname(sc->sc_dev));
1295 }
1296 /* physical address may have changed */
1297 desc->physaddr = htole32(data->map->dm_segs->ds_addr);
1298 ifp->if_ierrors++;
1299 goto skip;
1300 }
1301
1302 /*
1303 * New mbuf successfully loaded, update Rx ring and continue
1304 * processing.
1305 */
1306 m = data->m;
1307 data->m = mnew;
1308 desc->physaddr = htole32(data->map->dm_segs->ds_addr);
1309
1310 /* finalize mbuf */
1311 m_set_rcvif(m, ifp);
1312 m->m_pkthdr.len = m->m_len =
1313 (le32toh(desc->flags) >> 16) & 0xfff;
1314
1315 if (sc->sc_drvbpf != NULL) {
1316 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap;
1317 uint32_t tsf_lo, tsf_hi;
1318
1319 /* get timestamp (low and high 32 bits) */
1320 tsf_hi = RAL_READ(sc, RT2560_CSR17);
1321 tsf_lo = RAL_READ(sc, RT2560_CSR16);
1322
1323 tap->wr_tsf =
1324 htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1325 tap->wr_flags = 0;
1326 tap->wr_rate = rt2560_rxrate(desc);
1327 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1328 tap->wr_chan_flags =
1329 htole16(ic->ic_ibss_chan->ic_flags);
1330 tap->wr_antenna = sc->rx_ant;
1331 tap->wr_antsignal = desc->rssi;
1332
1333 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m);
1334 }
1335
1336 wh = mtod(m, struct ieee80211_frame *);
1337 ni = ieee80211_find_rxnode(ic,
1338 (struct ieee80211_frame_min *)wh);
1339
1340 /* send the frame to the 802.11 layer */
1341 ieee80211_input(ic, m, ni, desc->rssi, 0);
1342
1343 /* give rssi to the rate adatation algorithm */
1344 rn = (struct rt2560_node *)ni;
1345 ieee80211_rssadapt_input(ic, ni, &rn->rssadapt, desc->rssi);
1346
1347 /* node is no longer needed */
1348 ieee80211_free_node(ni);
1349
1350skip: desc->flags = htole32(RT2560_RX_BUSY);
1351
1352 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1353 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE,
1354 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE);
1355
1356 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt));
1357
1358 sc->rxq.cur_decrypt =
1359 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT;
1360 }
1361
1362 /*
1363 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd
1364 * without calling if_start().
1365 */
1366 if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE))
1367 rt2560_start(ifp);
1368}
1369
1370/*
1371 * Some frames were received. Pass them to the hardware cipher engine before
1372 * sending them to the 802.11 layer.
1373 */
1374void
1375rt2560_rx_intr(struct rt2560_softc *sc)
1376{
1377 struct rt2560_rx_desc *desc;
1378 struct rt2560_rx_data *data;
1379
1380 for (;;) {
1381 desc = &sc->rxq.desc[sc->rxq.cur];
1382 data = &sc->rxq.data[sc->rxq.cur];
1383
1384 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1385 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE,
1386 BUS_DMASYNC_POSTREAD);
1387
1388 if (le32toh(desc->flags) &
1389 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY))
1390 break;
1391
1392 data->drop = 0;
1393
1394 if (le32toh(desc->flags) &
1395 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) {
1396 /*
1397 * This should not happen since we did not request
1398 * to receive those frames when we filled RXCSR0.
1399 */
1400 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n",
1401 le32toh(desc->flags)));
1402 data->drop = 1;
1403 }
1404
1405 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) {
1406 DPRINTFN(5, ("bad length\n"));
1407 data->drop = 1;
1408 }
1409
1410 /* mark the frame for decryption */
1411 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY);
1412
1413 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1414 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE,
1415 BUS_DMASYNC_PREWRITE);
1416
1417 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur));
1418
1419 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT;
1420 }
1421
1422 /* kick decrypt */
1423 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT);
1424}
1425
1426/*
1427 * This function is called periodically in IBSS mode when a new beacon must be
1428 * sent out.
1429 */
1430static void
1431rt2560_beacon_expire(struct rt2560_softc *sc)
1432{
1433 struct ieee80211com *ic = &sc->sc_ic;
1434 struct rt2560_tx_data *data;
1435
1436 if (ic->ic_opmode != IEEE80211_M_IBSS &&
1437 ic->ic_opmode != IEEE80211_M_HOSTAP)
1438 return;
1439
1440 data = &sc->bcnq.data[sc->bcnq.next];
1441
1442 bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1443 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
1444 bus_dmamap_unload(sc->sc_dmat, data->map);
1445
1446 ieee80211_beacon_update(ic, data->ni, &sc->sc_bo, data->m, 1);
1447
1448 bpf_mtap3(ic->ic_rawbpf, data->m);
1449 rt2560_tx_bcn(sc, data->m, data->ni);
1450
1451 DPRINTFN(15, ("beacon expired\n"));
1452
1453 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT;
1454}
1455
1456static void
1457rt2560_wakeup_expire(struct rt2560_softc *sc)
1458{
1459 DPRINTFN(15, ("wakeup expired\n"));
1460}
1461
1462int
1463rt2560_intr(void *arg)
1464{
1465 struct rt2560_softc *sc = arg;
1466 struct ifnet *ifp = &sc->sc_if;
1467 uint32_t r;
1468
1469 if (!device_is_active(sc->sc_dev))
1470 return 0;
1471
1472 if ((r = RAL_READ(sc, RT2560_CSR7)) == 0)
1473 return 0; /* not for us */
1474
1475 /* disable interrupts */
1476 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
1477
1478 /* acknowledge interrupts */
1479 RAL_WRITE(sc, RT2560_CSR7, r);
1480
1481 /* don't re-enable interrupts if we're shutting down */
1482 if (!(ifp->if_flags & IFF_RUNNING))
1483 return 0;
1484
1485 if (r & RT2560_BEACON_EXPIRE)
1486 rt2560_beacon_expire(sc);
1487
1488 if (r & RT2560_WAKEUP_EXPIRE)
1489 rt2560_wakeup_expire(sc);
1490
1491 if (r & RT2560_ENCRYPTION_DONE)
1492 rt2560_encryption_intr(sc);
1493
1494 if (r & RT2560_TX_DONE)
1495 rt2560_tx_intr(sc);
1496
1497 if (r & RT2560_PRIO_DONE)
1498 rt2560_prio_intr(sc);
1499
1500 if (r & RT2560_DECRYPTION_DONE)
1501 rt2560_decryption_intr(sc);
1502
1503 if (r & RT2560_RX_DONE)
1504 rt2560_rx_intr(sc);
1505
1506 /* re-enable interrupts */
1507 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
1508
1509 return 1;
1510}
1511
1512/* quickly determine if a given rate is CCK or OFDM */
1513#define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
1514
1515#define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */
1516#define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */
1517
1518#define RAL_SIFS 10 /* us */
1519
1520#define RT2560_RXTX_TURNAROUND 10 /* us */
1521
1522/*
1523 * This function is only used by the Rx radiotap code. It returns the rate at
1524 * which a given frame was received.
1525 */
1526static uint8_t
1527rt2560_rxrate(struct rt2560_rx_desc *desc)
1528{
1529 if (le32toh(desc->flags) & RT2560_RX_OFDM) {
1530 /* reverse function of rt2560_plcp_signal */
1531 switch (desc->rate) {
1532 case 0xb: return 12;
1533 case 0xf: return 18;
1534 case 0xa: return 24;
1535 case 0xe: return 36;
1536 case 0x9: return 48;
1537 case 0xd: return 72;
1538 case 0x8: return 96;
1539 case 0xc: return 108;
1540 }
1541 } else {
1542 if (desc->rate == 10)
1543 return 2;
1544 if (desc->rate == 20)
1545 return 4;
1546 if (desc->rate == 55)
1547 return 11;
1548 if (desc->rate == 110)
1549 return 22;
1550 }
1551 return 2; /* should not get there */
1552}
1553
1554/*
1555 * Return the expected ack rate for a frame transmitted at rate `rate'.
1556 * XXX: this should depend on the destination node basic rate set.
1557 */
1558static int
1559rt2560_ack_rate(struct ieee80211com *ic, int rate)
1560{
1561 switch (rate) {
1562 /* CCK rates */
1563 case 2:
1564 return 2;
1565 case 4:
1566 case 11:
1567 case 22:
1568 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
1569
1570 /* OFDM rates */
1571 case 12:
1572 case 18:
1573 return 12;
1574 case 24:
1575 case 36:
1576 return 24;
1577 case 48:
1578 case 72:
1579 case 96:
1580 case 108:
1581 return 48;
1582 }
1583
1584 /* default to 1Mbps */
1585 return 2;
1586}
1587
1588/*
1589 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
1590 * The function automatically determines the operating mode depending on the
1591 * given rate. `flags' indicates whether short preamble is in use or not.
1592 */
1593static uint16_t
1594rt2560_txtime(int len, int rate, uint32_t flags)
1595{
1596 uint16_t txtime;
1597
1598 if (RAL_RATE_IS_OFDM(rate)) {
1599 /* IEEE Std 802.11a-1999, pp. 37 */
1600 txtime = (8 + 4 * len + 3 + rate - 1) / rate;
1601 txtime = 16 + 4 + 4 * txtime + 6;
1602 } else {
1603 /* IEEE Std 802.11b-1999, pp. 28 */
1604 txtime = (16 * len + rate - 1) / rate;
1605 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
1606 txtime += 72 + 24;
1607 else
1608 txtime += 144 + 48;
1609 }
1610 return txtime;
1611}
1612
1613static uint8_t
1614rt2560_plcp_signal(int rate)
1615{
1616 switch (rate) {
1617 /* CCK rates (returned values are device-dependent) */
1618 case 2: return 0x0;
1619 case 4: return 0x1;
1620 case 11: return 0x2;
1621 case 22: return 0x3;
1622
1623 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1624 case 12: return 0xb;
1625 case 18: return 0xf;
1626 case 24: return 0xa;
1627 case 36: return 0xe;
1628 case 48: return 0x9;
1629 case 72: return 0xd;
1630 case 96: return 0x8;
1631 case 108: return 0xc;
1632
1633 /* unsupported rates (should not get there) */
1634 default: return 0xff;
1635 }
1636}
1637
1638static void
1639rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc,
1640 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr)
1641{
1642 struct ieee80211com *ic = &sc->sc_ic;
1643 uint16_t plcp_length;
1644 int remainder;
1645
1646 desc->flags = htole32(flags);
1647 desc->flags |= htole32(len << 16);
1648 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) :
1649 htole32(RT2560_TX_BUSY | RT2560_TX_VALID);
1650
1651 desc->physaddr = htole32(physaddr);
1652 desc->wme = htole16(
1653 RT2560_AIFSN(2) |
1654 RT2560_LOGCWMIN(3) |
1655 RT2560_LOGCWMAX(8));
1656
1657 /* setup PLCP fields */
1658 desc->plcp_signal = rt2560_plcp_signal(rate);
1659 desc->plcp_service = 4;
1660
1661 len += IEEE80211_CRC_LEN;
1662 if (RAL_RATE_IS_OFDM(rate)) {
1663 desc->flags |= htole32(RT2560_TX_OFDM);
1664
1665 plcp_length = len & 0xfff;
1666 desc->plcp_length_hi = plcp_length >> 6;
1667 desc->plcp_length_lo = plcp_length & 0x3f;
1668 } else {
1669 plcp_length = (16 * len + rate - 1) / rate;
1670 if (rate == 22) {
1671 remainder = (16 * len) % 22;
1672 if (remainder != 0 && remainder < 7)
1673 desc->plcp_service |= RT2560_PLCP_LENGEXT;
1674 }
1675 desc->plcp_length_hi = plcp_length >> 8;
1676 desc->plcp_length_lo = plcp_length & 0xff;
1677
1678 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1679 desc->plcp_signal |= 0x08;
1680 }
1681}
1682
1683static int
1684rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0,
1685 struct ieee80211_node *ni)
1686{
1687 struct rt2560_tx_desc *desc;
1688 struct rt2560_tx_data *data;
1689 int rate, error;
1690
1691 desc = &sc->bcnq.desc[sc->bcnq.cur];
1692 data = &sc->bcnq.data[sc->bcnq.cur];
1693
1694 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1695
1696 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1697 BUS_DMA_NOWAIT);
1698 if (error != 0) {
1699 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n",
1700 error);
1701 m_freem(m0);
1702 return error;
1703 }
1704
1705 data->m = m0;
1706 data->ni = ni;
1707
1708 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF |
1709 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0,
1710 data->map->dm_segs->ds_addr);
1711
1712 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
1713 BUS_DMASYNC_PREWRITE);
1714 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map,
1715 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1716 BUS_DMASYNC_PREWRITE);
1717
1718 return 0;
1719}
1720
1721static int
1722rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0,
1723 struct ieee80211_node *ni)
1724{
1725 struct ieee80211com *ic = &sc->sc_ic;
1726 struct rt2560_tx_desc *desc;
1727 struct rt2560_tx_data *data;
1728 struct ieee80211_frame *wh;
1729 struct ieee80211_key *k;
1730 uint16_t dur;
1731 uint32_t flags = 0;
1732 int rate, error;
1733
1734 desc = &sc->prioq.desc[sc->prioq.cur];
1735 data = &sc->prioq.data[sc->prioq.cur];
1736
1737 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1738
1739 wh = mtod(m0, struct ieee80211_frame *);
1740
1741 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1742 k = ieee80211_crypto_encap(ic, ni, m0);
1743 if (k == NULL) {
1744 m_freem(m0);
1745 return ENOBUFS;
1746 }
1747
1748 /* packet header may have moved, reset our local pointer */
1749 wh = mtod(m0, struct ieee80211_frame *);
1750 }
1751
1752 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1753 BUS_DMA_NOWAIT);
1754 if (error != 0) {
1755 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n",
1756 error);
1757 m_freem(m0);
1758 return error;
1759 }
1760
1761 if (sc->sc_drvbpf != NULL) {
1762 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1763
1764 tap->wt_flags = 0;
1765 tap->wt_rate = rate;
1766 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1767 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1768 tap->wt_antenna = sc->tx_ant;
1769
1770 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
1771 }
1772
1773 data->m = m0;
1774 data->ni = ni;
1775
1776 wh = mtod(m0, struct ieee80211_frame *);
1777
1778 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1779 flags |= RT2560_TX_ACK;
1780
1781 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) +
1782 RAL_SIFS;
1783 *(uint16_t *)wh->i_dur = htole16(dur);
1784
1785 /* tell hardware to add timestamp for probe responses */
1786 if ((wh->i_fc[0] &
1787 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1788 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1789 flags |= RT2560_TX_TIMESTAMP;
1790 }
1791
1792 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0,
1793 data->map->dm_segs->ds_addr);
1794
1795 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
1796 BUS_DMASYNC_PREWRITE);
1797 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,
1798 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1799 BUS_DMASYNC_PREWRITE);
1800
1801 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n",
1802 m0->m_pkthdr.len, sc->prioq.cur, rate));
1803
1804 /* kick prio */
1805 sc->prioq.queued++;
1806 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT;
1807 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO);
1808
1809 return 0;
1810}
1811
1812/*
1813 * Build a RTS control frame.
1814 */
1815static struct mbuf *
1816rt2560_get_rts(struct rt2560_softc *sc, struct ieee80211_frame *wh,
1817 uint16_t dur)
1818{
1819 struct ieee80211_frame_rts *rts;
1820 struct mbuf *m;
1821
1822 MGETHDR(m, M_DONTWAIT, MT_DATA);
1823 if (m == NULL) {
1824 sc->sc_ic.ic_stats.is_tx_nobuf++;
1825 aprint_error_dev(sc->sc_dev, "could not allocate RTS frame\n");
1826 return NULL;
1827 }
1828
1829 rts = mtod(m, struct ieee80211_frame_rts *);
1830
1831 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL |
1832 IEEE80211_FC0_SUBTYPE_RTS;
1833 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS;
1834 *(uint16_t *)rts->i_dur = htole16(dur);
1835 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1);
1836 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2);
1837
1838 m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts);
1839
1840 return m;
1841}
1842
1843static int
1844rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0,
1845 struct ieee80211_node *ni)
1846{
1847 struct ieee80211com *ic = &sc->sc_ic;
1848 struct rt2560_tx_desc *desc;
1849 struct rt2560_tx_data *data;
1850 struct rt2560_node *rn;
1851 struct ieee80211_rateset *rs;
1852 struct ieee80211_frame *wh;
1853 struct ieee80211_key *k;
1854 struct mbuf *mnew;
1855 uint16_t dur;
1856 uint32_t flags = 0;
1857 int rate, error;
1858
1859 wh = mtod(m0, struct ieee80211_frame *);
1860
1861 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) {
1862 rs = &ic->ic_sup_rates[ic->ic_curmode];
1863 rate = rs->rs_rates[ic->ic_fixed_rate];
1864 } else {
1865 rs = &ni->ni_rates;
1866 rn = (struct rt2560_node *)ni;
1867 ni->ni_txrate = ieee80211_rssadapt_choose(&rn->rssadapt, rs,
1868 wh, m0->m_pkthdr.len, -1, NULL, 0);
1869 rate = rs->rs_rates[ni->ni_txrate];
1870 }
1871 rate &= IEEE80211_RATE_VAL;
1872
1873 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1874 k = ieee80211_crypto_encap(ic, ni, m0);
1875 if (k == NULL) {
1876 m_freem(m0);
1877 return ENOBUFS;
1878 }
1879
1880 /* packet header may have moved, reset our local pointer */
1881 wh = mtod(m0, struct ieee80211_frame *);
1882 }
1883
1884 /*
1885 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange
1886 * for directed frames only when the length of the MPDU is greater
1887 * than the length threshold indicated by [...]" ic_rtsthreshold.
1888 */
1889 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
1890 m0->m_pkthdr.len > ic->ic_rtsthreshold) {
1891 struct mbuf *m;
1892 int rtsrate, ackrate;
1893
1894 rtsrate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1895 ackrate = rt2560_ack_rate(ic, rate);
1896
1897 dur = rt2560_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) +
1898 rt2560_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) +
1899 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) +
1900 3 * RAL_SIFS;
1901
1902 m = rt2560_get_rts(sc, wh, dur);
1903
1904 desc = &sc->txq.desc[sc->txq.cur_encrypt];
1905 data = &sc->txq.data[sc->txq.cur_encrypt];
1906
1907 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m,
1908 BUS_DMA_NOWAIT);
1909 if (error != 0) {
1910 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n",
1911 error);
1912 m_freem(m);
1913 m_freem(m0);
1914 return error;
1915 }
1916
1917 /* avoid multiple free() of the same node for each fragment */
1918 ieee80211_ref_node(ni);
1919
1920 data->m = m;
1921 data->ni = ni;
1922
1923 /* RTS frames are not taken into account for rssadapt */
1924 data->id.id_node = NULL;
1925
1926 rt2560_setup_tx_desc(sc, desc, RT2560_TX_ACK |
1927 RT2560_TX_MORE_FRAG, m->m_pkthdr.len, rtsrate, 1,
1928 data->map->dm_segs->ds_addr);
1929
1930 bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1931 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE);
1932 bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
1933 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE,
1934 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE);
1935
1936 sc->txq.queued++;
1937 sc->txq.cur_encrypt =
1938 (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT;
1939
1940 /*
1941 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the
1942 * asynchronous data frame shall be transmitted after the CTS
1943 * frame and a SIFS period.
1944 */
1945 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS;
1946 }
1947
1948 data = &sc->txq.data[sc->txq.cur_encrypt];
1949 desc = &sc->txq.desc[sc->txq.cur_encrypt];
1950
1951 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1952 BUS_DMA_NOWAIT);
1953 if (error != 0 && error != EFBIG) {
1954 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n",
1955 error);
1956 m_freem(m0);
1957 return error;
1958 }
1959 if (error != 0) {
1960 /* too many fragments, linearize */
1961
1962 MGETHDR(mnew, M_DONTWAIT, MT_DATA);
1963 if (mnew == NULL) {
1964 m_freem(m0);
1965 return ENOMEM;
1966 }
1967
1968 M_COPY_PKTHDR(mnew, m0);
1969 if (m0->m_pkthdr.len > MHLEN) {
1970 MCLGET(mnew, M_DONTWAIT);
1971 if (!(mnew->m_flags & M_EXT)) {
1972 m_freem(m0);
1973 m_freem(mnew);
1974 return ENOMEM;
1975 }
1976 }
1977
1978 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, void *));
1979 m_freem(m0);
1980 mnew->m_len = mnew->m_pkthdr.len;
1981 m0 = mnew;
1982
1983 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1984 BUS_DMA_NOWAIT);
1985 if (error != 0) {
1986 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n",
1987 error);
1988 m_freem(m0);
1989 return error;
1990 }
1991
1992 /* packet header have moved, reset our local pointer */
1993 wh = mtod(m0, struct ieee80211_frame *);
1994 }
1995
1996 if (sc->sc_drvbpf != NULL) {
1997 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1998
1999 tap->wt_flags = 0;
2000 tap->wt_rate = rate;
2001 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
2002 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
2003 tap->wt_antenna = sc->tx_ant;
2004
2005 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
2006 }
2007
2008 data->m = m0;
2009 data->ni = ni;
2010
2011 /* remember link conditions for rate adaptation algorithm */
2012 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) {
2013 data->id.id_len = m0->m_pkthdr.len;
2014 data->id.id_rateidx = ni->ni_txrate;
2015 data->id.id_node = ni;
2016 data->id.id_rssi = ni->ni_rssi;
2017 } else
2018 data->id.id_node = NULL;
2019
2020 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2021 flags |= RT2560_TX_ACK;
2022
2023 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate),
2024 ic->ic_flags) + RAL_SIFS;
2025 *(uint16_t *)wh->i_dur = htole16(dur);
2026 }
2027
2028 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1,
2029 data->map->dm_segs->ds_addr);
2030
2031 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
2032 BUS_DMASYNC_PREWRITE);
2033 bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
2034 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
2035 BUS_DMASYNC_PREWRITE);
2036
2037 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n",
2038 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate));
2039
2040 /* kick encrypt */
2041 sc->txq.queued++;
2042 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT;
2043 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT);
2044
2045 return 0;
2046}
2047
2048static void
2049rt2560_start(struct ifnet *ifp)
2050{
2051 struct rt2560_softc *sc = ifp->if_softc;
2052 struct ieee80211com *ic = &sc->sc_ic;
2053 struct mbuf *m0;
2054 struct ieee80211_node *ni;
2055 struct ether_header *eh;
2056
2057 /*
2058 * net80211 may still try to send management frames even if the
2059 * IFF_RUNNING flag is not set...
2060 */
2061 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
2062 return;
2063
2064 for (;;) {
2065 IF_POLL(&ic->ic_mgtq, m0);
2066 if (m0 != NULL) {
2067 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) {
2068 ifp->if_flags |= IFF_OACTIVE;
2069 break;
2070 }
2071 IF_DEQUEUE(&ic->ic_mgtq, m0);
2072 if (m0 == NULL)
2073 break;
2074
2075 ni = M_GETCTX(m0, struct ieee80211_node *);
2076 M_CLEARCTX(m0);
2077 bpf_mtap3(ic->ic_rawbpf, m0);
2078 if (rt2560_tx_mgt(sc, m0, ni) != 0)
2079 break;
2080
2081 } else {
2082 if (ic->ic_state != IEEE80211_S_RUN)
2083 break;
2084 IFQ_DEQUEUE(&ifp->if_snd, m0);
2085 if (m0 == NULL)
2086 break;
2087 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) {
2088 ifp->if_flags |= IFF_OACTIVE;
2089 break;
2090 }
2091
2092 if (m0->m_len < sizeof (struct ether_header) &&
2093 !(m0 = m_pullup(m0, sizeof (struct ether_header))))
2094 continue;
2095
2096 eh = mtod(m0, struct ether_header *);
2097 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
2098 if (ni == NULL) {
2099 m_freem(m0);
2100 continue;
2101 }
2102 bpf_mtap(ifp, m0);
2103
2104 m0 = ieee80211_encap(ic, m0, ni);
2105 if (m0 == NULL) {
2106 ieee80211_free_node(ni);
2107 continue;
2108 }
2109
2110 bpf_mtap3(ic->ic_rawbpf, m0);
2111
2112 if (rt2560_tx_data(sc, m0, ni) != 0) {
2113 ieee80211_free_node(ni);
2114 ifp->if_oerrors++;
2115 break;
2116 }
2117 }
2118
2119 sc->sc_tx_timer = 5;
2120 ifp->if_timer = 1;
2121 }
2122}
2123
2124static void
2125rt2560_watchdog(struct ifnet *ifp)
2126{
2127 struct rt2560_softc *sc = ifp->if_softc;
2128
2129 ifp->if_timer = 0;
2130
2131 if (sc->sc_tx_timer > 0) {
2132 if (--sc->sc_tx_timer == 0) {
2133 aprint_error_dev(sc->sc_dev, "device timeout\n");
2134 rt2560_init(ifp);
2135 ifp->if_oerrors++;
2136 return;
2137 }
2138 ifp->if_timer = 1;
2139 }
2140
2141 ieee80211_watchdog(&sc->sc_ic);
2142}
2143
2144/*
2145 * This function allows for fast channel switching in monitor mode (used by
2146 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to
2147 * generate a new beacon frame.
2148 */
2149static int
2150rt2560_reset(struct ifnet *ifp)
2151{
2152 struct rt2560_softc *sc = ifp->if_softc;
2153 struct ieee80211com *ic = &sc->sc_ic;
2154
2155 if (ic->ic_opmode != IEEE80211_M_MONITOR)
2156 return ENETRESET;
2157
2158 rt2560_set_chan(sc, ic->ic_curchan);
2159
2160 return 0;
2161}
2162
2163int
2164rt2560_ioctl(struct ifnet *ifp, u_long cmd, void *data)
2165{
2166 struct rt2560_softc *sc = ifp->if_softc;
2167 struct ieee80211com *ic = &sc->sc_ic;
2168 int s, error = 0;
2169
2170 s = splnet();
2171
2172 switch (cmd) {
2173 case SIOCSIFFLAGS:
2174 if ((error = ifioctl_common(ifp, cmd, data)) != 0)
2175 break;
2176 if (ifp->if_flags & IFF_UP) {
2177 if (ifp->if_flags & IFF_RUNNING)
2178 rt2560_update_promisc(sc);
2179 else
2180 rt2560_init(ifp);
2181 } else {
2182 if (ifp->if_flags & IFF_RUNNING)
2183 rt2560_stop(ifp, 1);
2184 }
2185 break;
2186
2187 case SIOCADDMULTI:
2188 case SIOCDELMULTI:
2189 /* XXX no h/w multicast filter? --dyoung */
2190 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET)
2191 error = 0;
2192 break;
2193
2194 case SIOCS80211CHANNEL:
2195 /*
2196 * This allows for fast channel switching in monitor mode
2197 * (used by kismet). In IBSS mode, we must explicitly reset
2198 * the interface to generate a new beacon frame.
2199 */
2200 error = ieee80211_ioctl(ic, cmd, data);
2201 if (error == ENETRESET &&
2202 ic->ic_opmode == IEEE80211_M_MONITOR) {
2203 rt2560_set_chan(sc, ic->ic_ibss_chan);
2204 error = 0;
2205 }
2206 break;
2207
2208 default:
2209 error = ieee80211_ioctl(ic, cmd, data);
2210 }
2211
2212 if (error == ENETRESET) {
2213 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
2214 (IFF_UP | IFF_RUNNING))
2215 rt2560_init(ifp);
2216 error = 0;
2217 }
2218
2219 splx(s);
2220
2221 return error;
2222}
2223
2224static void
2225rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val)
2226{
2227 uint32_t tmp;
2228 int ntries;
2229
2230 for (ntries = 0; ntries < 100; ntries++) {
2231 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY))
2232 break;
2233 DELAY(1);
2234 }
2235 if (ntries == 100) {
2236 aprint_error_dev(sc->sc_dev, "could not write to BBP\n");
2237 return;
2238 }
2239
2240 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val;
2241 RAL_WRITE(sc, RT2560_BBPCSR, tmp);
2242
2243 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val));
2244}
2245
2246static uint8_t
2247rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg)
2248{
2249 uint32_t val;
2250 int ntries;
2251
2252 val = RT2560_BBP_BUSY | reg << 8;
2253 RAL_WRITE(sc, RT2560_BBPCSR, val);
2254
2255 for (ntries = 0; ntries < 100; ntries++) {
2256 val = RAL_READ(sc, RT2560_BBPCSR);
2257 if (!(val & RT2560_BBP_BUSY))
2258 return val & 0xff;
2259 DELAY(1);
2260 }
2261
2262 aprint_error_dev(sc->sc_dev, "could not read from BBP\n");
2263 return 0;
2264}
2265
2266static void
2267rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val)
2268{
2269 uint32_t tmp;
2270 int ntries;
2271
2272 for (ntries = 0; ntries < 100; ntries++) {
2273 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY))
2274 break;
2275 DELAY(1);
2276 }
2277 if (ntries == 100) {
2278 aprint_error_dev(sc->sc_dev, "could not write to RF\n");
2279 return;
2280 }
2281
2282 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 |
2283 (reg & 0x3);
2284 RAL_WRITE(sc, RT2560_RFCSR, tmp);
2285
2286 /* remember last written value in sc */
2287 sc->rf_regs[reg] = val;
2288
2289 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
2290}
2291
2292static void
2293rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c)
2294{
2295 struct ieee80211com *ic = &sc->sc_ic;
2296 uint8_t power, tmp;
2297 u_int i, chan;
2298
2299 chan = ieee80211_chan2ieee(ic, c);
2300 if (chan == 0 || chan == IEEE80211_CHAN_ANY)
2301 return;
2302
2303 if (IEEE80211_IS_CHAN_2GHZ(c))
2304 power = min(sc->txpow[chan - 1], 31);
2305 else
2306 power = 31;
2307
2308 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
2309
2310 switch (sc->rf_rev) {
2311 case RT2560_RF_2522:
2312 rt2560_rf_write(sc, RT2560_RF1, 0x00814);
2313 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]);
2314 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040);
2315 break;
2316
2317 case RT2560_RF_2523:
2318 rt2560_rf_write(sc, RT2560_RF1, 0x08804);
2319 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]);
2320 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044);
2321 rt2560_rf_write(sc, RT2560_RF4,
2322 (chan == 14) ? 0x00280 : 0x00286);
2323 break;
2324
2325 case RT2560_RF_2524:
2326 rt2560_rf_write(sc, RT2560_RF1, 0x0c808);
2327 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]);
2328 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040);
2329 rt2560_rf_write(sc, RT2560_RF4,
2330 (chan == 14) ? 0x00280 : 0x00286);
2331 break;
2332
2333 case RT2560_RF_2525:
2334 rt2560_rf_write(sc, RT2560_RF1, 0x08808);
2335 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]);
2336 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2337 rt2560_rf_write(sc, RT2560_RF4,
2338 (chan == 14) ? 0x00280 : 0x00286);
2339
2340 rt2560_rf_write(sc, RT2560_RF1, 0x08808);
2341 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]);
2342 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2343 rt2560_rf_write(sc, RT2560_RF4,
2344 (chan == 14) ? 0x00280 : 0x00286);
2345 break;
2346
2347 case RT2560_RF_2525E:
2348 rt2560_rf_write(sc, RT2560_RF1, 0x08808);
2349 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]);
2350 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2351 rt2560_rf_write(sc, RT2560_RF4,
2352 (chan == 14) ? 0x00286 : 0x00282);
2353 break;
2354
2355 case RT2560_RF_2526:
2356 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]);
2357 rt2560_rf_write(sc, RT2560_RF4,
2358 (chan & 1) ? 0x00386 : 0x00381);
2359 rt2560_rf_write(sc, RT2560_RF1, 0x08804);
2360
2361 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]);
2362 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2363 rt2560_rf_write(sc, RT2560_RF4,
2364 (chan & 1) ? 0x00386 : 0x00381);
2365 break;
2366
2367 /* dual-band RF */
2368 case RT2560_RF_5222:
2369 for (i = 0; rt2560_rf5222[i].chan != chan; i++);
2370
2371 rt2560_rf_write(sc, RT2560_RF1, rt2560_rf5222[i].r1);
2372 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf5222[i].r2);
2373 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040);
2374 rt2560_rf_write(sc, RT2560_RF4, rt2560_rf5222[i].r4);
2375 break;
2376 }
2377
2378 if (ic->ic_opmode != IEEE80211_M_MONITOR &&
2379 ic->ic_state != IEEE80211_S_SCAN) {
2380 /* set Japan filter bit for channel 14 */
2381 tmp = rt2560_bbp_read(sc, 70);
2382
2383 tmp &= ~RT2560_JAPAN_FILTER;
2384 if (chan == 14)
2385 tmp |= RT2560_JAPAN_FILTER;
2386
2387 rt2560_bbp_write(sc, 70, tmp);
2388
2389 DELAY(1000); /* RF needs a 1ms delay here */
2390 rt2560_disable_rf_tune(sc);
2391
2392 /* clear CRC errors */
2393 RAL_READ(sc, RT2560_CNT0);
2394 }
2395}
2396
2397/*
2398 * Disable RF auto-tuning.
2399 */
2400static void
2401rt2560_disable_rf_tune(struct rt2560_softc *sc)
2402{
2403 uint32_t tmp;
2404
2405 if (sc->rf_rev != RT2560_RF_2523) {
2406 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE;
2407 rt2560_rf_write(sc, RT2560_RF1, tmp);
2408 }
2409
2410 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE;
2411 rt2560_rf_write(sc, RT2560_RF3, tmp);
2412
2413 DPRINTFN(2, ("disabling RF autotune\n"));
2414}
2415
2416/*
2417 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
2418 * synchronization.
2419 */
2420static void
2421rt2560_enable_tsf_sync(struct rt2560_softc *sc)
2422{
2423 struct ieee80211com *ic = &sc->sc_ic;
2424 uint16_t logcwmin, preload;
2425 uint32_t tmp;
2426
2427 /* first, disable TSF synchronization */
2428 RAL_WRITE(sc, RT2560_CSR14, 0);
2429
2430 tmp = 16 * ic->ic_bss->ni_intval;
2431 RAL_WRITE(sc, RT2560_CSR12, tmp);
2432
2433 RAL_WRITE(sc, RT2560_CSR13, 0);
2434
2435 logcwmin = 5;
2436 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024;
2437 tmp = logcwmin << 16 | preload;
2438 RAL_WRITE(sc, RT2560_BCNOCSR, tmp);
2439
2440 /* finally, enable TSF synchronization */
2441 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN;
2442 if (ic->ic_opmode == IEEE80211_M_STA)
2443 tmp |= RT2560_ENABLE_TSF_SYNC(1);
2444 else
2445 tmp |= RT2560_ENABLE_TSF_SYNC(2) |
2446 RT2560_ENABLE_BEACON_GENERATOR;
2447 RAL_WRITE(sc, RT2560_CSR14, tmp);
2448
2449 DPRINTF(("enabling TSF synchronization\n"));
2450}
2451
2452static void
2453rt2560_update_plcp(struct rt2560_softc *sc)
2454{
2455 struct ieee80211com *ic = &sc->sc_ic;
2456
2457 /* no short preamble for 1Mbps */
2458 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400);
2459
2460 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) {
2461 /* values taken from the reference driver */
2462 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401);
2463 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402);
2464 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403);
2465 } else {
2466 /* same values as above or'ed 0x8 */
2467 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409);
2468 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a);
2469 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b);
2470 }
2471
2472 DPRINTF(("updating PLCP for %s preamble\n",
2473 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long"));
2474}
2475
2476/*
2477 * IEEE 802.11a uses short slot time. Refer to IEEE Std 802.11-1999 pp. 85 to
2478 * know how these values are computed.
2479 */
2480static void
2481rt2560_update_slot(struct ifnet *ifp)
2482{
2483 struct rt2560_softc *sc = ifp->if_softc;
2484 struct ieee80211com *ic = &sc->sc_ic;
2485 uint8_t slottime;
2486 uint16_t sifs, pifs, difs, eifs;
2487 uint32_t tmp;
2488
2489 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2490
2491 /* define the MAC slot boundaries */
2492 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND;
2493 pifs = sifs + slottime;
2494 difs = sifs + 2 * slottime;
2495 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60;
2496
2497 tmp = RAL_READ(sc, RT2560_CSR11);
2498 tmp = (tmp & ~0x1f00) | slottime << 8;
2499 RAL_WRITE(sc, RT2560_CSR11, tmp);
2500
2501 tmp = pifs << 16 | sifs;
2502 RAL_WRITE(sc, RT2560_CSR18, tmp);
2503
2504 tmp = eifs << 16 | difs;
2505 RAL_WRITE(sc, RT2560_CSR19, tmp);
2506
2507 DPRINTF(("setting slottime to %uus\n", slottime));
2508}
2509
2510static void
2511rt2560_set_basicrates(struct rt2560_softc *sc)
2512{
2513 struct ieee80211com *ic = &sc->sc_ic;
2514
2515 /* update basic rate set */
2516 if (ic->ic_curmode == IEEE80211_MODE_11B) {
2517 /* 11b basic rates: 1, 2Mbps */
2518 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3);
2519 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) {
2520 /* 11a basic rates: 6, 12, 24Mbps */
2521 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x150);
2522 } else {
2523 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
2524 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x15f);
2525 }
2526}
2527
2528static void
2529rt2560_update_led(struct rt2560_softc *sc, int led1, int led2)
2530{
2531 uint32_t tmp;
2532
2533 /* set ON period to 70ms and OFF period to 30ms */
2534 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30;
2535 RAL_WRITE(sc, RT2560_LEDCSR, tmp);
2536}
2537
2538static void
2539rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid)
2540{
2541 uint32_t tmp;
2542
2543 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2544 RAL_WRITE(sc, RT2560_CSR5, tmp);
2545
2546 tmp = bssid[4] | bssid[5] << 8;
2547 RAL_WRITE(sc, RT2560_CSR6, tmp);
2548
2549 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid)));
2550}
2551
2552static void
2553rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr)
2554{
2555 uint32_t tmp;
2556
2557 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2558 RAL_WRITE(sc, RT2560_CSR3, tmp);
2559
2560 tmp = addr[4] | addr[5] << 8;
2561 RAL_WRITE(sc, RT2560_CSR4, tmp);
2562
2563 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr)));
2564}
2565
2566static void
2567rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr)
2568{
2569 uint32_t tmp;
2570
2571 tmp = RAL_READ(sc, RT2560_CSR3);
2572 addr[0] = tmp & 0xff;
2573 addr[1] = (tmp >> 8) & 0xff;
2574 addr[2] = (tmp >> 16) & 0xff;
2575 addr[3] = (tmp >> 24);
2576
2577 tmp = RAL_READ(sc, RT2560_CSR4);
2578 addr[4] = tmp & 0xff;
2579 addr[5] = (tmp >> 8) & 0xff;
2580}
2581
2582static void
2583rt2560_update_promisc(struct rt2560_softc *sc)
2584{
2585 struct ifnet *ifp = &sc->sc_if;
2586 uint32_t tmp;
2587
2588 tmp = RAL_READ(sc, RT2560_RXCSR0);
2589
2590 tmp &= ~RT2560_DROP_NOT_TO_ME;
2591 if (!(ifp->if_flags & IFF_PROMISC))
2592 tmp |= RT2560_DROP_NOT_TO_ME;
2593
2594 RAL_WRITE(sc, RT2560_RXCSR0, tmp);
2595
2596 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
2597 "entering" : "leaving"));
2598}
2599
2600static void
2601rt2560_set_txantenna(struct rt2560_softc *sc, int antenna)
2602{
2603 uint32_t tmp;
2604 uint8_t tx;
2605
2606 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK;
2607 if (antenna == 1)
2608 tx |= RT2560_BBP_ANTA;
2609 else if (antenna == 2)
2610 tx |= RT2560_BBP_ANTB;
2611 else
2612 tx |= RT2560_BBP_DIVERSITY;
2613
2614 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2615 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 ||
2616 sc->rf_rev == RT2560_RF_5222)
2617 tx |= RT2560_BBP_FLIPIQ;
2618
2619 rt2560_bbp_write(sc, RT2560_BBP_TX, tx);
2620
2621 /* update values for CCK and OFDM in BBPCSR1 */
2622 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007;
2623 tmp |= (tx & 0x7) << 16 | (tx & 0x7);
2624 RAL_WRITE(sc, RT2560_BBPCSR1, tmp);
2625}
2626
2627static void
2628rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna)
2629{
2630 uint8_t rx;
2631
2632 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK;
2633 if (antenna == 1)
2634 rx |= RT2560_BBP_ANTA;
2635 else if (antenna == 2)
2636 rx |= RT2560_BBP_ANTB;
2637 else
2638 rx |= RT2560_BBP_DIVERSITY;
2639
2640 /* need to force no I/Q flip for RF 2525e and 2526 */
2641 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526)
2642 rx &= ~RT2560_BBP_FLIPIQ;
2643
2644 rt2560_bbp_write(sc, RT2560_BBP_RX, rx);
2645}
2646
2647static const char *
2648rt2560_get_rf(int rev)
2649{
2650 switch (rev) {
2651 case RT2560_RF_2522: return "RT2522";
2652 case RT2560_RF_2523: return "RT2523";
2653 case RT2560_RF_2524: return "RT2524";
2654 case RT2560_RF_2525: return "RT2525";
2655 case RT2560_RF_2525E: return "RT2525e";
2656 case RT2560_RF_2526: return "RT2526";
2657 case RT2560_RF_5222: return "RT5222";
2658 default: return "unknown";
2659 }
2660}
2661
2662static void
2663rt2560_read_eeprom(struct rt2560_softc *sc)
2664{
2665 uint16_t val;
2666 int i;
2667
2668 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0);
2669 sc->rf_rev = (val >> 11) & 0x1f;
2670 sc->hw_radio = (val >> 10) & 0x1;
2671 sc->led_mode = (val >> 6) & 0x7;
2672 sc->rx_ant = (val >> 4) & 0x3;
2673 sc->tx_ant = (val >> 2) & 0x3;
2674 sc->nb_ant = val & 0x3;
2675
2676 /* read default values for BBP registers */
2677 for (i = 0; i < 16; i++) {
2678 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i);
2679 sc->bbp_prom[i].reg = val >> 8;
2680 sc->bbp_prom[i].val = val & 0xff;
2681 }
2682
2683 /* read Tx power for all b/g channels */
2684 for (i = 0; i < 14 / 2; i++) {
2685 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i);
2686 sc->txpow[i * 2] = val >> 8;
2687 sc->txpow[i * 2 + 1] = val & 0xff;
2688 }
2689}
2690
2691static int
2692rt2560_bbp_init(struct rt2560_softc *sc)
2693{
2694#define N(a) (sizeof (a) / sizeof ((a)[0]))
2695 int i, ntries;
2696
2697 /* wait for BBP to be ready */
2698 for (ntries = 0; ntries < 100; ntries++) {
2699 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0)
2700 break;
2701 DELAY(1);
2702 }
2703 if (ntries == 100) {
2704 aprint_error_dev(sc->sc_dev, "timeout waiting for BBP\n");
2705 return EIO;
2706 }
2707
2708 /* initialize BBP registers to default values */
2709 for (i = 0; i < N(rt2560_def_bbp); i++) {
2710 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg,
2711 rt2560_def_bbp[i].val);
2712 }
2713#if 0
2714 /* initialize BBP registers to values stored in EEPROM */
2715 for (i = 0; i < 16; i++) {
2716 if (sc->bbp_prom[i].reg == 0xff)
2717 continue;
2718 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2719 }
2720#endif
2721
2722 return 0;
2723#undef N
2724}
2725
2726static int
2727rt2560_init(struct ifnet *ifp)
2728{
2729#define N(a) (sizeof (a) / sizeof ((a)[0]))
2730 struct rt2560_softc *sc = ifp->if_softc;
2731 struct ieee80211com *ic = &sc->sc_ic;
2732 uint32_t tmp;
2733 int i;
2734
2735 /* for CardBus, power on the socket */
2736 if (!(sc->sc_flags & RT2560_ENABLED)) {
2737 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
2738 aprint_error_dev(sc->sc_dev, "could not enable device\n");
2739 return EIO;
2740 }
2741 sc->sc_flags |= RT2560_ENABLED;
2742 }
2743
2744 rt2560_stop(ifp, 1);
2745
2746 /* setup tx rings */
2747 tmp = RT2560_PRIO_RING_COUNT << 24 |
2748 RT2560_ATIM_RING_COUNT << 16 |
2749 RT2560_TX_RING_COUNT << 8 |
2750 RT2560_TX_DESC_SIZE;
2751
2752 /* rings _must_ be initialized in this _exact_ order! */
2753 RAL_WRITE(sc, RT2560_TXCSR2, tmp);
2754 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr);
2755 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr);
2756 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr);
2757 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr);
2758
2759 /* setup rx ring */
2760 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE;
2761
2762 RAL_WRITE(sc, RT2560_RXCSR1, tmp);
2763 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr);
2764
2765 /* initialize MAC registers to default values */
2766 for (i = 0; i < N(rt2560_def_mac); i++)
2767 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val);
2768
2769 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl));
2770 rt2560_set_macaddr(sc, ic->ic_myaddr);
2771
2772 /* set basic rate set (will be updated later) */
2773 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153);
2774
2775 rt2560_update_slot(ifp);
2776 rt2560_update_plcp(sc);
2777 rt2560_update_led(sc, 0, 0);
2778
2779 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
2780 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY);
2781
2782 if (rt2560_bbp_init(sc) != 0) {
2783 rt2560_stop(ifp, 1);
2784 return EIO;
2785 }
2786
2787 rt2560_set_txantenna(sc, 1);
2788 rt2560_set_rxantenna(sc, 1);
2789
2790 /* set default BSS channel */
2791 ic->ic_bss->ni_chan = ic->ic_ibss_chan;
2792 rt2560_set_chan(sc, ic->ic_bss->ni_chan);
2793
2794 /* kick Rx */
2795 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR;
2796 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2797 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR;
2798 if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2799 tmp |= RT2560_DROP_TODS;
2800 if (!(ifp->if_flags & IFF_PROMISC))
2801 tmp |= RT2560_DROP_NOT_TO_ME;
2802 }
2803 RAL_WRITE(sc, RT2560_RXCSR0, tmp);
2804
2805 /* clear old FCS and Rx FIFO errors */
2806 RAL_READ(sc, RT2560_CNT0);
2807 RAL_READ(sc, RT2560_CNT4);
2808
2809 /* clear any pending interrupts */
2810 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff);
2811
2812 /* enable interrupts */
2813 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
2814
2815 ifp->if_flags &= ~IFF_OACTIVE;
2816 ifp->if_flags |= IFF_RUNNING;
2817
2818 if (ic->ic_opmode == IEEE80211_M_MONITOR)
2819 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2820 else
2821 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2822
2823 return 0;
2824#undef N
2825}
2826
2827static void
2828rt2560_stop(struct ifnet *ifp, int disable)
2829{
2830 struct rt2560_softc *sc = ifp->if_softc;
2831 struct ieee80211com *ic = &sc->sc_ic;
2832
2833 sc->sc_tx_timer = 0;
2834 ifp->if_timer = 0;
2835 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2836
2837 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */
2838
2839 /* abort Tx */
2840 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX);
2841
2842 /* disable Rx */
2843 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX);
2844
2845 /* reset ASIC (and thus, BBP) */
2846 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
2847 RAL_WRITE(sc, RT2560_CSR1, 0);
2848
2849 /* disable interrupts */
2850 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
2851
2852 /* clear any pending interrupt */
2853 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff);
2854
2855 /* reset Tx and Rx rings */
2856 rt2560_reset_tx_ring(sc, &sc->txq);
2857 rt2560_reset_tx_ring(sc, &sc->atimq);
2858 rt2560_reset_tx_ring(sc, &sc->prioq);
2859 rt2560_reset_tx_ring(sc, &sc->bcnq);
2860 rt2560_reset_rx_ring(sc, &sc->rxq);
2861
2862}
2863