1 | /* $NetBSD: adv_cardbus.c,v 1.30 2016/07/14 10:19:06 msaitoh Exp $ */ |
2 | |
3 | /*- |
4 | * Copyright (c) 2000 The NetBSD Foundation, Inc. |
5 | * All rights reserved. |
6 | * |
7 | * This code is derived from software contributed to The NetBSD Foundation |
8 | * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, |
9 | * NASA Ames Research Center. |
10 | * |
11 | * Redistribution and use in source and binary forms, with or without |
12 | * modification, are permitted provided that the following conditions |
13 | * are met: |
14 | * 1. Redistributions of source code must retain the above copyright |
15 | * notice, this list of conditions and the following disclaimer. |
16 | * 2. Redistributions in binary form must reproduce the above copyright |
17 | * notice, this list of conditions and the following disclaimer in the |
18 | * documentation and/or other materials provided with the distribution. |
19 | * |
20 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
21 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
22 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
23 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
24 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
25 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
26 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
27 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
28 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
29 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
30 | * POSSIBILITY OF SUCH DAMAGE. |
31 | */ |
32 | |
33 | /* |
34 | * this file was brought from ahc_cardbus.c and adv_pci.c |
35 | * and modified by YAMAMOTO Takashi. |
36 | */ |
37 | |
38 | #include <sys/cdefs.h> |
39 | __KERNEL_RCSID(0, "$NetBSD: adv_cardbus.c,v 1.30 2016/07/14 10:19:06 msaitoh Exp $" ); |
40 | |
41 | #include <sys/param.h> |
42 | #include <sys/systm.h> |
43 | #include <sys/malloc.h> |
44 | #include <sys/kernel.h> |
45 | #include <sys/queue.h> |
46 | #include <sys/device.h> |
47 | |
48 | #include <sys/bus.h> |
49 | #include <sys/intr.h> |
50 | |
51 | #include <dev/scsipi/scsi_all.h> |
52 | #include <dev/scsipi/scsipi_all.h> |
53 | #include <dev/scsipi/scsiconf.h> |
54 | |
55 | #include <dev/pci/pcireg.h> |
56 | #include <dev/pci/pcidevs.h> |
57 | |
58 | #include <dev/cardbus/cardbusvar.h> |
59 | #include <dev/pci/pcidevs.h> |
60 | |
61 | #include <dev/ic/advlib.h> |
62 | #include <dev/ic/adv.h> |
63 | |
64 | #define ADV_CARDBUS_IOBA PCI_BAR0 |
65 | #define ADV_CARDBUS_MMBA PCI_BAR1 |
66 | |
67 | #define ADV_CARDBUS_DEBUG |
68 | #define ADV_CARDBUS_ALLOW_MEMIO |
69 | |
70 | #define DEVNAME(sc) device_xname((sc)->sc_dev) |
71 | |
72 | struct adv_cardbus_softc { |
73 | struct asc_softc sc_adv; /* real ADV */ |
74 | |
75 | /* CardBus-specific goo. */ |
76 | cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ |
77 | pcitag_t sc_tag; |
78 | |
79 | int sc_bar; |
80 | pcireg_t sc_csr; |
81 | bus_size_t sc_size; |
82 | }; |
83 | |
84 | int adv_cardbus_match(device_t, cfdata_t, void *); |
85 | void adv_cardbus_attach(device_t, device_t, void *); |
86 | int adv_cardbus_detach(device_t, int); |
87 | |
88 | CFATTACH_DECL_NEW(adv_cardbus, sizeof(struct adv_cardbus_softc), |
89 | adv_cardbus_match, adv_cardbus_attach, adv_cardbus_detach, NULL); |
90 | |
91 | int |
92 | adv_cardbus_match(device_t parent, cfdata_t match, void *aux) |
93 | { |
94 | struct cardbus_attach_args *ca = aux; |
95 | |
96 | if (PCI_VENDOR(ca->ca_id) == PCI_VENDOR_ADVSYS && |
97 | PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_ADVSYS_ULTRA) |
98 | return (1); |
99 | |
100 | return (0); |
101 | } |
102 | |
103 | void |
104 | adv_cardbus_attach(device_t parent, device_t self, void *aux) |
105 | { |
106 | struct cardbus_attach_args *ca = aux; |
107 | struct adv_cardbus_softc *csc = device_private(self); |
108 | struct asc_softc *sc = &csc->sc_adv; |
109 | cardbus_devfunc_t ct = ca->ca_ct; |
110 | bus_space_tag_t iot; |
111 | bus_space_handle_t ioh; |
112 | pcireg_t reg; |
113 | u_int8_t latency = 0x20; |
114 | |
115 | sc->sc_dev = self; |
116 | sc->sc_flags = 0; |
117 | |
118 | if (PCI_VENDOR(ca->ca_id) == PCI_VENDOR_ADVSYS) { |
119 | switch (PCI_PRODUCT(ca->ca_id)) { |
120 | case PCI_PRODUCT_ADVSYS_1200A: |
121 | aprint_normal(": AdvanSys ASC1200A SCSI adapter\n" ); |
122 | latency = 0; |
123 | break; |
124 | |
125 | case PCI_PRODUCT_ADVSYS_1200B: |
126 | aprint_normal(": AdvanSys ASC1200B SCSI adapter\n" ); |
127 | latency = 0; |
128 | break; |
129 | |
130 | case PCI_PRODUCT_ADVSYS_ULTRA: |
131 | switch (PCI_REVISION(ca->ca_class)) { |
132 | case ASC_PCI_REVISION_3050: |
133 | aprint_normal(": AdvanSys ABP-9xxUA " |
134 | "SCSI adapter\n" ); |
135 | break; |
136 | |
137 | case ASC_PCI_REVISION_3150: |
138 | aprint_normal(": AdvanSys ABP-9xxU " |
139 | "SCSI adapter\n" ); |
140 | break; |
141 | } |
142 | break; |
143 | |
144 | default: |
145 | aprint_error(": unknown model!\n" ); |
146 | return; |
147 | } |
148 | } |
149 | |
150 | csc->sc_ct = ct; |
151 | csc->sc_tag = ca->ca_tag; |
152 | |
153 | /* |
154 | * Map the device. |
155 | */ |
156 | csc->sc_csr = PCI_COMMAND_MASTER_ENABLE; |
157 | |
158 | #ifdef ADV_CARDBUS_ALLOW_MEMIO |
159 | if (Cardbus_mapreg_map(csc->sc_ct, ADV_CARDBUS_MMBA, |
160 | PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, |
161 | &iot, &ioh, NULL, &csc->sc_size) == 0) { |
162 | #ifdef ADV_CARDBUS_DEBUG |
163 | printf("%s: memio enabled\n" , DEVNAME(sc)); |
164 | #endif |
165 | csc->sc_bar = ADV_CARDBUS_MMBA; |
166 | csc->sc_csr |= PCI_COMMAND_MEM_ENABLE; |
167 | } else |
168 | #endif |
169 | if (Cardbus_mapreg_map(csc->sc_ct, ADV_CARDBUS_IOBA, |
170 | PCI_MAPREG_TYPE_IO, 0, &iot, &ioh, NULL, &csc->sc_size) == 0) { |
171 | #ifdef ADV_CARDBUS_DEBUG |
172 | printf("%s: io enabled\n" , DEVNAME(sc)); |
173 | #endif |
174 | csc->sc_bar = ADV_CARDBUS_IOBA; |
175 | csc->sc_csr |= PCI_COMMAND_IO_ENABLE; |
176 | } else { |
177 | csc->sc_bar = 0; |
178 | aprint_error_dev(self, "unable to map device registers\n" ); |
179 | return; |
180 | } |
181 | |
182 | /* Enable the appropriate bits in the PCI CSR. */ |
183 | reg = Cardbus_conf_read(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG); |
184 | reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE); |
185 | reg |= csc->sc_csr; |
186 | Cardbus_conf_write(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG, reg); |
187 | |
188 | /* |
189 | * Make sure the latency timer is set to some reasonable |
190 | * value. |
191 | */ |
192 | reg = Cardbus_conf_read(ct, ca->ca_tag, PCI_BHLC_REG); |
193 | if (PCI_LATTIMER(reg) < latency) { |
194 | reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); |
195 | reg |= (latency << PCI_LATTIMER_SHIFT); |
196 | Cardbus_conf_write(ct, ca->ca_tag, PCI_BHLC_REG, reg); |
197 | } |
198 | |
199 | ASC_SET_CHIP_CONTROL(iot, ioh, ASC_CC_HALT); |
200 | ASC_SET_CHIP_STATUS(iot, ioh, 0); |
201 | |
202 | sc->sc_iot = iot; |
203 | sc->sc_ioh = ioh; |
204 | sc->sc_dmat = ca->ca_dmat; |
205 | sc->pci_device_id = ca->ca_id; |
206 | sc->bus_type = ASC_IS_PCI; |
207 | sc->chip_version = ASC_GET_CHIP_VER_NO(iot, ioh); |
208 | |
209 | /* |
210 | * Initialize the board |
211 | */ |
212 | if (adv_init(sc)) { |
213 | aprint_error_dev(self, "adv_init failed\n" ); |
214 | return; |
215 | } |
216 | |
217 | /* |
218 | * Establish the interrupt. |
219 | */ |
220 | sc->sc_ih = Cardbus_intr_establish(ct, IPL_BIO, adv_intr, sc); |
221 | if (sc->sc_ih == NULL) { |
222 | aprint_error_dev(self, "unable to establish interrupt\n" ); |
223 | return; |
224 | } |
225 | |
226 | /* |
227 | * Attach. |
228 | */ |
229 | adv_attach(sc); |
230 | } |
231 | |
232 | int |
233 | adv_cardbus_detach(device_t self, int flags) |
234 | { |
235 | struct adv_cardbus_softc *csc = device_private(self); |
236 | struct asc_softc *sc = &csc->sc_adv; |
237 | |
238 | int rv; |
239 | |
240 | rv = adv_detach(sc, flags); |
241 | if (rv) |
242 | return rv; |
243 | |
244 | if (sc->sc_ih) { |
245 | Cardbus_intr_disestablish(csc->sc_ct, sc->sc_ih); |
246 | sc->sc_ih = 0; |
247 | } |
248 | |
249 | if (csc->sc_bar != 0) { |
250 | Cardbus_mapreg_unmap(csc->sc_ct, csc->sc_bar, |
251 | sc->sc_iot, sc->sc_ioh, csc->sc_size); |
252 | csc->sc_bar = 0; |
253 | } |
254 | |
255 | return 0; |
256 | } |
257 | |