1/* $NetBSD: nouveau_subdev_mc_nv04.c,v 1.1.1.1 2014/08/06 12:36:31 riastradh Exp $ */
2
3/*
4 * Copyright 2012 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Ben Skeggs
25 */
26
27#include <sys/cdefs.h>
28__KERNEL_RCSID(0, "$NetBSD: nouveau_subdev_mc_nv04.c,v 1.1.1.1 2014/08/06 12:36:31 riastradh Exp $");
29
30#include "nv04.h"
31
32const struct nouveau_mc_intr
33nv04_mc_intr[] = {
34 { 0x00000001, NVDEV_ENGINE_MPEG }, /* NV17- MPEG/ME */
35 { 0x00000100, NVDEV_ENGINE_FIFO },
36 { 0x00001000, NVDEV_ENGINE_GR },
37 { 0x00010000, NVDEV_ENGINE_DISP },
38 { 0x00020000, NVDEV_ENGINE_VP }, /* NV40- */
39 { 0x00100000, NVDEV_SUBDEV_TIMER },
40 { 0x01000000, NVDEV_ENGINE_DISP }, /* NV04- PCRTC0 */
41 { 0x02000000, NVDEV_ENGINE_DISP }, /* NV11- PCRTC1 */
42 { 0x10000000, NVDEV_SUBDEV_BUS },
43 { 0x80000000, NVDEV_ENGINE_SW },
44 {}
45};
46
47int
48nv04_mc_init(struct nouveau_object *object)
49{
50 struct nv04_mc_priv *priv = (void *)object;
51
52 nv_wr32(priv, 0x000200, 0xffffffff); /* everything enabled */
53 nv_wr32(priv, 0x001850, 0x00000001); /* disable rom access */
54
55 return nouveau_mc_init(&priv->base);
56}
57
58int
59nv04_mc_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
60 struct nouveau_oclass *oclass, void *data, u32 size,
61 struct nouveau_object **pobject)
62{
63 struct nv04_mc_priv *priv;
64 int ret;
65
66 ret = nouveau_mc_create(parent, engine, oclass, &priv);
67 *pobject = nv_object(priv);
68 if (ret)
69 return ret;
70
71 return 0;
72}
73
74struct nouveau_oclass *
75nv04_mc_oclass = &(struct nouveau_mc_oclass) {
76 .base.handle = NV_SUBDEV(MC, 0x04),
77 .base.ofuncs = &(struct nouveau_ofuncs) {
78 .ctor = nv04_mc_ctor,
79 .dtor = _nouveau_mc_dtor,
80 .init = nv04_mc_init,
81 .fini = _nouveau_mc_fini,
82 },
83 .intr = nv04_mc_intr,
84}.base;
85