1 | /* $NetBSD: i2cvar.h,v 1.9 2015/12/13 17:14:56 jmcneill Exp $ */ |
2 | |
3 | /* |
4 | * Copyright (c) 2003 Wasabi Systems, Inc. |
5 | * All rights reserved. |
6 | * |
7 | * Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc. |
8 | * |
9 | * Redistribution and use in source and binary forms, with or without |
10 | * modification, are permitted provided that the following conditions |
11 | * are met: |
12 | * 1. Redistributions of source code must retain the above copyright |
13 | * notice, this list of conditions and the following disclaimer. |
14 | * 2. Redistributions in binary form must reproduce the above copyright |
15 | * notice, this list of conditions and the following disclaimer in the |
16 | * documentation and/or other materials provided with the distribution. |
17 | * 3. All advertising materials mentioning features or use of this software |
18 | * must display the following acknowledgement: |
19 | * This product includes software developed for the NetBSD Project by |
20 | * Wasabi Systems, Inc. |
21 | * 4. The name of Wasabi Systems, Inc. may not be used to endorse |
22 | * or promote products derived from this software without specific prior |
23 | * written permission. |
24 | * |
25 | * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND |
26 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
27 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
28 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC |
29 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
30 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
31 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
32 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
33 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
34 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
35 | * POSSIBILITY OF SUCH DAMAGE. |
36 | */ |
37 | |
38 | #ifndef _DEV_I2C_I2CVAR_H_ |
39 | #define _DEV_I2C_I2CVAR_H_ |
40 | |
41 | #include <dev/i2c/i2c_io.h> |
42 | #include <prop/proplib.h> |
43 | |
44 | /* Flags passed to i2c routines. */ |
45 | #define I2C_F_WRITE 0x00 /* new transfer is a write */ |
46 | #define I2C_F_READ 0x01 /* new transfer is a read */ |
47 | #define I2C_F_LAST 0x02 /* last byte of read */ |
48 | #define I2C_F_STOP 0x04 /* send stop after byte */ |
49 | #define I2C_F_POLL 0x08 /* poll, don't sleep */ |
50 | #define I2C_F_PEC 0x10 /* smbus packet error checking */ |
51 | |
52 | struct ic_intr_list { |
53 | LIST_ENTRY(ic_intr_list) il_next; |
54 | int (*il_intr)(void *); |
55 | void *il_intrarg; |
56 | }; |
57 | |
58 | /* |
59 | * This structure provides the interface between the i2c framework |
60 | * and the underlying i2c controller. |
61 | * |
62 | * Note that this structure is designed specifically to allow us |
63 | * to either use the autoconfiguration framework or not. This |
64 | * allows a driver for a board with a private i2c bus use generic |
65 | * i2c client drivers for chips that might be on that board. |
66 | */ |
67 | typedef struct i2c_controller { |
68 | void *ic_cookie; /* controller private */ |
69 | |
70 | /* |
71 | * These provide synchronization in the presence of |
72 | * multiple users of the i2c bus. When a device |
73 | * driver wishes to perform transfers on the i2c |
74 | * bus, the driver should acquire the bus. When |
75 | * the driver is finished, it should release the |
76 | * bus. |
77 | * |
78 | * This is provided by the back-end since a single |
79 | * controller may present e.g. i2c and smbus views |
80 | * of the same set of i2c wires. |
81 | */ |
82 | int (*ic_acquire_bus)(void *, int); |
83 | void (*ic_release_bus)(void *, int); |
84 | |
85 | /* |
86 | * The preferred API for clients of the i2c interface |
87 | * is the scripted API. This handles i2c controllers |
88 | * that do not provide raw access to the i2c signals. |
89 | */ |
90 | int (*ic_exec)(void *, i2c_op_t, i2c_addr_t, const void *, size_t, |
91 | void *, size_t, int); |
92 | |
93 | int (*ic_send_start)(void *, int); |
94 | int (*ic_send_stop)(void *, int); |
95 | int (*ic_initiate_xfer)(void *, i2c_addr_t, int); |
96 | int (*ic_read_byte)(void *, uint8_t *, int); |
97 | int (*ic_write_byte)(void *, uint8_t, int); |
98 | |
99 | LIST_HEAD(, ic_intr_list) ic_list; |
100 | LIST_HEAD(, ic_intr_list) ic_proc_list; |
101 | volatile int ic_running; |
102 | volatile int ic_pending; |
103 | struct lwp *ic_intr_thread; |
104 | const char *ic_devname; |
105 | } *i2c_tag_t; |
106 | |
107 | /* I2C bus types */ |
108 | #define I2C_TYPE_SMBUS 1 |
109 | |
110 | /* Used to attach the i2c framework to the controller. */ |
111 | struct i2cbus_attach_args { |
112 | i2c_tag_t iba_tag; /* the controller */ |
113 | int iba_type; /* bus type */ |
114 | prop_array_t iba_child_devices; /* child devices (direct config) */ |
115 | }; |
116 | |
117 | /* Used to attach devices on the i2c bus. */ |
118 | struct i2c_attach_args { |
119 | i2c_tag_t ia_tag; /* our controller */ |
120 | i2c_addr_t ia_addr; /* address of device */ |
121 | int ia_size; /* size (for EEPROMs) */ |
122 | int ia_type; /* bus type */ |
123 | /* only set if using direct config */ |
124 | const char * ia_name; /* name of the device */ |
125 | int ia_ncompat; /* number of pointers in the |
126 | ia_compat array */ |
127 | const char ** ia_compat; /* chip names */ |
128 | /* |
129 | * The following is of limited usefulness and should only be used |
130 | * in rare cases where we really know what we are doing. Example: |
131 | * a machine dependent i2c driver (located in sys/arch/$arch/dev) |
132 | * needing to access some firmware properties. |
133 | * Depending on the firmware in use, an identifier for the device |
134 | * may be present. Example: on OpenFirmware machines the device |
135 | * tree OF node - if available. This info is hard to transport |
136 | * down to MD drivers through the MI i2c bus otherwise. |
137 | */ |
138 | uintptr_t ia_cookie; /* OF node in openfirmware machines */ |
139 | }; |
140 | |
141 | /* |
142 | * API presented to i2c controllers. |
143 | */ |
144 | int iicbus_print(void *, const char *); |
145 | int iic_compat_match(struct i2c_attach_args*, const char **); |
146 | |
147 | #ifdef _I2C_PRIVATE |
148 | /* |
149 | * Macros used internally by the i2c framework. |
150 | */ |
151 | #define iic_send_start(ic, flags) \ |
152 | (*(ic)->ic_send_start)((ic)->ic_cookie, (flags)) |
153 | #define iic_send_stop(ic, flags) \ |
154 | (*(ic)->ic_send_stop)((ic)->ic_cookie, (flags)) |
155 | #define iic_initiate_xfer(ic, addr, flags) \ |
156 | (*(ic)->ic_initiate_xfer)((ic)->ic_cookie, (addr), (flags)) |
157 | |
158 | #define iic_read_byte(ic, bytep, flags) \ |
159 | (*(ic)->ic_read_byte)((ic)->ic_cookie, (bytep), (flags)) |
160 | #define iic_write_byte(ic, byte, flags) \ |
161 | (*(ic)->ic_write_byte)((ic)->ic_cookie, (byte), (flags)) |
162 | #endif /* _I2C_PRIVATE */ |
163 | |
164 | /* |
165 | * Simplified API for clients of the i2c framework. Definitions |
166 | * in <dev/i2c/i2c_io.h>. |
167 | */ |
168 | #define iic_acquire_bus(ic, flags) \ |
169 | (*(ic)->ic_acquire_bus)((ic)->ic_cookie, (flags)) |
170 | #define iic_release_bus(ic, flags) \ |
171 | (*(ic)->ic_release_bus)((ic)->ic_cookie, (flags)) |
172 | |
173 | int iic_exec(i2c_tag_t, i2c_op_t, i2c_addr_t, const void *, |
174 | size_t, void *, size_t, int); |
175 | |
176 | int iic_smbus_write_byte(i2c_tag_t, i2c_addr_t, uint8_t, uint8_t, int); |
177 | int iic_smbus_write_word(i2c_tag_t, i2c_addr_t, uint8_t, uint16_t, int); |
178 | int iic_smbus_read_byte(i2c_tag_t, i2c_addr_t, uint8_t, uint8_t *, int); |
179 | int iic_smbus_read_word(i2c_tag_t, i2c_addr_t, uint8_t, uint16_t *, int); |
180 | int iic_smbus_receive_byte(i2c_tag_t, i2c_addr_t, uint8_t *, int); |
181 | int iic_smbus_send_byte(i2c_tag_t, i2c_addr_t, uint8_t, int); |
182 | int iic_smbus_quick_read(i2c_tag_t, i2c_addr_t, int); |
183 | int iic_smbus_quick_write(i2c_tag_t, i2c_addr_t, int); |
184 | int iic_smbus_block_read(i2c_tag_t, i2c_addr_t, uint8_t, uint8_t *, |
185 | size_t, int); |
186 | int iic_smbus_block_write(i2c_tag_t, i2c_addr_t, uint8_t, uint8_t *, |
187 | size_t, int); |
188 | |
189 | void * iic_smbus_intr_establish(i2c_tag_t, int (*)(void *), void *); |
190 | void * iic_smbus_intr_establish_proc(i2c_tag_t, int (*)(void *), void *); |
191 | void iic_smbus_intr_disestablish(i2c_tag_t, void *); |
192 | void iic_smbus_intr_disestablish_proc(i2c_tag_t, void *); |
193 | int iic_smbus_intr(i2c_tag_t); |
194 | |
195 | #endif /* _DEV_I2C_I2CVAR_H_ */ |
196 | |