1 | /* $NetBSD: cz.c,v 1.62 2016/07/07 06:55:41 msaitoh Exp $ */ |
2 | |
3 | /*- |
4 | * Copyright (c) 2000 Zembu Labs, Inc. |
5 | * All rights reserved. |
6 | * |
7 | * Authors: Jason R. Thorpe <thorpej@zembu.com> |
8 | * Bill Studenmund <wrstuden@zembu.com> |
9 | * |
10 | * Redistribution and use in source and binary forms, with or without |
11 | * modification, are permitted provided that the following conditions |
12 | * are met: |
13 | * 1. Redistributions of source code must retain the above copyright |
14 | * notice, this list of conditions and the following disclaimer. |
15 | * 2. Redistributions in binary form must reproduce the above copyright |
16 | * notice, this list of conditions and the following disclaimer in the |
17 | * documentation and/or other materials provided with the distribution. |
18 | * 3. All advertising materials mentioning features or use of this software |
19 | * must display the following acknowledgement: |
20 | * This product includes software developed by Zembu Labs, Inc. |
21 | * 4. Neither the name of Zembu Labs nor the names of its employees may |
22 | * be used to endorse or promote products derived from this software |
23 | * without specific prior written permission. |
24 | * |
25 | * THIS SOFTWARE IS PROVIDED BY ZEMBU LABS, INC. ``AS IS'' AND ANY EXPRESS |
26 | * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WAR- |
27 | * RANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DIS- |
28 | * CLAIMED. IN NO EVENT SHALL ZEMBU LABS BE LIABLE FOR ANY DIRECT, INDIRECT, |
29 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
30 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
31 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
32 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
33 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
34 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
35 | */ |
36 | |
37 | /* |
38 | * Cyclades-Z series multi-port serial adapter driver for NetBSD. |
39 | * |
40 | * Some notes: |
41 | * |
42 | * - The Cyclades-Z has fully automatic hardware (and software!) |
43 | * flow control. We only use RTS/CTS flow control here, |
44 | * and it is implemented in a very simplistic manner. This |
45 | * may be an area of future work. |
46 | * |
47 | * - The PLX can map the either the board's RAM or host RAM |
48 | * into the MIPS's memory window. This would enable us to |
49 | * use less expensive (for us) memory reads/writes to host |
50 | * RAM, rather than time-consuming reads/writes to PCI |
51 | * memory space. However, the PLX can only map a 0-128M |
52 | * window, so we would have to ensure that the DMA address |
53 | * of the host RAM fits there. This is kind of a pain, |
54 | * so we just don't bother right now. |
55 | * |
56 | * - In a perfect world, we would use the autoconfiguration |
57 | * mechanism to attach the TTYs that we find. However, |
58 | * that leads to somewhat icky looking autoconfiguration |
59 | * messages (one for every TTY, up to 64 per board!). So |
60 | * we don't do it that way, but assign minors as if there |
61 | * were the max of 64 ports per board. |
62 | * |
63 | * - We don't bother with PPS support here. There are so many |
64 | * ports, each with a large amount of buffer space, that the |
65 | * normal mode of operation is to poll the boards regularly |
66 | * (generally, every 20ms or so). This makes this driver |
67 | * unsuitable for PPS, as the latency will be generally too |
68 | * high. |
69 | */ |
70 | /* |
71 | * This driver inspired by the FreeBSD driver written by Brian J. McGovern |
72 | * for FreeBSD 3.2. |
73 | */ |
74 | |
75 | #include <sys/cdefs.h> |
76 | __KERNEL_RCSID(0, "$NetBSD: cz.c,v 1.62 2016/07/07 06:55:41 msaitoh Exp $" ); |
77 | |
78 | #include <sys/param.h> |
79 | #include <sys/systm.h> |
80 | #include <sys/proc.h> |
81 | #include <sys/device.h> |
82 | #include <sys/malloc.h> |
83 | #include <sys/tty.h> |
84 | #include <sys/conf.h> |
85 | #include <sys/time.h> |
86 | #include <sys/kernel.h> |
87 | #include <sys/fcntl.h> |
88 | #include <sys/syslog.h> |
89 | #include <sys/kauth.h> |
90 | |
91 | #include <sys/callout.h> |
92 | |
93 | #include <dev/pci/pcireg.h> |
94 | #include <dev/pci/pcivar.h> |
95 | #include <dev/pci/pcidevs.h> |
96 | #include <dev/pci/czreg.h> |
97 | |
98 | #include <dev/pci/plx9060reg.h> |
99 | #include <dev/pci/plx9060var.h> |
100 | |
101 | #include <dev/microcode/cyclades-z/cyzfirm.h> |
102 | |
103 | #define CZ_DRIVER_VERSION 0x20000411 |
104 | |
105 | #define CZ_POLL_MS 20 |
106 | |
107 | /* These are the interrupts we always use. */ |
108 | #define CZ_INTERRUPTS \ |
109 | (C_IN_MDSR | C_IN_MRI | C_IN_MRTS | C_IN_MCTS | C_IN_TXBEMPTY | \ |
110 | C_IN_TXFEMPTY | C_IN_TXLOWWM | C_IN_RXHIWM | C_IN_RXNNDT | \ |
111 | C_IN_MDCD | C_IN_PR_ERROR | C_IN_FR_ERROR | C_IN_OVR_ERROR | \ |
112 | C_IN_RXOFL | C_IN_IOCTLW | C_IN_RXBRK) |
113 | |
114 | /* |
115 | * cztty_softc: |
116 | * |
117 | * Per-channel (TTY) state. |
118 | */ |
119 | struct cztty_softc { |
120 | struct cz_softc *sc_parent; |
121 | struct tty *sc_tty; |
122 | |
123 | callout_t sc_diag_ch; |
124 | |
125 | int sc_channel; /* Also used to flag unattached chan */ |
126 | #define CZTTY_CHANNEL_DEAD -1 |
127 | |
128 | bus_space_tag_t sc_chan_st; /* channel space tag */ |
129 | bus_space_handle_t sc_chan_sh; /* channel space handle */ |
130 | bus_space_handle_t sc_buf_sh; /* buffer space handle */ |
131 | |
132 | u_int sc_overflows, |
133 | sc_parity_errors, |
134 | sc_framing_errors, |
135 | sc_errors; |
136 | |
137 | int sc_swflags; |
138 | |
139 | u_int32_t sc_rs_control_dtr, |
140 | sc_chanctl_hw_flow, |
141 | sc_chanctl_comm_baud, |
142 | sc_chanctl_rs_control, |
143 | sc_chanctl_comm_data_l, |
144 | sc_chanctl_comm_parity; |
145 | }; |
146 | |
147 | /* |
148 | * cz_softc: |
149 | * |
150 | * Per-board state. |
151 | */ |
152 | struct cz_softc { |
153 | device_t cz_dev; /* generic device info */ |
154 | struct plx9060_config cz_plx; /* PLX 9060 config info */ |
155 | bus_space_tag_t cz_win_st; /* window space tag */ |
156 | bus_space_handle_t cz_win_sh; /* window space handle */ |
157 | callout_t cz_callout; /* callout for polling-mode */ |
158 | |
159 | void *cz_ih; /* interrupt handle */ |
160 | |
161 | u_int32_t cz_mailbox0; /* our MAILBOX0 value */ |
162 | int cz_nchannels; /* number of channels */ |
163 | int cz_nopenchan; /* number of open channels */ |
164 | struct cztty_softc *cz_ports; /* our array of ports */ |
165 | |
166 | bus_addr_t cz_fwctl; /* offset of firmware control */ |
167 | }; |
168 | |
169 | static int cz_wait_pci_doorbell(struct cz_softc *, const char *); |
170 | |
171 | static int cz_load_firmware(struct cz_softc *); |
172 | |
173 | static int cz_intr(void *); |
174 | static void cz_poll(void *); |
175 | static int cztty_transmit(struct cztty_softc *, struct tty *); |
176 | static int cztty_receive(struct cztty_softc *, struct tty *); |
177 | |
178 | static struct cztty_softc *cztty_getttysoftc(dev_t dev); |
179 | static int cztty_attached_ttys; |
180 | static int cz_timeout_ticks; |
181 | |
182 | static void czttystart(struct tty *tp); |
183 | static int czttyparam(struct tty *tp, struct termios *t); |
184 | static void cztty_shutdown(struct cztty_softc *sc); |
185 | static void cztty_modem(struct cztty_softc *sc, int onoff); |
186 | static void cztty_break(struct cztty_softc *sc, int onoff); |
187 | static void tiocm_to_cztty(struct cztty_softc *sc, u_long how, int ttybits); |
188 | static int cztty_to_tiocm(struct cztty_softc *sc); |
189 | static void cztty_diag(void *arg); |
190 | |
191 | extern struct cfdriver cz_cd; |
192 | |
193 | /* |
194 | * Macros to read and write the PLX. |
195 | */ |
196 | #define CZ_PLX_READ(cz, reg) \ |
197 | bus_space_read_4((cz)->cz_plx.plx_st, (cz)->cz_plx.plx_sh, (reg)) |
198 | #define CZ_PLX_WRITE(cz, reg, val) \ |
199 | bus_space_write_4((cz)->cz_plx.plx_st, (cz)->cz_plx.plx_sh, \ |
200 | (reg), (val)) |
201 | |
202 | /* |
203 | * Macros to read and write the FPGA. We must already be in the FPGA |
204 | * window for this. |
205 | */ |
206 | #define CZ_FPGA_READ(cz, reg) \ |
207 | bus_space_read_4((cz)->cz_win_st, (cz)->cz_win_sh, (reg)) |
208 | #define CZ_FPGA_WRITE(cz, reg, val) \ |
209 | bus_space_write_4((cz)->cz_win_st, (cz)->cz_win_sh, (reg), (val)) |
210 | |
211 | /* |
212 | * Macros to read and write the firmware control structures in board RAM. |
213 | */ |
214 | #define CZ_FWCTL_READ(cz, off) \ |
215 | bus_space_read_4((cz)->cz_win_st, (cz)->cz_win_sh, \ |
216 | (cz)->cz_fwctl + (off)) |
217 | |
218 | #define CZ_FWCTL_WRITE(cz, off, val) \ |
219 | bus_space_write_4((cz)->cz_win_st, (cz)->cz_win_sh, \ |
220 | (cz)->cz_fwctl + (off), (val)) |
221 | |
222 | /* |
223 | * Convenience macros for cztty routines. PLX window MUST be to RAM. |
224 | */ |
225 | #define CZTTY_CHAN_READ(sc, off) \ |
226 | bus_space_read_4((sc)->sc_chan_st, (sc)->sc_chan_sh, (off)) |
227 | |
228 | #define CZTTY_CHAN_WRITE(sc, off, val) \ |
229 | bus_space_write_4((sc)->sc_chan_st, (sc)->sc_chan_sh, \ |
230 | (off), (val)) |
231 | |
232 | #define CZTTY_BUF_READ(sc, off) \ |
233 | bus_space_read_4((sc)->sc_chan_st, (sc)->sc_buf_sh, (off)) |
234 | |
235 | #define CZTTY_BUF_WRITE(sc, off, val) \ |
236 | bus_space_write_4((sc)->sc_chan_st, (sc)->sc_buf_sh, \ |
237 | (off), (val)) |
238 | |
239 | /* |
240 | * Convenience macros. |
241 | */ |
242 | #define CZ_WIN_RAM(cz) \ |
243 | do { \ |
244 | CZ_PLX_WRITE((cz), PLX_LAS0BA, LOCAL_ADDR0_RAM); \ |
245 | delay(100); \ |
246 | } while (0) |
247 | |
248 | #define CZ_WIN_FPGA(cz) \ |
249 | do { \ |
250 | CZ_PLX_WRITE((cz), PLX_LAS0BA, LOCAL_ADDR0_FPGA); \ |
251 | delay(100); \ |
252 | } while (0) |
253 | |
254 | /***************************************************************************** |
255 | * Cyclades-Z controller code starts here... |
256 | *****************************************************************************/ |
257 | |
258 | /* |
259 | * cz_match: |
260 | * |
261 | * Determine if the given PCI device is a Cyclades-Z board. |
262 | */ |
263 | static int |
264 | cz_match(device_t parent, cfdata_t match, void *aux) |
265 | { |
266 | struct pci_attach_args *pa = aux; |
267 | |
268 | if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CYCLADES) { |
269 | switch (PCI_PRODUCT(pa->pa_id)) { |
270 | case PCI_PRODUCT_CYCLADES_CYCLOMZ_2: |
271 | return (1); |
272 | } |
273 | } |
274 | |
275 | return (0); |
276 | } |
277 | |
278 | /* |
279 | * cz_attach: |
280 | * |
281 | * A Cyclades-Z board was found; attach it. |
282 | */ |
283 | static void |
284 | cz_attach(device_t parent, device_t self, void *aux) |
285 | { |
286 | extern const struct cdevsw cz_cdevsw; /* XXX */ |
287 | struct cz_softc *cz = device_private(self); |
288 | struct pci_attach_args *pa = aux; |
289 | pci_intr_handle_t ih; |
290 | const char *intrstr = NULL; |
291 | struct cztty_softc *sc; |
292 | struct tty *tp; |
293 | int i; |
294 | char intrbuf[PCI_INTRSTR_LEN]; |
295 | |
296 | aprint_naive(": Multi-port serial controller\n" ); |
297 | aprint_normal(": Cyclades-Z multiport serial\n" ); |
298 | |
299 | cz->cz_dev = self; |
300 | cz->cz_plx.plx_pc = pa->pa_pc; |
301 | cz->cz_plx.plx_tag = pa->pa_tag; |
302 | |
303 | if (pci_mapreg_map(pa, PLX_PCI_RUNTIME_MEMADDR, |
304 | PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, |
305 | &cz->cz_plx.plx_st, &cz->cz_plx.plx_sh, NULL, NULL) != 0) { |
306 | aprint_error_dev(cz->cz_dev, "unable to map PLX registers\n" ); |
307 | return; |
308 | } |
309 | if (pci_mapreg_map(pa, PLX_PCI_LOCAL_ADDR0, |
310 | PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, |
311 | &cz->cz_win_st, &cz->cz_win_sh, NULL, NULL) != 0) { |
312 | aprint_error_dev(cz->cz_dev, "unable to map device window\n" ); |
313 | return; |
314 | } |
315 | |
316 | cz->cz_mailbox0 = CZ_PLX_READ(cz, PLX_MAILBOX0); |
317 | cz->cz_nopenchan = 0; |
318 | |
319 | /* |
320 | * Make sure that the board is completely stopped. |
321 | */ |
322 | CZ_WIN_FPGA(cz); |
323 | CZ_FPGA_WRITE(cz, FPGA_CPU_STOP, 0); |
324 | |
325 | /* |
326 | * Load the board's firmware. |
327 | */ |
328 | if (cz_load_firmware(cz) != 0) |
329 | return; |
330 | |
331 | /* |
332 | * Now that we're ready to roll, map and establish the interrupt |
333 | * handler. |
334 | */ |
335 | if (pci_intr_map(pa, &ih) != 0) { |
336 | /* |
337 | * The common case is for Cyclades-Z boards to run |
338 | * in polling mode, and thus not have an interrupt |
339 | * mapped for them. Don't bother reporting that |
340 | * the interrupt is not mappable, since this isn't |
341 | * really an error. |
342 | */ |
343 | cz->cz_ih = NULL; |
344 | goto polling_mode; |
345 | } else { |
346 | intrstr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf)); |
347 | cz->cz_ih = pci_intr_establish(pa->pa_pc, ih, IPL_TTY, |
348 | cz_intr, cz); |
349 | } |
350 | if (cz->cz_ih == NULL) { |
351 | aprint_error_dev(cz->cz_dev, "unable to establish interrupt" ); |
352 | if (intrstr != NULL) |
353 | aprint_error(" at %s" , intrstr); |
354 | aprint_error("\n" ); |
355 | /* We will fall-back on polling mode. */ |
356 | } else |
357 | aprint_normal_dev(cz->cz_dev, "interrupting at %s\n" , intrstr); |
358 | |
359 | polling_mode: |
360 | if (cz->cz_ih == NULL) { |
361 | callout_init(&cz->cz_callout, 0); |
362 | if (cz_timeout_ticks == 0) |
363 | cz_timeout_ticks = max(1, hz * CZ_POLL_MS / 1000); |
364 | aprint_normal_dev(cz->cz_dev, |
365 | "polling mode, %d ms interval (%d tick%s)\n" , CZ_POLL_MS, |
366 | cz_timeout_ticks, cz_timeout_ticks == 1 ? "" : "s" ); |
367 | } |
368 | |
369 | /* |
370 | * Allocate sufficient pointers for the children and |
371 | * attach them. Set all ports to a reasonable initial |
372 | * configuration while we're at it: |
373 | * |
374 | * disabled |
375 | * 8N1 |
376 | * default baud rate |
377 | * hardware flow control. |
378 | */ |
379 | CZ_WIN_RAM(cz); |
380 | |
381 | if (cz->cz_nchannels == 0) { |
382 | /* No channels? No more work to do! */ |
383 | return; |
384 | } |
385 | |
386 | cz->cz_ports = malloc(sizeof(struct cztty_softc) * cz->cz_nchannels, |
387 | M_DEVBUF, M_WAITOK|M_ZERO); |
388 | cztty_attached_ttys += cz->cz_nchannels; |
389 | |
390 | for (i = 0; i < cz->cz_nchannels; i++) { |
391 | sc = &cz->cz_ports[i]; |
392 | |
393 | sc->sc_channel = i; |
394 | sc->sc_chan_st = cz->cz_win_st; |
395 | sc->sc_parent = cz; |
396 | |
397 | if (bus_space_subregion(cz->cz_win_st, cz->cz_win_sh, |
398 | cz->cz_fwctl + ZFIRM_CHNCTL_OFF(i, 0), |
399 | ZFIRM_CHNCTL_SIZE, &sc->sc_chan_sh)) { |
400 | aprint_error_dev(cz->cz_dev, |
401 | "unable to subregion channel %d control\n" , i); |
402 | sc->sc_channel = CZTTY_CHANNEL_DEAD; |
403 | continue; |
404 | } |
405 | if (bus_space_subregion(cz->cz_win_st, cz->cz_win_sh, |
406 | cz->cz_fwctl + ZFIRM_BUFCTL_OFF(i, 0), |
407 | ZFIRM_BUFCTL_SIZE, &sc->sc_buf_sh)) { |
408 | aprint_error_dev(cz->cz_dev, |
409 | "unable to subregion channel %d buffer\n" , i); |
410 | sc->sc_channel = CZTTY_CHANNEL_DEAD; |
411 | continue; |
412 | } |
413 | |
414 | callout_init(&sc->sc_diag_ch, 0); |
415 | |
416 | tp = tty_alloc(); |
417 | tp->t_dev = makedev(cdevsw_lookup_major(&cz_cdevsw), |
418 | (device_unit(cz->cz_dev) * ZFIRM_MAX_CHANNELS) + i); |
419 | tp->t_oproc = czttystart; |
420 | tp->t_param = czttyparam; |
421 | tty_attach(tp); |
422 | |
423 | sc->sc_tty = tp; |
424 | |
425 | CZTTY_CHAN_WRITE(sc, CHNCTL_OP_MODE, C_CH_DISABLE); |
426 | CZTTY_CHAN_WRITE(sc, CHNCTL_INTR_ENABLE, CZ_INTERRUPTS); |
427 | CZTTY_CHAN_WRITE(sc, CHNCTL_SW_FLOW, 0); |
428 | CZTTY_CHAN_WRITE(sc, CHNCTL_FLOW_XON, 0x11); |
429 | CZTTY_CHAN_WRITE(sc, CHNCTL_FLOW_XOFF, 0x13); |
430 | CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_BAUD, TTYDEF_SPEED); |
431 | CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_PARITY, C_PR_NONE); |
432 | CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_DATA_L, C_DL_CS8 | C_DL_1STOP); |
433 | CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_FLAGS, 0); |
434 | CZTTY_CHAN_WRITE(sc, CHNCTL_HW_FLOW, C_RS_CTS | C_RS_RTS); |
435 | CZTTY_CHAN_WRITE(sc, CHNCTL_RS_CONTROL, 0); |
436 | } |
437 | } |
438 | |
439 | CFATTACH_DECL_NEW(cz, sizeof(struct cz_softc), |
440 | cz_match, cz_attach, NULL, NULL); |
441 | |
442 | #if 0 |
443 | /* |
444 | * cz_reset_board: |
445 | * |
446 | * Reset the board via the PLX. |
447 | */ |
448 | static void |
449 | cz_reset_board(struct cz_softc *cz) |
450 | { |
451 | u_int32_t reg; |
452 | |
453 | reg = CZ_PLX_READ(cz, PLX_CONTROL); |
454 | CZ_PLX_WRITE(cz, PLX_CONTROL, reg | CONTROL_SWR); |
455 | delay(1000); |
456 | |
457 | CZ_PLX_WRITE(cz, PLX_CONTROL, reg); |
458 | delay(1000); |
459 | |
460 | /* Now reload the PLX from its EEPROM. */ |
461 | reg = CZ_PLX_READ(cz, PLX_CONTROL); |
462 | CZ_PLX_WRITE(cz, PLX_CONTROL, reg | CONTROL_RELOADCFG); |
463 | delay(1000); |
464 | CZ_PLX_WRITE(cz, PLX_CONTROL, reg); |
465 | } |
466 | #endif |
467 | |
468 | /* |
469 | * cz_load_firmware: |
470 | * |
471 | * Load the ZFIRM firmware into the board's RAM and start it |
472 | * running. |
473 | */ |
474 | static int |
475 | cz_load_firmware(struct cz_softc *cz) |
476 | { |
477 | const struct zfirm_header *zfh; |
478 | const struct zfirm_config *zfc; |
479 | const struct zfirm_block *zfb, *zblocks; |
480 | const u_int8_t *cp; |
481 | const char *board; |
482 | u_int32_t fid; |
483 | int i, j, nconfigs, nblocks, nbytes; |
484 | |
485 | zfh = (const struct zfirm_header *) cycladesz_firmware; |
486 | |
487 | /* Find the config header. */ |
488 | if (le32toh(zfh->zfh_configoff) & (sizeof(u_int32_t) - 1)) { |
489 | aprint_error_dev(cz->cz_dev, "bad ZFIRM config offset: 0x%x\n" , |
490 | le32toh(zfh->zfh_configoff)); |
491 | return (EIO); |
492 | } |
493 | zfc = (const struct zfirm_config *)(cycladesz_firmware + |
494 | le32toh(zfh->zfh_configoff)); |
495 | nconfigs = le32toh(zfh->zfh_nconfig); |
496 | |
497 | /* Locate the correct configuration for our board. */ |
498 | for (i = 0; i < nconfigs; i++, zfc++) { |
499 | if (le32toh(zfc->zfc_mailbox) == cz->cz_mailbox0 && |
500 | le32toh(zfc->zfc_function) == ZFC_FUNCTION_NORMAL) |
501 | break; |
502 | } |
503 | if (i == nconfigs) { |
504 | aprint_error_dev(cz->cz_dev, "unable to locate config header\n" ); |
505 | return (EIO); |
506 | } |
507 | |
508 | nblocks = le32toh(zfc->zfc_nblocks); |
509 | zblocks = (const struct zfirm_block *)(cycladesz_firmware + |
510 | le32toh(zfh->zfh_blockoff)); |
511 | |
512 | /* |
513 | * 8Zo ver. 1 doesn't have an FPGA. Load it on all others if |
514 | * necessary. |
515 | */ |
516 | if (cz->cz_mailbox0 != MAILBOX0_8Zo_V1 |
517 | #if 0 |
518 | && ((CZ_PLX_READ(cz, PLX_CONTROL) & CONTROL_FPGA_LOADED) == 0) |
519 | #endif |
520 | ) { |
521 | #ifdef CZ_DEBUG |
522 | aprint_debug_dev(cz->cz_dev, "Loading FPGA..." ); |
523 | #endif |
524 | CZ_WIN_FPGA(cz); |
525 | for (i = 0; i < nblocks; i++) { |
526 | /* zfb = zblocks + le32toh(zfc->zfc_blocklist[i]) ?? */ |
527 | zfb = &zblocks[le32toh(zfc->zfc_blocklist[i])]; |
528 | if (le32toh(zfb->zfb_type) == ZFB_TYPE_FPGA) { |
529 | nbytes = le32toh(zfb->zfb_size); |
530 | cp = &cycladesz_firmware[ |
531 | le32toh(zfb->zfb_fileoff)]; |
532 | for (j = 0; j < nbytes; j++, cp++) { |
533 | bus_space_write_1(cz->cz_win_st, |
534 | cz->cz_win_sh, 0, *cp); |
535 | /* FPGA needs 30-100us to settle. */ |
536 | delay(10); |
537 | } |
538 | } |
539 | } |
540 | #ifdef CZ_DEBUG |
541 | aprint_debug("done\n" ); |
542 | #endif |
543 | } |
544 | |
545 | /* Now load the firmware. */ |
546 | CZ_WIN_RAM(cz); |
547 | |
548 | for (i = 0; i < nblocks; i++) { |
549 | /* zfb = zblocks + le32toh(zfc->zfc_blocklist[i]) ?? */ |
550 | zfb = &zblocks[le32toh(zfc->zfc_blocklist[i])]; |
551 | if (le32toh(zfb->zfb_type) == ZFB_TYPE_FIRMWARE) { |
552 | const u_int32_t *lp; |
553 | u_int32_t ro = le32toh(zfb->zfb_ramoff); |
554 | nbytes = le32toh(zfb->zfb_size); |
555 | lp = (const u_int32_t *) |
556 | &cycladesz_firmware[le32toh(zfb->zfb_fileoff)]; |
557 | for (j = 0; j < nbytes; j += 4, lp++) { |
558 | bus_space_write_4(cz->cz_win_st, cz->cz_win_sh, |
559 | ro + j, le32toh(*lp)); |
560 | delay(10); |
561 | } |
562 | } |
563 | } |
564 | |
565 | /* Now restart the MIPS. */ |
566 | CZ_WIN_FPGA(cz); |
567 | CZ_FPGA_WRITE(cz, FPGA_CPU_START, 0); |
568 | |
569 | /* Wait for the MIPS to start, then report the results. */ |
570 | CZ_WIN_RAM(cz); |
571 | |
572 | #ifdef CZ_DEBUG |
573 | aprint_debug_dev(cz->cz_dev, "waiting for MIPS to start" ); |
574 | #endif |
575 | for (i = 0; i < 100; i++) { |
576 | fid = bus_space_read_4(cz->cz_win_st, cz->cz_win_sh, |
577 | ZFIRM_SIG_OFF); |
578 | if (fid == ZFIRM_SIG) { |
579 | /* MIPS has booted. */ |
580 | break; |
581 | } else if (fid == ZFIRM_HLT) { |
582 | /* |
583 | * The MIPS has halted, usually due to a power |
584 | * shortage on the expansion module. |
585 | */ |
586 | aprint_error_dev(cz->cz_dev, "MIPS halted; possible power supply " |
587 | "problem\n" ); |
588 | return (EIO); |
589 | } else { |
590 | #ifdef CZ_DEBUG |
591 | if ((i % 8) == 0) |
592 | aprint_debug("." ); |
593 | #endif |
594 | delay(250000); |
595 | } |
596 | } |
597 | #ifdef CZ_DEBUG |
598 | aprint_debug("\n" ); |
599 | #endif |
600 | if (i == 100) { |
601 | CZ_WIN_FPGA(cz); |
602 | aprint_error_dev(cz->cz_dev, |
603 | "MIPS failed to start; wanted 0x%08x got 0x%08x\n" , |
604 | ZFIRM_SIG, fid); |
605 | aprint_error_dev(cz->cz_dev, "FPGA ID 0x%08x, FPGA version 0x%08x\n" , |
606 | CZ_FPGA_READ(cz, FPGA_ID), |
607 | CZ_FPGA_READ(cz, FPGA_VERSION)); |
608 | return (EIO); |
609 | } |
610 | |
611 | /* |
612 | * Locate the firmware control structures. |
613 | */ |
614 | cz->cz_fwctl = bus_space_read_4(cz->cz_win_st, cz->cz_win_sh, |
615 | ZFIRM_CTRLADDR_OFF); |
616 | #ifdef CZ_DEBUG |
617 | aprint_debug_dev(cz->cz_dev, "FWCTL structure at offset " |
618 | "%#08" PRIxPADDR "\n" , cz->cz_fwctl); |
619 | #endif |
620 | |
621 | CZ_FWCTL_WRITE(cz, BRDCTL_C_OS, C_OS_BSD); |
622 | CZ_FWCTL_WRITE(cz, BRDCTL_DRVERSION, CZ_DRIVER_VERSION); |
623 | |
624 | cz->cz_nchannels = CZ_FWCTL_READ(cz, BRDCTL_NCHANNEL); |
625 | |
626 | switch (cz->cz_mailbox0) { |
627 | case MAILBOX0_8Zo_V1: |
628 | board = "Cyclades-8Zo ver. 1" ; |
629 | break; |
630 | |
631 | case MAILBOX0_8Zo_V2: |
632 | board = "Cyclades-8Zo ver. 2" ; |
633 | break; |
634 | |
635 | case MAILBOX0_Ze_V1: |
636 | board = "Cyclades-Ze" ; |
637 | break; |
638 | |
639 | default: |
640 | board = "unknown Cyclades Z-series" ; |
641 | break; |
642 | } |
643 | |
644 | fid = CZ_FWCTL_READ(cz, BRDCTL_FWVERSION); |
645 | aprint_normal_dev(cz->cz_dev, "%s, " , board); |
646 | if (cz->cz_nchannels == 0) |
647 | aprint_normal("no channels attached, " ); |
648 | else |
649 | aprint_normal("%d channels (ttyCZ%04d..ttyCZ%04d), " , |
650 | cz->cz_nchannels, cztty_attached_ttys, |
651 | cztty_attached_ttys + (cz->cz_nchannels - 1)); |
652 | aprint_normal("firmware %x.%x.%x\n" , |
653 | (fid >> 8) & 0xf, (fid >> 4) & 0xf, fid & 0xf); |
654 | |
655 | return (0); |
656 | } |
657 | |
658 | /* |
659 | * cz_poll: |
660 | * |
661 | * This card doesn't do interrupts, so scan it for activity every CZ_POLL_MS |
662 | * ms. |
663 | */ |
664 | static void |
665 | cz_poll(void *arg) |
666 | { |
667 | int s = spltty(); |
668 | struct cz_softc *cz = arg; |
669 | |
670 | cz_intr(cz); |
671 | callout_reset(&cz->cz_callout, cz_timeout_ticks, cz_poll, cz); |
672 | |
673 | splx(s); |
674 | } |
675 | |
676 | /* |
677 | * cz_intr: |
678 | * |
679 | * Interrupt service routine. |
680 | * |
681 | * We either are receiving an interrupt directly from the board, or we are |
682 | * in polling mode and it's time to poll. |
683 | */ |
684 | static int |
685 | cz_intr(void *arg) |
686 | { |
687 | int rval = 0; |
688 | u_int command, channel; |
689 | struct cz_softc *cz = arg; |
690 | struct cztty_softc *sc; |
691 | struct tty *tp; |
692 | |
693 | while ((command = (CZ_PLX_READ(cz, PLX_LOCAL_PCI_DOORBELL) & 0xff))) { |
694 | rval = 1; |
695 | channel = CZ_FWCTL_READ(cz, BRDCTL_FWCMD_CHANNEL); |
696 | /* XXX - is this needed? */ |
697 | (void)CZ_FWCTL_READ(cz, BRDCTL_FWCMD_PARAM); |
698 | |
699 | /* now clear this interrupt, posslibly enabling another */ |
700 | CZ_PLX_WRITE(cz, PLX_LOCAL_PCI_DOORBELL, command); |
701 | |
702 | if (cz->cz_ports == NULL) { |
703 | #ifdef CZ_DEBUG |
704 | printf("%s: interrupt on channel %d, but no channels\n" , |
705 | device_xname(cz->cz_dev), channel); |
706 | #endif |
707 | continue; |
708 | } |
709 | |
710 | sc = &cz->cz_ports[channel]; |
711 | |
712 | if (sc->sc_channel == CZTTY_CHANNEL_DEAD) |
713 | break; |
714 | |
715 | tp = sc->sc_tty; |
716 | |
717 | switch (command) { |
718 | case C_CM_TXFEMPTY: /* transmit cases */ |
719 | case C_CM_TXBEMPTY: |
720 | case C_CM_TXLOWWM: |
721 | case C_CM_INTBACK: |
722 | if (!ISSET(tp->t_state, TS_ISOPEN)) { |
723 | #ifdef CZ_DEBUG |
724 | printf("%s: tx intr on closed channel %d\n" , |
725 | device_xname(cz->cz_dev), channel); |
726 | #endif |
727 | break; |
728 | } |
729 | |
730 | if (cztty_transmit(sc, tp)) { |
731 | /* |
732 | * Do wakeup stuff here. |
733 | */ |
734 | mutex_spin_enter(&tty_lock); /* XXX */ |
735 | ttwakeup(tp); |
736 | mutex_spin_exit(&tty_lock); /* XXX */ |
737 | wakeup(tp); |
738 | } |
739 | break; |
740 | |
741 | case C_CM_RXNNDT: /* receive cases */ |
742 | case C_CM_RXHIWM: |
743 | case C_CM_INTBACK2: /* from restart ?? */ |
744 | #if 0 |
745 | case C_CM_ICHAR: |
746 | #endif |
747 | if (!ISSET(tp->t_state, TS_ISOPEN)) { |
748 | CZTTY_BUF_WRITE(sc, BUFCTL_RX_GET, |
749 | CZTTY_BUF_READ(sc, BUFCTL_RX_PUT)); |
750 | break; |
751 | } |
752 | |
753 | if (cztty_receive(sc, tp)) { |
754 | /* |
755 | * Do wakeup stuff here. |
756 | */ |
757 | mutex_spin_enter(&tty_lock); /* XXX */ |
758 | ttwakeup(tp); |
759 | mutex_spin_exit(&tty_lock); /* XXX */ |
760 | wakeup(tp); |
761 | } |
762 | break; |
763 | |
764 | case C_CM_MDCD: |
765 | if (!ISSET(tp->t_state, TS_ISOPEN)) |
766 | break; |
767 | |
768 | (void) (*tp->t_linesw->l_modem)(tp, |
769 | ISSET(C_RS_DCD, CZTTY_CHAN_READ(sc, |
770 | CHNCTL_RS_STATUS))); |
771 | break; |
772 | |
773 | case C_CM_MDSR: |
774 | case C_CM_MRI: |
775 | case C_CM_MCTS: |
776 | case C_CM_MRTS: |
777 | break; |
778 | |
779 | case C_CM_IOCTLW: |
780 | break; |
781 | |
782 | case C_CM_PR_ERROR: |
783 | sc->sc_parity_errors++; |
784 | goto error_common; |
785 | |
786 | case C_CM_FR_ERROR: |
787 | sc->sc_framing_errors++; |
788 | goto error_common; |
789 | |
790 | case C_CM_OVR_ERROR: |
791 | sc->sc_overflows++; |
792 | error_common: |
793 | if (sc->sc_errors++ == 0) |
794 | callout_reset(&sc->sc_diag_ch, 60 * hz, |
795 | cztty_diag, sc); |
796 | break; |
797 | |
798 | case C_CM_RXBRK: |
799 | if (!ISSET(tp->t_state, TS_ISOPEN)) |
800 | break; |
801 | |
802 | /* |
803 | * A break is a \000 character with TTY_FE error |
804 | * flags set. So TTY_FE by itself works. |
805 | */ |
806 | (*tp->t_linesw->l_rint)(TTY_FE, tp); |
807 | mutex_spin_enter(&tty_lock); /* XXX */ |
808 | ttwakeup(tp); |
809 | mutex_spin_exit(&tty_lock); /* XXX */ |
810 | wakeup(tp); |
811 | break; |
812 | |
813 | default: |
814 | #ifdef CZ_DEBUG |
815 | printf("%s: channel %d: Unknown interrupt 0x%x\n" , |
816 | device_xname(cz->cz_dev), sc->sc_channel, command); |
817 | #endif |
818 | break; |
819 | } |
820 | } |
821 | |
822 | return (rval); |
823 | } |
824 | |
825 | /* |
826 | * cz_wait_pci_doorbell: |
827 | * |
828 | * Wait for the pci doorbell to be clear - wait for pending |
829 | * activity to drain. |
830 | */ |
831 | static int |
832 | cz_wait_pci_doorbell(struct cz_softc *cz, const char *wstring) |
833 | { |
834 | int error; |
835 | |
836 | while (CZ_PLX_READ(cz, PLX_PCI_LOCAL_DOORBELL)) { |
837 | error = tsleep(cz, TTIPRI | PCATCH, wstring, max(1, hz/100)); |
838 | if ((error != 0) && (error != EWOULDBLOCK)) |
839 | return (error); |
840 | } |
841 | return (0); |
842 | } |
843 | |
844 | /***************************************************************************** |
845 | * Cyclades-Z TTY code starts here... |
846 | *****************************************************************************/ |
847 | |
848 | #define CZTTY_DIALOUT(dev) TTDIALOUT(dev) |
849 | #define CZTTY_UNIT(dev) TTUNIT(dev) |
850 | #define CZTTY_CZ(sc) ((sc)->sc_parent) |
851 | |
852 | #define CZTTY_SOFTC(dev) cztty_getttysoftc(dev) |
853 | |
854 | static struct cztty_softc * |
855 | cztty_getttysoftc(dev_t dev) |
856 | { |
857 | int i, j, k = 0, u = CZTTY_UNIT(dev); |
858 | struct cz_softc *cz = NULL; |
859 | |
860 | for (i = 0, j = 0; i < cz_cd.cd_ndevs; i++) { |
861 | k = j; |
862 | cz = device_lookup_private(&cz_cd, i); |
863 | if (cz == NULL) |
864 | continue; |
865 | if (cz->cz_ports == NULL) |
866 | continue; |
867 | j += cz->cz_nchannels; |
868 | if (j > u) |
869 | break; |
870 | } |
871 | |
872 | if (i >= cz_cd.cd_ndevs) |
873 | return (NULL); |
874 | else |
875 | return (&cz->cz_ports[u - k]); |
876 | } |
877 | |
878 | /* |
879 | * czttytty: |
880 | * |
881 | * Return a pointer to our tty. |
882 | */ |
883 | static struct tty * |
884 | czttytty(dev_t dev) |
885 | { |
886 | struct cztty_softc *sc = CZTTY_SOFTC(dev); |
887 | |
888 | #ifdef DIAGNOSTIC |
889 | if (sc == NULL) |
890 | panic("czttytty" ); |
891 | #endif |
892 | |
893 | return (sc->sc_tty); |
894 | } |
895 | |
896 | /* |
897 | * cztty_shutdown: |
898 | * |
899 | * Shut down a port. |
900 | */ |
901 | static void |
902 | cztty_shutdown(struct cztty_softc *sc) |
903 | { |
904 | struct cz_softc *cz = CZTTY_CZ(sc); |
905 | struct tty *tp = sc->sc_tty; |
906 | int s; |
907 | |
908 | s = spltty(); |
909 | |
910 | /* Clear any break condition set with TIOCSBRK. */ |
911 | cztty_break(sc, 0); |
912 | |
913 | /* |
914 | * Hang up if necessary. Wait a bit, so the other side has time to |
915 | * notice even if we immediately open the port again. |
916 | */ |
917 | if (ISSET(tp->t_cflag, HUPCL)) { |
918 | cztty_modem(sc, 0); |
919 | (void) tsleep(tp, TTIPRI, ttclos, hz); |
920 | } |
921 | |
922 | /* Disable the channel. */ |
923 | cz_wait_pci_doorbell(cz, "czdis" ); |
924 | CZTTY_CHAN_WRITE(sc, CHNCTL_OP_MODE, C_CH_DISABLE); |
925 | CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel); |
926 | CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTL); |
927 | |
928 | if ((--cz->cz_nopenchan == 0) && (cz->cz_ih == NULL)) { |
929 | #ifdef CZ_DEBUG |
930 | printf("%s: Disabling polling\n" , device_xname(cz->cz_dev)); |
931 | #endif |
932 | callout_stop(&cz->cz_callout); |
933 | } |
934 | |
935 | splx(s); |
936 | } |
937 | |
938 | /* |
939 | * czttyopen: |
940 | * |
941 | * Open a Cyclades-Z serial port. |
942 | */ |
943 | static int |
944 | czttyopen(dev_t dev, int flags, int mode, struct lwp *l) |
945 | { |
946 | struct cztty_softc *sc = CZTTY_SOFTC(dev); |
947 | struct cz_softc *cz; |
948 | struct tty *tp; |
949 | int s, error; |
950 | |
951 | if (sc == NULL) |
952 | return (ENXIO); |
953 | |
954 | if (sc->sc_channel == CZTTY_CHANNEL_DEAD) |
955 | return (ENXIO); |
956 | |
957 | cz = CZTTY_CZ(sc); |
958 | tp = sc->sc_tty; |
959 | |
960 | if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) |
961 | return (EBUSY); |
962 | |
963 | s = spltty(); |
964 | |
965 | /* |
966 | * Do the following iff this is a first open. |
967 | */ |
968 | if (!ISSET(tp->t_state, TS_ISOPEN) && (tp->t_wopen == 0)) { |
969 | struct termios t; |
970 | |
971 | tp->t_dev = dev; |
972 | |
973 | /* If we're turning things on, enable interrupts */ |
974 | if ((cz->cz_nopenchan++ == 0) && (cz->cz_ih == NULL)) { |
975 | #ifdef CZ_DEBUG |
976 | printf("%s: Enabling polling.\n" , |
977 | device_xname(cz->cz_dev)); |
978 | #endif |
979 | callout_reset(&cz->cz_callout, cz_timeout_ticks, |
980 | cz_poll, cz); |
981 | } |
982 | |
983 | /* |
984 | * Enable the channel. Don't actually ring the |
985 | * doorbell here; czttyparam() will do it for us. |
986 | */ |
987 | cz_wait_pci_doorbell(cz, "czopen" ); |
988 | |
989 | CZTTY_CHAN_WRITE(sc, CHNCTL_OP_MODE, C_CH_ENABLE); |
990 | |
991 | /* |
992 | * Initialize the termios status to the defaults. Add in the |
993 | * sticky bits from TIOCSFLAGS. |
994 | */ |
995 | t.c_ispeed = 0; |
996 | t.c_ospeed = TTYDEF_SPEED; |
997 | t.c_cflag = TTYDEF_CFLAG; |
998 | if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) |
999 | SET(t.c_cflag, CLOCAL); |
1000 | if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) |
1001 | SET(t.c_cflag, CRTSCTS); |
1002 | |
1003 | /* |
1004 | * Reset the input and output rings. Do this before |
1005 | * we call czttyparam(), as that function enables |
1006 | * the channel. |
1007 | */ |
1008 | CZTTY_BUF_WRITE(sc, BUFCTL_RX_GET, |
1009 | CZTTY_BUF_READ(sc, BUFCTL_RX_PUT)); |
1010 | CZTTY_BUF_WRITE(sc, BUFCTL_TX_PUT, |
1011 | CZTTY_BUF_READ(sc, BUFCTL_TX_GET)); |
1012 | |
1013 | /* Make sure czttyparam() will see changes. */ |
1014 | tp->t_ospeed = 0; |
1015 | (void) czttyparam(tp, &t); |
1016 | tp->t_iflag = TTYDEF_IFLAG; |
1017 | tp->t_oflag = TTYDEF_OFLAG; |
1018 | tp->t_lflag = TTYDEF_LFLAG; |
1019 | ttychars(tp); |
1020 | ttsetwater(tp); |
1021 | |
1022 | /* |
1023 | * Turn on DTR. We must always do this, even if carrier is not |
1024 | * present, because otherwise we'd have to use TIOCSDTR |
1025 | * immediately after setting CLOCAL, which applications do not |
1026 | * expect. We always assert DTR while the device is open |
1027 | * unless explicitly requested to deassert it. |
1028 | */ |
1029 | cztty_modem(sc, 1); |
1030 | } |
1031 | |
1032 | splx(s); |
1033 | |
1034 | error = ttyopen(tp, CZTTY_DIALOUT(dev), ISSET(flags, O_NONBLOCK)); |
1035 | if (error) |
1036 | goto bad; |
1037 | |
1038 | error = (*tp->t_linesw->l_open)(dev, tp); |
1039 | if (error) |
1040 | goto bad; |
1041 | |
1042 | return (0); |
1043 | |
1044 | bad: |
1045 | if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { |
1046 | /* |
1047 | * We failed to open the device, and nobody else had it opened. |
1048 | * Clean up the state as appropriate. |
1049 | */ |
1050 | cztty_shutdown(sc); |
1051 | } |
1052 | |
1053 | return (error); |
1054 | } |
1055 | |
1056 | /* |
1057 | * czttyclose: |
1058 | * |
1059 | * Close a Cyclades-Z serial port. |
1060 | */ |
1061 | static int |
1062 | czttyclose(dev_t dev, int flags, int mode, struct lwp *l) |
1063 | { |
1064 | struct cztty_softc *sc = CZTTY_SOFTC(dev); |
1065 | struct tty *tp = sc->sc_tty; |
1066 | |
1067 | /* XXX This is for cons.c. */ |
1068 | if (!ISSET(tp->t_state, TS_ISOPEN)) |
1069 | return (0); |
1070 | |
1071 | (*tp->t_linesw->l_close)(tp, flags); |
1072 | ttyclose(tp); |
1073 | |
1074 | if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { |
1075 | /* |
1076 | * Although we got a last close, the device may still be in |
1077 | * use; e.g. if this was the dialout node, and there are still |
1078 | * processes waiting for carrier on the non-dialout node. |
1079 | */ |
1080 | cztty_shutdown(sc); |
1081 | } |
1082 | |
1083 | return (0); |
1084 | } |
1085 | |
1086 | /* |
1087 | * czttyread: |
1088 | * |
1089 | * Read from a Cyclades-Z serial port. |
1090 | */ |
1091 | static int |
1092 | czttyread(dev_t dev, struct uio *uio, int flags) |
1093 | { |
1094 | struct cztty_softc *sc = CZTTY_SOFTC(dev); |
1095 | struct tty *tp = sc->sc_tty; |
1096 | |
1097 | return ((*tp->t_linesw->l_read)(tp, uio, flags)); |
1098 | } |
1099 | |
1100 | /* |
1101 | * czttywrite: |
1102 | * |
1103 | * Write to a Cyclades-Z serial port. |
1104 | */ |
1105 | static int |
1106 | czttywrite(dev_t dev, struct uio *uio, int flags) |
1107 | { |
1108 | struct cztty_softc *sc = CZTTY_SOFTC(dev); |
1109 | struct tty *tp = sc->sc_tty; |
1110 | |
1111 | return ((*tp->t_linesw->l_write)(tp, uio, flags)); |
1112 | } |
1113 | |
1114 | /* |
1115 | * czttypoll: |
1116 | * |
1117 | * Poll a Cyclades-Z serial port. |
1118 | */ |
1119 | static int |
1120 | czttypoll(dev_t dev, int events, struct lwp *l) |
1121 | { |
1122 | struct cztty_softc *sc = CZTTY_SOFTC(dev); |
1123 | struct tty *tp = sc->sc_tty; |
1124 | |
1125 | return ((*tp->t_linesw->l_poll)(tp, events, l)); |
1126 | } |
1127 | |
1128 | /* |
1129 | * czttyioctl: |
1130 | * |
1131 | * Perform a control operation on a Cyclades-Z serial port. |
1132 | */ |
1133 | static int |
1134 | czttyioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) |
1135 | { |
1136 | struct cztty_softc *sc = CZTTY_SOFTC(dev); |
1137 | struct tty *tp = sc->sc_tty; |
1138 | int s, error; |
1139 | |
1140 | error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); |
1141 | if (error != EPASSTHROUGH) |
1142 | return (error); |
1143 | |
1144 | error = ttioctl(tp, cmd, data, flag, l); |
1145 | if (error != EPASSTHROUGH) |
1146 | return (error); |
1147 | |
1148 | error = 0; |
1149 | |
1150 | s = spltty(); |
1151 | |
1152 | switch (cmd) { |
1153 | case TIOCSBRK: |
1154 | cztty_break(sc, 1); |
1155 | break; |
1156 | |
1157 | case TIOCCBRK: |
1158 | cztty_break(sc, 0); |
1159 | break; |
1160 | |
1161 | case TIOCGFLAGS: |
1162 | *(int *)data = sc->sc_swflags; |
1163 | break; |
1164 | |
1165 | case TIOCSFLAGS: |
1166 | error = kauth_authorize_device_tty(l->l_cred, |
1167 | KAUTH_DEVICE_TTY_PRIVSET, tp); |
1168 | if (error) |
1169 | break; |
1170 | sc->sc_swflags = *(int *)data; |
1171 | break; |
1172 | |
1173 | case TIOCSDTR: |
1174 | cztty_modem(sc, 1); |
1175 | break; |
1176 | |
1177 | case TIOCCDTR: |
1178 | cztty_modem(sc, 0); |
1179 | break; |
1180 | |
1181 | case TIOCMSET: |
1182 | case TIOCMBIS: |
1183 | case TIOCMBIC: |
1184 | tiocm_to_cztty(sc, cmd, *(int *)data); |
1185 | break; |
1186 | |
1187 | case TIOCMGET: |
1188 | *(int *)data = cztty_to_tiocm(sc); |
1189 | break; |
1190 | |
1191 | default: |
1192 | error = EPASSTHROUGH; |
1193 | break; |
1194 | } |
1195 | |
1196 | splx(s); |
1197 | |
1198 | return (error); |
1199 | } |
1200 | |
1201 | /* |
1202 | * cztty_break: |
1203 | * |
1204 | * Set or clear BREAK on a port. |
1205 | */ |
1206 | static void |
1207 | cztty_break(struct cztty_softc *sc, int onoff) |
1208 | { |
1209 | struct cz_softc *cz = CZTTY_CZ(sc); |
1210 | |
1211 | cz_wait_pci_doorbell(cz, "czbreak" ); |
1212 | |
1213 | CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel); |
1214 | CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, |
1215 | onoff ? C_CM_SET_BREAK : C_CM_CLR_BREAK); |
1216 | } |
1217 | |
1218 | /* |
1219 | * cztty_modem: |
1220 | * |
1221 | * Set or clear DTR on a port. |
1222 | */ |
1223 | static void |
1224 | cztty_modem(struct cztty_softc *sc, int onoff) |
1225 | { |
1226 | struct cz_softc *cz = CZTTY_CZ(sc); |
1227 | |
1228 | if (sc->sc_rs_control_dtr == 0) |
1229 | return; |
1230 | |
1231 | cz_wait_pci_doorbell(cz, "czmod" ); |
1232 | |
1233 | if (onoff) |
1234 | sc->sc_chanctl_rs_control |= sc->sc_rs_control_dtr; |
1235 | else |
1236 | sc->sc_chanctl_rs_control &= ~sc->sc_rs_control_dtr; |
1237 | CZTTY_CHAN_WRITE(sc, CHNCTL_RS_CONTROL, sc->sc_chanctl_rs_control); |
1238 | |
1239 | CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel); |
1240 | CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTLM); |
1241 | } |
1242 | |
1243 | /* |
1244 | * tiocm_to_cztty: |
1245 | * |
1246 | * Process TIOCM* ioctls. |
1247 | */ |
1248 | static void |
1249 | tiocm_to_cztty(struct cztty_softc *sc, u_long how, int ttybits) |
1250 | { |
1251 | struct cz_softc *cz = CZTTY_CZ(sc); |
1252 | u_int32_t czttybits; |
1253 | |
1254 | czttybits = 0; |
1255 | if (ISSET(ttybits, TIOCM_DTR)) |
1256 | SET(czttybits, C_RS_DTR); |
1257 | if (ISSET(ttybits, TIOCM_RTS)) |
1258 | SET(czttybits, C_RS_RTS); |
1259 | |
1260 | cz_wait_pci_doorbell(cz, "cztiocm" ); |
1261 | |
1262 | switch (how) { |
1263 | case TIOCMBIC: |
1264 | CLR(sc->sc_chanctl_rs_control, czttybits); |
1265 | break; |
1266 | |
1267 | case TIOCMBIS: |
1268 | SET(sc->sc_chanctl_rs_control, czttybits); |
1269 | break; |
1270 | |
1271 | case TIOCMSET: |
1272 | CLR(sc->sc_chanctl_rs_control, C_RS_DTR | C_RS_RTS); |
1273 | SET(sc->sc_chanctl_rs_control, czttybits); |
1274 | break; |
1275 | } |
1276 | |
1277 | CZTTY_CHAN_WRITE(sc, CHNCTL_RS_CONTROL, sc->sc_chanctl_rs_control); |
1278 | |
1279 | CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel); |
1280 | CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTLM); |
1281 | } |
1282 | |
1283 | /* |
1284 | * cztty_to_tiocm: |
1285 | * |
1286 | * Process the TIOCMGET ioctl. |
1287 | */ |
1288 | static int |
1289 | cztty_to_tiocm(struct cztty_softc *sc) |
1290 | { |
1291 | struct cz_softc *cz = CZTTY_CZ(sc); |
1292 | u_int32_t rs_status, op_mode; |
1293 | int ttybits = 0; |
1294 | |
1295 | cz_wait_pci_doorbell(cz, "cztty" ); |
1296 | |
1297 | rs_status = CZTTY_CHAN_READ(sc, CHNCTL_RS_STATUS); |
1298 | op_mode = CZTTY_CHAN_READ(sc, CHNCTL_OP_MODE); |
1299 | |
1300 | if (ISSET(rs_status, C_RS_RTS)) |
1301 | SET(ttybits, TIOCM_RTS); |
1302 | if (ISSET(rs_status, C_RS_CTS)) |
1303 | SET(ttybits, TIOCM_CTS); |
1304 | if (ISSET(rs_status, C_RS_DCD)) |
1305 | SET(ttybits, TIOCM_CAR); |
1306 | if (ISSET(rs_status, C_RS_DTR)) |
1307 | SET(ttybits, TIOCM_DTR); |
1308 | if (ISSET(rs_status, C_RS_RI)) |
1309 | SET(ttybits, TIOCM_RNG); |
1310 | if (ISSET(rs_status, C_RS_DSR)) |
1311 | SET(ttybits, TIOCM_DSR); |
1312 | |
1313 | if (ISSET(op_mode, C_CH_ENABLE)) |
1314 | SET(ttybits, TIOCM_LE); |
1315 | |
1316 | return (ttybits); |
1317 | } |
1318 | |
1319 | /* |
1320 | * czttyparam: |
1321 | * |
1322 | * Set Cyclades-Z serial port parameters from termios. |
1323 | * |
1324 | * XXX Should just copy the whole termios after making |
1325 | * XXX sure all the changes could be done. |
1326 | */ |
1327 | static int |
1328 | czttyparam(struct tty *tp, struct termios *t) |
1329 | { |
1330 | struct cztty_softc *sc = CZTTY_SOFTC(tp->t_dev); |
1331 | struct cz_softc *cz = CZTTY_CZ(sc); |
1332 | u_int32_t rs_status; |
1333 | int ospeed, cflag; |
1334 | |
1335 | ospeed = t->c_ospeed; |
1336 | cflag = t->c_cflag; |
1337 | |
1338 | /* Check requested parameters. */ |
1339 | if (ospeed < 0) |
1340 | return (EINVAL); |
1341 | if (t->c_ispeed && t->c_ispeed != ospeed) |
1342 | return (EINVAL); |
1343 | |
1344 | if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR)) { |
1345 | SET(cflag, CLOCAL); |
1346 | CLR(cflag, HUPCL); |
1347 | } |
1348 | |
1349 | /* |
1350 | * If there were no changes, don't do anything. This avoids dropping |
1351 | * input and improves performance when all we did was frob things like |
1352 | * VMIN and VTIME. |
1353 | */ |
1354 | if (tp->t_ospeed == ospeed && |
1355 | tp->t_cflag == cflag) |
1356 | return (0); |
1357 | |
1358 | /* Data bits. */ |
1359 | sc->sc_chanctl_comm_data_l = 0; |
1360 | switch (t->c_cflag & CSIZE) { |
1361 | case CS5: |
1362 | sc->sc_chanctl_comm_data_l |= C_DL_CS5; |
1363 | break; |
1364 | |
1365 | case CS6: |
1366 | sc->sc_chanctl_comm_data_l |= C_DL_CS6; |
1367 | break; |
1368 | |
1369 | case CS7: |
1370 | sc->sc_chanctl_comm_data_l |= C_DL_CS7; |
1371 | break; |
1372 | |
1373 | case CS8: |
1374 | sc->sc_chanctl_comm_data_l |= C_DL_CS8; |
1375 | break; |
1376 | } |
1377 | |
1378 | /* Stop bits. */ |
1379 | if (t->c_cflag & CSTOPB) { |
1380 | if ((sc->sc_chanctl_comm_data_l & C_DL_CS) == C_DL_CS5) |
1381 | sc->sc_chanctl_comm_data_l |= C_DL_15STOP; |
1382 | else |
1383 | sc->sc_chanctl_comm_data_l |= C_DL_2STOP; |
1384 | } else |
1385 | sc->sc_chanctl_comm_data_l |= C_DL_1STOP; |
1386 | |
1387 | /* Parity. */ |
1388 | if (t->c_cflag & PARENB) { |
1389 | if (t->c_cflag & PARODD) |
1390 | sc->sc_chanctl_comm_parity = C_PR_ODD; |
1391 | else |
1392 | sc->sc_chanctl_comm_parity = C_PR_EVEN; |
1393 | } else |
1394 | sc->sc_chanctl_comm_parity = C_PR_NONE; |
1395 | |
1396 | /* |
1397 | * Initialize flow control pins depending on the current flow control |
1398 | * mode. |
1399 | */ |
1400 | if (ISSET(t->c_cflag, CRTSCTS)) { |
1401 | sc->sc_rs_control_dtr = C_RS_DTR; |
1402 | sc->sc_chanctl_hw_flow = C_RS_CTS | C_RS_RTS; |
1403 | } else if (ISSET(t->c_cflag, MDMBUF)) { |
1404 | sc->sc_rs_control_dtr = 0; |
1405 | sc->sc_chanctl_hw_flow = C_RS_DCD | C_RS_DTR; |
1406 | } else { |
1407 | /* |
1408 | * If no flow control, then always set RTS. This will make |
1409 | * the other side happy if it mistakenly thinks we're doing |
1410 | * RTS/CTS flow control. |
1411 | */ |
1412 | sc->sc_rs_control_dtr = C_RS_DTR | C_RS_RTS; |
1413 | sc->sc_chanctl_hw_flow = 0; |
1414 | if (ISSET(sc->sc_chanctl_rs_control, C_RS_DTR)) |
1415 | SET(sc->sc_chanctl_rs_control, C_RS_RTS); |
1416 | else |
1417 | CLR(sc->sc_chanctl_rs_control, C_RS_RTS); |
1418 | } |
1419 | |
1420 | /* Baud rate. */ |
1421 | sc->sc_chanctl_comm_baud = ospeed; |
1422 | |
1423 | /* Copy to tty. */ |
1424 | tp->t_ispeed = 0; |
1425 | tp->t_ospeed = t->c_ospeed; |
1426 | tp->t_cflag = t->c_cflag; |
1427 | |
1428 | /* |
1429 | * Now load the channel control structure. |
1430 | */ |
1431 | |
1432 | cz_wait_pci_doorbell(cz, "czparam" ); |
1433 | |
1434 | CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_BAUD, sc->sc_chanctl_comm_baud); |
1435 | CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_DATA_L, sc->sc_chanctl_comm_data_l); |
1436 | CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_PARITY, sc->sc_chanctl_comm_parity); |
1437 | CZTTY_CHAN_WRITE(sc, CHNCTL_HW_FLOW, sc->sc_chanctl_hw_flow); |
1438 | CZTTY_CHAN_WRITE(sc, CHNCTL_RS_CONTROL, sc->sc_chanctl_rs_control); |
1439 | |
1440 | CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel); |
1441 | CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTLW); |
1442 | |
1443 | cz_wait_pci_doorbell(cz, "czparam" ); |
1444 | |
1445 | CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel); |
1446 | CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTLM); |
1447 | |
1448 | cz_wait_pci_doorbell(cz, "czparam" ); |
1449 | |
1450 | /* |
1451 | * Update the tty layer's idea of the carrier bit, in case we changed |
1452 | * CLOCAL. We don't hang up here; we only do that by explicit |
1453 | * request. |
1454 | */ |
1455 | rs_status = CZTTY_CHAN_READ(sc, CHNCTL_RS_STATUS); |
1456 | (void) (*tp->t_linesw->l_modem)(tp, ISSET(rs_status, C_RS_DCD)); |
1457 | |
1458 | return (0); |
1459 | } |
1460 | |
1461 | /* |
1462 | * czttystart: |
1463 | * |
1464 | * Start or restart transmission. |
1465 | */ |
1466 | static void |
1467 | czttystart(struct tty *tp) |
1468 | { |
1469 | struct cztty_softc *sc = CZTTY_SOFTC(tp->t_dev); |
1470 | int s; |
1471 | |
1472 | s = spltty(); |
1473 | if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) |
1474 | goto out; |
1475 | if (!ttypull(tp)) |
1476 | goto out; |
1477 | cztty_transmit(sc, tp); |
1478 | out: |
1479 | splx(s); |
1480 | } |
1481 | |
1482 | /* |
1483 | * czttystop: |
1484 | * |
1485 | * Stop output, e.g., for ^S or output flush. |
1486 | */ |
1487 | static void |
1488 | czttystop(struct tty *tp, int flag) |
1489 | { |
1490 | |
1491 | /* |
1492 | * XXX We don't do anything here, yet. Mostly, I don't know |
1493 | * XXX exactly how this should be implemented on this device. |
1494 | * XXX We've given a big chunk of data to the MIPS already, |
1495 | * XXX and I don't know how we request the MIPS to stop sending |
1496 | * XXX the data. So, punt for now. --thorpej |
1497 | */ |
1498 | } |
1499 | |
1500 | /* |
1501 | * cztty_diag: |
1502 | * |
1503 | * Issue a scheduled diagnostic message. |
1504 | */ |
1505 | static void |
1506 | cztty_diag(void *arg) |
1507 | { |
1508 | struct cztty_softc *sc = arg; |
1509 | struct cz_softc *cz = CZTTY_CZ(sc); |
1510 | u_int overflows, parity_errors, framing_errors; |
1511 | int s; |
1512 | |
1513 | s = spltty(); |
1514 | |
1515 | overflows = sc->sc_overflows; |
1516 | sc->sc_overflows = 0; |
1517 | |
1518 | parity_errors = sc->sc_parity_errors; |
1519 | sc->sc_parity_errors = 0; |
1520 | |
1521 | framing_errors = sc->sc_framing_errors; |
1522 | sc->sc_framing_errors = 0; |
1523 | |
1524 | sc->sc_errors = 0; |
1525 | |
1526 | splx(s); |
1527 | |
1528 | log(LOG_WARNING, |
1529 | "%s: channel %d: %u overflow%s, %u parity, %u framing error%s\n" , |
1530 | device_xname(cz->cz_dev), sc->sc_channel, |
1531 | overflows, overflows == 1 ? "" : "s" , |
1532 | parity_errors, |
1533 | framing_errors, framing_errors == 1 ? "" : "s" ); |
1534 | } |
1535 | |
1536 | const struct cdevsw cz_cdevsw = { |
1537 | .d_open = czttyopen, |
1538 | .d_close = czttyclose, |
1539 | .d_read = czttyread, |
1540 | .d_write = czttywrite, |
1541 | .d_ioctl = czttyioctl, |
1542 | .d_stop = czttystop, |
1543 | .d_tty = czttytty, |
1544 | .d_poll = czttypoll, |
1545 | .d_mmap = nommap, |
1546 | .d_kqfilter = ttykqfilter, |
1547 | .d_discard = nodiscard, |
1548 | .d_flag = D_TTY |
1549 | }; |
1550 | |
1551 | /* |
1552 | * tx and rx ring buffer size macros: |
1553 | * |
1554 | * The transmitter and receiver both use ring buffers. For each one, there |
1555 | * is a get (consumer) and a put (producer) offset. The get value is the |
1556 | * next byte to be read from the ring, and the put is the next one to be |
1557 | * put into the ring. get == put means the ring is empty. |
1558 | * |
1559 | * For each ring, the firmware controls one of (get, put) and this driver |
1560 | * controls the other. For transmission, this driver updates put to point |
1561 | * past the valid data, and the firmware moves get as bytes are sent. Likewise |
1562 | * for receive, the driver controls put, and this driver controls get. |
1563 | */ |
1564 | #define TX_MOVEABLE(g, p, s) (((g) > (p)) ? ((g) - (p) - 1) : ((s) - (p))) |
1565 | #define RX_MOVEABLE(g, p, s) (((g) > (p)) ? ((s) - (g)) : ((p) - (g))) |
1566 | |
1567 | /* |
1568 | * cztty_transmit() |
1569 | * |
1570 | * Look at the tty for this port and start sending. |
1571 | */ |
1572 | static int |
1573 | cztty_transmit(struct cztty_softc *sc, struct tty *tp) |
1574 | { |
1575 | struct cz_softc *cz = CZTTY_CZ(sc); |
1576 | u_int move, get, put, size, address; |
1577 | #ifdef HOSTRAMCODE |
1578 | int error, done = 0; |
1579 | #else |
1580 | int done = 0; |
1581 | #endif |
1582 | |
1583 | size = CZTTY_BUF_READ(sc, BUFCTL_TX_BUFSIZE); |
1584 | get = CZTTY_BUF_READ(sc, BUFCTL_TX_GET); |
1585 | put = CZTTY_BUF_READ(sc, BUFCTL_TX_PUT); |
1586 | address = CZTTY_BUF_READ(sc, BUFCTL_TX_BUFADDR); |
1587 | |
1588 | while ((tp->t_outq.c_cc > 0) && ((move = TX_MOVEABLE(get, put, size)))){ |
1589 | #ifdef HOSTRAMCODE |
1590 | if (0) { |
1591 | move = min(tp->t_outq.c_cc, move); |
1592 | error = q_to_b(&tp->t_outq, 0, move); |
1593 | if (error != move) { |
1594 | printf("%s: channel %d: error moving to " |
1595 | "transmit buf\n" , device_xname(cz->cz_dev), |
1596 | sc->sc_channel); |
1597 | move = error; |
1598 | } |
1599 | } else { |
1600 | #endif |
1601 | move = min(ndqb(&tp->t_outq, 0), move); |
1602 | bus_space_write_region_1(cz->cz_win_st, cz->cz_win_sh, |
1603 | address + put, tp->t_outq.c_cf, move); |
1604 | ndflush(&tp->t_outq, move); |
1605 | #ifdef HOSTRAMCODE |
1606 | } |
1607 | #endif |
1608 | |
1609 | put = ((put + move) % size); |
1610 | done = 1; |
1611 | } |
1612 | if (done) { |
1613 | CZTTY_BUF_WRITE(sc, BUFCTL_TX_PUT, put); |
1614 | } |
1615 | return (done); |
1616 | } |
1617 | |
1618 | static int |
1619 | cztty_receive(struct cztty_softc *sc, struct tty *tp) |
1620 | { |
1621 | struct cz_softc *cz = CZTTY_CZ(sc); |
1622 | u_int get, put, size, address; |
1623 | int done = 0, ch; |
1624 | |
1625 | size = CZTTY_BUF_READ(sc, BUFCTL_RX_BUFSIZE); |
1626 | get = CZTTY_BUF_READ(sc, BUFCTL_RX_GET); |
1627 | put = CZTTY_BUF_READ(sc, BUFCTL_RX_PUT); |
1628 | address = CZTTY_BUF_READ(sc, BUFCTL_RX_BUFADDR); |
1629 | |
1630 | while ((get != put) && ((tp->t_canq.c_cc + tp->t_rawq.c_cc) < tp->t_hiwat)) { |
1631 | #ifdef HOSTRAMCODE |
1632 | if (hostram) { |
1633 | ch = ((char *)fifoaddr)[get]; |
1634 | } else { |
1635 | #endif |
1636 | ch = bus_space_read_1(cz->cz_win_st, cz->cz_win_sh, |
1637 | address + get); |
1638 | #ifdef HOSTRAMCODE |
1639 | } |
1640 | #endif |
1641 | (*tp->t_linesw->l_rint)(ch, tp); |
1642 | get = (get + 1) % size; |
1643 | done = 1; |
1644 | } |
1645 | if (done) { |
1646 | CZTTY_BUF_WRITE(sc, BUFCTL_RX_GET, get); |
1647 | } |
1648 | return (done); |
1649 | } |
1650 | |