1/* $NetBSD: if_atw_pci.c,v 1.27 2016/07/14 04:00:46 msaitoh Exp $ */
2
3/*-
4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center; Charles M. Hannum; and David Young.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33/*
34 * PCI bus front-end for the ADMtek ADM8211 802.11 MAC/BBP chip.
35 *
36 * Derived from the ``Tulip'' PCI bus front-end.
37 */
38
39#include <sys/cdefs.h>
40__KERNEL_RCSID(0, "$NetBSD: if_atw_pci.c,v 1.27 2016/07/14 04:00:46 msaitoh Exp $");
41
42#include <sys/param.h>
43#include <sys/systm.h>
44#include <sys/mbuf.h>
45#include <sys/malloc.h>
46#include <sys/kernel.h>
47#include <sys/socket.h>
48#include <sys/ioctl.h>
49#include <sys/errno.h>
50#include <sys/device.h>
51
52#include <machine/endian.h>
53
54#include <net/if.h>
55#include <net/if_dl.h>
56#include <net/if_media.h>
57#include <net/if_ether.h>
58
59#include <net80211/ieee80211_netbsd.h>
60#include <net80211/ieee80211_radiotap.h>
61#include <net80211/ieee80211_var.h>
62
63#include <sys/bus.h>
64#include <sys/intr.h>
65
66#include <dev/ic/atwreg.h>
67#include <dev/ic/rf3000reg.h>
68#include <dev/ic/si4136reg.h>
69#include <dev/ic/atwvar.h>
70
71#include <dev/pci/pcivar.h>
72#include <dev/pci/pcireg.h>
73#include <dev/pci/pcidevs.h>
74
75/*
76 * PCI configuration space registers used by the ADM8211.
77 */
78#define ATW_PCI_IOBA PCI_BAR(0) /* i/o mapped base */
79#define ATW_PCI_MMBA PCI_BAR(1) /* memory mapped base */
80
81struct atw_pci_softc {
82 struct atw_softc psc_atw; /* real ADM8211 softc */
83
84 pci_intr_handle_t psc_ih; /* interrupt handle */
85 void *psc_intrcookie;
86
87 pci_chipset_tag_t psc_pc; /* our PCI chipset */
88 pcitag_t psc_pcitag; /* our PCI tag */
89};
90
91static int atw_pci_match(device_t, cfdata_t, void *);
92static void atw_pci_attach(device_t, device_t, void *);
93static bool atw_pci_suspend(device_t, const pmf_qual_t *);
94static bool atw_pci_resume(device_t, const pmf_qual_t *);
95
96CFATTACH_DECL_NEW(atw_pci, sizeof(struct atw_pci_softc),
97 atw_pci_match, atw_pci_attach, NULL, NULL);
98
99static const struct atw_pci_product {
100 u_int32_t app_vendor; /* PCI vendor ID */
101 u_int32_t app_product; /* PCI product ID */
102 const char *app_product_name;
103} atw_pci_products[] = {
104 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM8211,
105 "ADMtek ADM8211 802.11 MAC/BBP" },
106
107 { 0, 0, NULL },
108};
109
110static const struct atw_pci_product *
111atw_pci_lookup(const struct pci_attach_args *pa)
112{
113 const struct atw_pci_product *app;
114
115 for (app = atw_pci_products;
116 app->app_product_name != NULL;
117 app++) {
118 if (PCI_VENDOR(pa->pa_id) == app->app_vendor &&
119 PCI_PRODUCT(pa->pa_id) == app->app_product)
120 return (app);
121 }
122 return (NULL);
123}
124
125static int
126atw_pci_match(device_t parent, cfdata_t match, void *aux)
127{
128 struct pci_attach_args *pa = aux;
129
130 if (atw_pci_lookup(pa) != NULL)
131 return (1);
132
133 return (0);
134}
135
136static bool
137atw_pci_resume(device_t self, const pmf_qual_t *qual)
138{
139 struct atw_pci_softc *psc = device_private(self);
140 struct atw_softc *sc = &psc->psc_atw;
141
142 /* Establish the interrupt. */
143 psc->psc_intrcookie = pci_intr_establish(psc->psc_pc, psc->psc_ih,
144 IPL_NET, atw_intr, sc);
145 if (psc->psc_intrcookie == NULL) {
146 aprint_error_dev(sc->sc_dev, "unable to establish interrupt\n");
147 return false;
148 }
149
150 return true;
151}
152
153static bool
154atw_pci_suspend(device_t self, const pmf_qual_t *qual)
155{
156 struct atw_pci_softc *psc = device_private(self);
157
158 /* Unhook the interrupt handler. */
159 pci_intr_disestablish(psc->psc_pc, psc->psc_intrcookie);
160 psc->psc_intrcookie = NULL;
161
162 return atw_suspend(self, qual);
163}
164
165static void
166atw_pci_attach(device_t parent, device_t self, void *aux)
167{
168 struct atw_pci_softc *psc = device_private(self);
169 struct atw_softc *sc = &psc->psc_atw;
170 struct pci_attach_args *pa = aux;
171 pci_chipset_tag_t pc = pa->pa_pc;
172 const char *intrstr = NULL;
173 bus_space_tag_t iot, memt;
174 bus_space_handle_t ioh, memh;
175 int ioh_valid, memh_valid;
176 const struct atw_pci_product *app;
177 int error;
178 char intrbuf[PCI_INTRSTR_LEN];
179
180 sc->sc_dev = self;
181
182 psc->psc_pc = pa->pa_pc;
183 psc->psc_pcitag = pa->pa_tag;
184
185 app = atw_pci_lookup(pa);
186 if (app == NULL) {
187 printf("\n");
188 panic("atw_pci_attach: impossible");
189 }
190
191 aprint_naive("\n");
192 /*
193 * Get revision info, and set some chip-specific variables.
194 */
195 sc->sc_rev = PCI_REVISION(pa->pa_class);
196 aprint_normal(": %s, revision %d.%d\n", app->app_product_name,
197 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
198
199 /* power up chip */
200 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self,
201 NULL)) && error != EOPNOTSUPP) {
202 aprint_error_dev(self, "cannot activate %d\n", error);
203 return;
204 }
205
206 /*
207 * Map the device.
208 */
209 ioh_valid = (pci_mapreg_map(pa, ATW_PCI_IOBA,
210 PCI_MAPREG_TYPE_IO, 0,
211 &iot, &ioh, NULL, NULL) == 0);
212 memh_valid = (pci_mapreg_map(pa, ATW_PCI_MMBA,
213 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
214 &memt, &memh, NULL, NULL) == 0);
215
216 if (memh_valid) {
217 sc->sc_st = memt;
218 sc->sc_sh = memh;
219 } else if (ioh_valid) {
220 sc->sc_st = iot;
221 sc->sc_sh = ioh;
222 } else {
223 aprint_error_dev(self, "unable to map device registers\n");
224 return;
225 }
226
227 sc->sc_dmat = pa->pa_dmat;
228
229 /*
230 * Make sure bus mastering is enabled.
231 */
232 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
233 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
234 PCI_COMMAND_MASTER_ENABLE);
235
236 /*
237 * Get the cacheline size.
238 */
239 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag,
240 PCI_BHLC_REG));
241
242 /*
243 * Get PCI data moving command info.
244 */
245 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) /* read line */
246 sc->sc_flags |= ATWF_MRL;
247 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) /* read multiple */
248 sc->sc_flags |= ATWF_MRM;
249 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) /* write invalidate */
250 sc->sc_flags |= ATWF_MWI;
251
252 /*
253 * Map and establish our interrupt.
254 */
255 if (pci_intr_map(pa, &psc->psc_ih)) {
256 aprint_error_dev(self, "unable to map interrupt\n");
257 return;
258 }
259 intrstr = pci_intr_string(pc, psc->psc_ih, intrbuf, sizeof(intrbuf));
260 psc->psc_intrcookie = pci_intr_establish(pc, psc->psc_ih, IPL_NET,
261 atw_intr, sc);
262 if (psc->psc_intrcookie == NULL) {
263 aprint_error_dev(self, "unable to establish interrupt");
264 if (intrstr != NULL)
265 aprint_error(" at %s", intrstr);
266 aprint_error("\n");
267 return;
268 }
269
270 aprint_normal_dev(self, "interrupting at %s\n", intrstr);
271
272 /*
273 * Bus-independent attach.
274 */
275 atw_attach(sc);
276
277 if (pmf_device_register1(sc->sc_dev, atw_pci_suspend, atw_pci_resume,
278 atw_shutdown))
279 pmf_class_network_register(sc->sc_dev, &sc->sc_if);
280 else
281 aprint_error_dev(self, "couldn't establish power handler\n");
282
283 /*
284 * Power down the socket.
285 */
286 pmf_device_suspend(sc->sc_dev, &sc->sc_qual);
287}
288