1 | #ifndef __NOUVEAU_GRAPH_REGS_H__ |
2 | #define __NOUVEAU_GRAPH_REGS_H__ |
3 | |
4 | #define NV04_PGRAPH_DEBUG_0 0x00400080 |
5 | #define NV04_PGRAPH_DEBUG_1 0x00400084 |
6 | #define NV04_PGRAPH_DEBUG_2 0x00400088 |
7 | #define NV04_PGRAPH_DEBUG_3 0x0040008c |
8 | #define NV10_PGRAPH_DEBUG_4 0x00400090 |
9 | #define NV03_PGRAPH_INTR 0x00400100 |
10 | #define NV03_PGRAPH_NSTATUS 0x00400104 |
11 | # define NV04_PGRAPH_NSTATUS_STATE_IN_USE (1<<11) |
12 | # define NV04_PGRAPH_NSTATUS_INVALID_STATE (1<<12) |
13 | # define NV04_PGRAPH_NSTATUS_BAD_ARGUMENT (1<<13) |
14 | # define NV04_PGRAPH_NSTATUS_PROTECTION_FAULT (1<<14) |
15 | # define NV10_PGRAPH_NSTATUS_STATE_IN_USE (1<<23) |
16 | # define NV10_PGRAPH_NSTATUS_INVALID_STATE (1<<24) |
17 | # define NV10_PGRAPH_NSTATUS_BAD_ARGUMENT (1<<25) |
18 | # define NV10_PGRAPH_NSTATUS_PROTECTION_FAULT (1<<26) |
19 | #define NV03_PGRAPH_NSOURCE 0x00400108 |
20 | # define NV03_PGRAPH_NSOURCE_NOTIFICATION (1<<0) |
21 | # define NV03_PGRAPH_NSOURCE_DATA_ERROR (1<<1) |
22 | # define NV03_PGRAPH_NSOURCE_PROTECTION_ERROR (1<<2) |
23 | # define NV03_PGRAPH_NSOURCE_RANGE_EXCEPTION (1<<3) |
24 | # define NV03_PGRAPH_NSOURCE_LIMIT_COLOR (1<<4) |
25 | # define NV03_PGRAPH_NSOURCE_LIMIT_ZETA (1<<5) |
26 | # define NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD (1<<6) |
27 | # define NV03_PGRAPH_NSOURCE_DMA_R_PROTECTION (1<<7) |
28 | # define NV03_PGRAPH_NSOURCE_DMA_W_PROTECTION (1<<8) |
29 | # define NV03_PGRAPH_NSOURCE_FORMAT_EXCEPTION (1<<9) |
30 | # define NV03_PGRAPH_NSOURCE_PATCH_EXCEPTION (1<<10) |
31 | # define NV03_PGRAPH_NSOURCE_STATE_INVALID (1<<11) |
32 | # define NV03_PGRAPH_NSOURCE_DOUBLE_NOTIFY (1<<12) |
33 | # define NV03_PGRAPH_NSOURCE_NOTIFY_IN_USE (1<<13) |
34 | # define NV03_PGRAPH_NSOURCE_METHOD_CNT (1<<14) |
35 | # define NV03_PGRAPH_NSOURCE_BFR_NOTIFICATION (1<<15) |
36 | # define NV03_PGRAPH_NSOURCE_DMA_VTX_PROTECTION (1<<16) |
37 | # define NV03_PGRAPH_NSOURCE_DMA_WIDTH_A (1<<17) |
38 | # define NV03_PGRAPH_NSOURCE_DMA_WIDTH_B (1<<18) |
39 | #define NV03_PGRAPH_INTR_EN 0x00400140 |
40 | #define NV40_PGRAPH_INTR_EN 0x0040013C |
41 | # define NV_PGRAPH_INTR_NOTIFY (1<<0) |
42 | # define NV_PGRAPH_INTR_MISSING_HW (1<<4) |
43 | # define NV_PGRAPH_INTR_CONTEXT_SWITCH (1<<12) |
44 | # define NV_PGRAPH_INTR_BUFFER_NOTIFY (1<<16) |
45 | # define NV_PGRAPH_INTR_ERROR (1<<20) |
46 | #define NV10_PGRAPH_CTX_CONTROL 0x00400144 |
47 | #define NV10_PGRAPH_CTX_USER 0x00400148 |
48 | #define NV10_PGRAPH_CTX_SWITCH(i) (0x0040014C + 0x4*(i)) |
49 | #define NV04_PGRAPH_CTX_SWITCH1 0x00400160 |
50 | #define NV10_PGRAPH_CTX_CACHE(i, j) (0x00400160 \ |
51 | + 0x4*(i) + 0x20*(j)) |
52 | #define NV04_PGRAPH_CTX_SWITCH2 0x00400164 |
53 | #define NV04_PGRAPH_CTX_SWITCH3 0x00400168 |
54 | #define NV04_PGRAPH_CTX_SWITCH4 0x0040016C |
55 | #define NV04_PGRAPH_CTX_CONTROL 0x00400170 |
56 | #define NV04_PGRAPH_CTX_USER 0x00400174 |
57 | #define NV04_PGRAPH_CTX_CACHE1 0x00400180 |
58 | #define NV03_PGRAPH_CTX_CONTROL 0x00400190 |
59 | #define NV03_PGRAPH_CTX_USER 0x00400194 |
60 | #define NV04_PGRAPH_CTX_CACHE2 0x004001A0 |
61 | #define NV04_PGRAPH_CTX_CACHE3 0x004001C0 |
62 | #define NV04_PGRAPH_CTX_CACHE4 0x004001E0 |
63 | #define NV40_PGRAPH_CTXCTL_0304 0x00400304 |
64 | #define NV40_PGRAPH_CTXCTL_0304_XFER_CTX 0x00000001 |
65 | #define NV40_PGRAPH_CTXCTL_UCODE_STAT 0x00400308 |
66 | #define NV40_PGRAPH_CTXCTL_UCODE_STAT_IP_MASK 0xff000000 |
67 | #define NV40_PGRAPH_CTXCTL_UCODE_STAT_IP_SHIFT 24 |
68 | #define NV40_PGRAPH_CTXCTL_UCODE_STAT_OP_MASK 0x00ffffff |
69 | #define NV40_PGRAPH_CTXCTL_0310 0x00400310 |
70 | #define NV40_PGRAPH_CTXCTL_0310_XFER_SAVE 0x00000020 |
71 | #define NV40_PGRAPH_CTXCTL_0310_XFER_LOAD 0x00000040 |
72 | #define NV40_PGRAPH_CTXCTL_030C 0x0040030c |
73 | #define NV40_PGRAPH_CTXCTL_UCODE_INDEX 0x00400324 |
74 | #define NV40_PGRAPH_CTXCTL_UCODE_DATA 0x00400328 |
75 | #define NV40_PGRAPH_CTXCTL_CUR 0x0040032c |
76 | #define NV40_PGRAPH_CTXCTL_CUR_LOADED 0x01000000 |
77 | #define NV40_PGRAPH_CTXCTL_CUR_INSTANCE 0x000FFFFF |
78 | #define NV40_PGRAPH_CTXCTL_NEXT 0x00400330 |
79 | #define NV40_PGRAPH_CTXCTL_NEXT_INSTANCE 0x000fffff |
80 | #define NV50_PGRAPH_CTXCTL_CUR 0x0040032c |
81 | #define NV50_PGRAPH_CTXCTL_CUR_LOADED 0x80000000 |
82 | #define NV50_PGRAPH_CTXCTL_CUR_INSTANCE 0x00ffffff |
83 | #define NV50_PGRAPH_CTXCTL_NEXT 0x00400330 |
84 | #define NV50_PGRAPH_CTXCTL_NEXT_INSTANCE 0x00ffffff |
85 | #define NV03_PGRAPH_ABS_X_RAM 0x00400400 |
86 | #define NV03_PGRAPH_ABS_Y_RAM 0x00400480 |
87 | #define NV03_PGRAPH_X_MISC 0x00400500 |
88 | #define NV03_PGRAPH_Y_MISC 0x00400504 |
89 | #define NV04_PGRAPH_VALID1 0x00400508 |
90 | #define NV04_PGRAPH_SOURCE_COLOR 0x0040050C |
91 | #define NV04_PGRAPH_MISC24_0 0x00400510 |
92 | #define NV03_PGRAPH_XY_LOGIC_MISC0 0x00400514 |
93 | #define NV03_PGRAPH_XY_LOGIC_MISC1 0x00400518 |
94 | #define NV03_PGRAPH_XY_LOGIC_MISC2 0x0040051C |
95 | #define NV03_PGRAPH_XY_LOGIC_MISC3 0x00400520 |
96 | #define NV03_PGRAPH_CLIPX_0 0x00400524 |
97 | #define NV03_PGRAPH_CLIPX_1 0x00400528 |
98 | #define NV03_PGRAPH_CLIPY_0 0x0040052C |
99 | #define NV03_PGRAPH_CLIPY_1 0x00400530 |
100 | #define NV03_PGRAPH_ABS_ICLIP_XMAX 0x00400534 |
101 | #define NV03_PGRAPH_ABS_ICLIP_YMAX 0x00400538 |
102 | #define NV03_PGRAPH_ABS_UCLIP_XMIN 0x0040053C |
103 | #define NV03_PGRAPH_ABS_UCLIP_YMIN 0x00400540 |
104 | #define NV03_PGRAPH_ABS_UCLIP_XMAX 0x00400544 |
105 | #define NV03_PGRAPH_ABS_UCLIP_YMAX 0x00400548 |
106 | #define NV03_PGRAPH_ABS_UCLIPA_XMIN 0x00400560 |
107 | #define NV03_PGRAPH_ABS_UCLIPA_YMIN 0x00400564 |
108 | #define NV03_PGRAPH_ABS_UCLIPA_XMAX 0x00400568 |
109 | #define NV03_PGRAPH_ABS_UCLIPA_YMAX 0x0040056C |
110 | #define NV04_PGRAPH_MISC24_1 0x00400570 |
111 | #define NV04_PGRAPH_MISC24_2 0x00400574 |
112 | #define NV04_PGRAPH_VALID2 0x00400578 |
113 | #define NV04_PGRAPH_PASSTHRU_0 0x0040057C |
114 | #define NV04_PGRAPH_PASSTHRU_1 0x00400580 |
115 | #define NV04_PGRAPH_PASSTHRU_2 0x00400584 |
116 | #define NV10_PGRAPH_DIMX_TEXTURE 0x00400588 |
117 | #define NV10_PGRAPH_WDIMX_TEXTURE 0x0040058C |
118 | #define NV04_PGRAPH_COMBINE_0_ALPHA 0x00400590 |
119 | #define NV04_PGRAPH_COMBINE_0_COLOR 0x00400594 |
120 | #define NV04_PGRAPH_COMBINE_1_ALPHA 0x00400598 |
121 | #define NV04_PGRAPH_COMBINE_1_COLOR 0x0040059C |
122 | #define NV04_PGRAPH_FORMAT_0 0x004005A8 |
123 | #define NV04_PGRAPH_FORMAT_1 0x004005AC |
124 | #define NV04_PGRAPH_FILTER_0 0x004005B0 |
125 | #define NV04_PGRAPH_FILTER_1 0x004005B4 |
126 | #define NV03_PGRAPH_MONO_COLOR0 0x00400600 |
127 | #define NV04_PGRAPH_ROP3 0x00400604 |
128 | #define NV04_PGRAPH_BETA_AND 0x00400608 |
129 | #define NV04_PGRAPH_BETA_PREMULT 0x0040060C |
130 | #define NV04_PGRAPH_LIMIT_VIOL_PIX 0x00400610 |
131 | #define NV04_PGRAPH_FORMATS 0x00400618 |
132 | #define NV10_PGRAPH_DEBUG_2 0x00400620 |
133 | #define NV04_PGRAPH_BOFFSET0 0x00400640 |
134 | #define NV04_PGRAPH_BOFFSET1 0x00400644 |
135 | #define NV04_PGRAPH_BOFFSET2 0x00400648 |
136 | #define NV04_PGRAPH_BOFFSET3 0x0040064C |
137 | #define NV04_PGRAPH_BOFFSET4 0x00400650 |
138 | #define NV04_PGRAPH_BOFFSET5 0x00400654 |
139 | #define NV04_PGRAPH_BBASE0 0x00400658 |
140 | #define NV04_PGRAPH_BBASE1 0x0040065C |
141 | #define NV04_PGRAPH_BBASE2 0x00400660 |
142 | #define NV04_PGRAPH_BBASE3 0x00400664 |
143 | #define NV04_PGRAPH_BBASE4 0x00400668 |
144 | #define NV04_PGRAPH_BBASE5 0x0040066C |
145 | #define NV04_PGRAPH_BPITCH0 0x00400670 |
146 | #define NV04_PGRAPH_BPITCH1 0x00400674 |
147 | #define NV04_PGRAPH_BPITCH2 0x00400678 |
148 | #define NV04_PGRAPH_BPITCH3 0x0040067C |
149 | #define NV04_PGRAPH_BPITCH4 0x00400680 |
150 | #define NV04_PGRAPH_BLIMIT0 0x00400684 |
151 | #define NV04_PGRAPH_BLIMIT1 0x00400688 |
152 | #define NV04_PGRAPH_BLIMIT2 0x0040068C |
153 | #define NV04_PGRAPH_BLIMIT3 0x00400690 |
154 | #define NV04_PGRAPH_BLIMIT4 0x00400694 |
155 | #define NV04_PGRAPH_BLIMIT5 0x00400698 |
156 | #define NV04_PGRAPH_BSWIZZLE2 0x0040069C |
157 | #define NV04_PGRAPH_BSWIZZLE5 0x004006A0 |
158 | #define NV03_PGRAPH_STATUS 0x004006B0 |
159 | #define NV04_PGRAPH_STATUS 0x00400700 |
160 | # define NV40_PGRAPH_STATUS_SYNC_STALL 0x00004000 |
161 | #define NV04_PGRAPH_TRAPPED_ADDR 0x00400704 |
162 | #define NV04_PGRAPH_TRAPPED_DATA 0x00400708 |
163 | #define NV04_PGRAPH_SURFACE 0x0040070C |
164 | #define NV10_PGRAPH_TRAPPED_DATA_HIGH 0x0040070C |
165 | #define NV04_PGRAPH_STATE 0x00400710 |
166 | #define NV10_PGRAPH_SURFACE 0x00400710 |
167 | #define NV04_PGRAPH_NOTIFY 0x00400714 |
168 | #define NV10_PGRAPH_STATE 0x00400714 |
169 | #define NV10_PGRAPH_NOTIFY 0x00400718 |
170 | |
171 | #define NV04_PGRAPH_FIFO 0x00400720 |
172 | |
173 | #define NV04_PGRAPH_BPIXEL 0x00400724 |
174 | #define NV10_PGRAPH_RDI_INDEX 0x00400750 |
175 | #define NV04_PGRAPH_FFINTFC_ST2 0x00400754 |
176 | #define NV10_PGRAPH_RDI_DATA 0x00400754 |
177 | #define NV04_PGRAPH_DMA_PITCH 0x00400760 |
178 | #define NV10_PGRAPH_FFINTFC_FIFO_PTR 0x00400760 |
179 | #define NV04_PGRAPH_DVD_COLORFMT 0x00400764 |
180 | #define NV10_PGRAPH_FFINTFC_ST2 0x00400764 |
181 | #define NV04_PGRAPH_SCALED_FORMAT 0x00400768 |
182 | #define NV10_PGRAPH_FFINTFC_ST2_DL 0x00400768 |
183 | #define NV10_PGRAPH_FFINTFC_ST2_DH 0x0040076c |
184 | #define NV10_PGRAPH_DMA_PITCH 0x00400770 |
185 | #define NV10_PGRAPH_DVD_COLORFMT 0x00400774 |
186 | #define NV10_PGRAPH_SCALED_FORMAT 0x00400778 |
187 | #define NV20_PGRAPH_CHANNEL_CTX_TABLE 0x00400780 |
188 | #define NV20_PGRAPH_CHANNEL_CTX_POINTER 0x00400784 |
189 | #define NV20_PGRAPH_CHANNEL_CTX_XFER 0x00400788 |
190 | #define NV20_PGRAPH_CHANNEL_CTX_XFER_LOAD 0x00000001 |
191 | #define NV20_PGRAPH_CHANNEL_CTX_XFER_SAVE 0x00000002 |
192 | #define NV04_PGRAPH_PATT_COLOR0 0x00400800 |
193 | #define NV04_PGRAPH_PATT_COLOR1 0x00400804 |
194 | #define NV04_PGRAPH_PATTERN 0x00400808 |
195 | #define NV04_PGRAPH_PATTERN_SHAPE 0x00400810 |
196 | #define NV04_PGRAPH_CHROMA 0x00400814 |
197 | #define NV04_PGRAPH_CONTROL0 0x00400818 |
198 | #define NV04_PGRAPH_CONTROL1 0x0040081C |
199 | #define NV04_PGRAPH_CONTROL2 0x00400820 |
200 | #define NV04_PGRAPH_BLEND 0x00400824 |
201 | #define NV04_PGRAPH_STORED_FMT 0x00400830 |
202 | #define NV04_PGRAPH_PATT_COLORRAM 0x00400900 |
203 | #define NV20_PGRAPH_TILE(i) (0x00400900 + (i*16)) |
204 | #define NV20_PGRAPH_TLIMIT(i) (0x00400904 + (i*16)) |
205 | #define NV20_PGRAPH_TSIZE(i) (0x00400908 + (i*16)) |
206 | #define NV20_PGRAPH_TSTATUS(i) (0x0040090C + (i*16)) |
207 | #define NV20_PGRAPH_ZCOMP(i) (0x00400980 + 4*(i)) |
208 | #define NV41_PGRAPH_ZCOMP0(i) (0x004009c0 + 4*(i)) |
209 | #define NV10_PGRAPH_TILE(i) (0x00400B00 + (i*16)) |
210 | #define NV10_PGRAPH_TLIMIT(i) (0x00400B04 + (i*16)) |
211 | #define NV10_PGRAPH_TSIZE(i) (0x00400B08 + (i*16)) |
212 | #define NV10_PGRAPH_TSTATUS(i) (0x00400B0C + (i*16)) |
213 | #define NV04_PGRAPH_U_RAM 0x00400D00 |
214 | #define NV47_PGRAPH_TILE(i) (0x00400D00 + (i*16)) |
215 | #define NV47_PGRAPH_TLIMIT(i) (0x00400D04 + (i*16)) |
216 | #define NV47_PGRAPH_TSIZE(i) (0x00400D08 + (i*16)) |
217 | #define NV47_PGRAPH_TSTATUS(i) (0x00400D0C + (i*16)) |
218 | #define NV04_PGRAPH_V_RAM 0x00400D40 |
219 | #define NV04_PGRAPH_W_RAM 0x00400D80 |
220 | #define NV47_PGRAPH_ZCOMP0(i) (0x00400e00 + 4*(i)) |
221 | #define NV10_PGRAPH_COMBINER0_IN_ALPHA 0x00400E40 |
222 | #define NV10_PGRAPH_COMBINER1_IN_ALPHA 0x00400E44 |
223 | #define NV10_PGRAPH_COMBINER0_IN_RGB 0x00400E48 |
224 | #define NV10_PGRAPH_COMBINER1_IN_RGB 0x00400E4C |
225 | #define NV10_PGRAPH_COMBINER_COLOR0 0x00400E50 |
226 | #define NV10_PGRAPH_COMBINER_COLOR1 0x00400E54 |
227 | #define NV10_PGRAPH_COMBINER0_OUT_ALPHA 0x00400E58 |
228 | #define NV10_PGRAPH_COMBINER1_OUT_ALPHA 0x00400E5C |
229 | #define NV10_PGRAPH_COMBINER0_OUT_RGB 0x00400E60 |
230 | #define NV10_PGRAPH_COMBINER1_OUT_RGB 0x00400E64 |
231 | #define NV10_PGRAPH_COMBINER_FINAL0 0x00400E68 |
232 | #define NV10_PGRAPH_COMBINER_FINAL1 0x00400E6C |
233 | #define NV10_PGRAPH_WINDOWCLIP_HORIZONTAL 0x00400F00 |
234 | #define NV10_PGRAPH_WINDOWCLIP_VERTICAL 0x00400F20 |
235 | #define NV10_PGRAPH_XFMODE0 0x00400F40 |
236 | #define NV10_PGRAPH_XFMODE1 0x00400F44 |
237 | #define NV10_PGRAPH_GLOBALSTATE0 0x00400F48 |
238 | #define NV10_PGRAPH_GLOBALSTATE1 0x00400F4C |
239 | #define NV10_PGRAPH_PIPE_ADDRESS 0x00400F50 |
240 | #define NV10_PGRAPH_PIPE_DATA 0x00400F54 |
241 | #define NV04_PGRAPH_DMA_START_0 0x00401000 |
242 | #define NV04_PGRAPH_DMA_START_1 0x00401004 |
243 | #define NV04_PGRAPH_DMA_LENGTH 0x00401008 |
244 | #define NV04_PGRAPH_DMA_MISC 0x0040100C |
245 | #define NV04_PGRAPH_DMA_DATA_0 0x00401020 |
246 | #define NV04_PGRAPH_DMA_DATA_1 0x00401024 |
247 | #define NV04_PGRAPH_DMA_RM 0x00401030 |
248 | #define NV04_PGRAPH_DMA_A_XLATE_INST 0x00401040 |
249 | #define NV04_PGRAPH_DMA_A_CONTROL 0x00401044 |
250 | #define NV04_PGRAPH_DMA_A_LIMIT 0x00401048 |
251 | #define NV04_PGRAPH_DMA_A_TLB_PTE 0x0040104C |
252 | #define NV04_PGRAPH_DMA_A_TLB_TAG 0x00401050 |
253 | #define NV04_PGRAPH_DMA_A_ADJ_OFFSET 0x00401054 |
254 | #define NV04_PGRAPH_DMA_A_OFFSET 0x00401058 |
255 | #define NV04_PGRAPH_DMA_A_SIZE 0x0040105C |
256 | #define NV04_PGRAPH_DMA_A_Y_SIZE 0x00401060 |
257 | #define NV04_PGRAPH_DMA_B_XLATE_INST 0x00401080 |
258 | #define NV04_PGRAPH_DMA_B_CONTROL 0x00401084 |
259 | #define NV04_PGRAPH_DMA_B_LIMIT 0x00401088 |
260 | #define NV04_PGRAPH_DMA_B_TLB_PTE 0x0040108C |
261 | #define NV04_PGRAPH_DMA_B_TLB_TAG 0x00401090 |
262 | #define NV04_PGRAPH_DMA_B_ADJ_OFFSET 0x00401094 |
263 | #define NV04_PGRAPH_DMA_B_OFFSET 0x00401098 |
264 | #define NV04_PGRAPH_DMA_B_SIZE 0x0040109C |
265 | #define NV04_PGRAPH_DMA_B_Y_SIZE 0x004010A0 |
266 | #define NV47_PGRAPH_ZCOMP1(i) (0x004068c0 + 4*(i)) |
267 | #define NV40_PGRAPH_TILE1(i) (0x00406900 + (i*16)) |
268 | #define NV40_PGRAPH_TLIMIT1(i) (0x00406904 + (i*16)) |
269 | #define NV40_PGRAPH_TSIZE1(i) (0x00406908 + (i*16)) |
270 | #define NV40_PGRAPH_TSTATUS1(i) (0x0040690C + (i*16)) |
271 | #define NV40_PGRAPH_ZCOMP1(i) (0x00406980 + 4*(i)) |
272 | #define NV41_PGRAPH_ZCOMP1(i) (0x004069c0 + 4*(i)) |
273 | |
274 | #endif |
275 | |