1/* $NetBSD: twa.c,v 1.55 2016/09/27 12:04:16 pgoyette Exp $ */
2/* $wasabi: twa.c,v 1.27 2006/07/28 18:17:21 wrstuden Exp $ */
3
4/*-
5 * Copyright (c) 2004 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Jordan Rhody of Wasabi Systems, Inc.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33/*-
34 * Copyright (c) 2003-04 3ware, Inc.
35 * Copyright (c) 2000 Michael Smith
36 * Copyright (c) 2000 BSDi
37 * All rights reserved.
38 *
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
41 * are met:
42 * 1. Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * 2. Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in the
46 * documentation and/or other materials provided with the distribution.
47 *
48 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
49 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
50 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
51 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
52 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
53 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
54 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
55 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
56 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
57 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
58 * SUCH DAMAGE.
59 *
60 * $FreeBSD: src/sys/dev/twa/twa.c,v 1.2 2004/04/02 15:09:57 des Exp $
61 */
62
63/*
64 * 3ware driver for 9000 series storage controllers.
65 *
66 * Author: Vinod Kashyap
67 */
68
69#include <sys/cdefs.h>
70__KERNEL_RCSID(0, "$NetBSD: twa.c,v 1.55 2016/09/27 12:04:16 pgoyette Exp $");
71
72//#define TWA_DEBUG
73
74#include <sys/param.h>
75#include <sys/systm.h>
76#include <sys/kernel.h>
77#include <sys/device.h>
78#include <sys/queue.h>
79#include <sys/proc.h>
80#include <sys/bswap.h>
81#include <sys/buf.h>
82#include <sys/bufq.h>
83#include <sys/endian.h>
84#include <sys/malloc.h>
85#include <sys/conf.h>
86#include <sys/disk.h>
87#include <sys/sysctl.h>
88#include <sys/syslog.h>
89#include <sys/module.h>
90#include <sys/bus.h>
91
92#include <dev/pci/pcireg.h>
93#include <dev/pci/pcivar.h>
94#include <dev/pci/pcidevs.h>
95#include <dev/pci/twareg.h>
96#include <dev/pci/twavar.h>
97#include <dev/pci/twaio.h>
98
99#include <dev/scsipi/scsipi_all.h>
100#include <dev/scsipi/scsipi_disk.h>
101#include <dev/scsipi/scsipiconf.h>
102#include <dev/scsipi/scsi_spc.h>
103
104#include <dev/ldvar.h>
105
106#include "locators.h"
107#include "ioconf.h"
108
109#define PCI_CBIO 0x10
110
111static int twa_fetch_aen(struct twa_softc *);
112static void twa_aen_callback(struct twa_request *);
113static int twa_find_aen(struct twa_softc *sc, uint16_t);
114static uint16_t twa_enqueue_aen(struct twa_softc *sc,
115 struct twa_command_header *);
116
117static void twa_attach(device_t, device_t, void *);
118static int twa_request_bus_scan(device_t, const char *, const int *);
119static void twa_shutdown(void *);
120static int twa_init_connection(struct twa_softc *, uint16_t, uint32_t,
121 uint16_t, uint16_t, uint16_t, uint16_t,
122 uint16_t *, uint16_t *, uint16_t *,
123 uint16_t *, uint32_t *);
124static int twa_intr(void *);
125static int twa_match(device_t, cfdata_t, void *);
126static int twa_reset(struct twa_softc *);
127
128static int twa_print(void *, const char *);
129static int twa_soft_reset(struct twa_softc *);
130
131static int twa_check_ctlr_state(struct twa_softc *, uint32_t);
132static int twa_get_param(struct twa_softc *, int, int, size_t,
133 void (* callback)(struct twa_request *),
134 struct twa_param_9k **);
135static int twa_set_param(struct twa_softc *, int, int, int, void *,
136 void (* callback)(struct twa_request *));
137static void twa_describe_controller(struct twa_softc *);
138static int twa_wait_status(struct twa_softc *, uint32_t, uint32_t);
139static int twa_done(struct twa_softc *);
140
141extern struct cfdriver twa_cd;
142extern uint32_t twa_fw_img_size;
143extern uint8_t twa_fw_img[];
144
145CFATTACH_DECL3_NEW(twa, sizeof(struct twa_softc),
146 twa_match, twa_attach, NULL, NULL, twa_request_bus_scan, NULL, 0);
147
148/* FreeBSD driver revision for sysctl expected by the 3ware cli */
149const char twaver[] = "1.50.01.002";
150
151/* AEN messages. */
152static const struct twa_message twa_aen_table[] = {
153 {0x0000, "AEN queue empty"},
154 {0x0001, "Controller reset occurred"},
155 {0x0002, "Degraded unit detected"},
156 {0x0003, "Controller error occured"},
157 {0x0004, "Background rebuild failed"},
158 {0x0005, "Background rebuild done"},
159 {0x0006, "Incomplete unit detected"},
160 {0x0007, "Background initialize done"},
161 {0x0008, "Unclean shutdown detected"},
162 {0x0009, "Drive timeout detected"},
163 {0x000A, "Drive error detected"},
164 {0x000B, "Rebuild started"},
165 {0x000C, "Background initialize started"},
166 {0x000D, "Entire logical unit was deleted"},
167 {0x000E, "Background initialize failed"},
168 {0x000F, "SMART attribute exceeded threshold"},
169 {0x0010, "Power supply reported AC under range"},
170 {0x0011, "Power supply reported DC out of range"},
171 {0x0012, "Power supply reported a malfunction"},
172 {0x0013, "Power supply predicted malfunction"},
173 {0x0014, "Battery charge is below threshold"},
174 {0x0015, "Fan speed is below threshold"},
175 {0x0016, "Temperature sensor is above threshold"},
176 {0x0017, "Power supply was removed"},
177 {0x0018, "Power supply was inserted"},
178 {0x0019, "Drive was removed from a bay"},
179 {0x001A, "Drive was inserted into a bay"},
180 {0x001B, "Drive bay cover door was opened"},
181 {0x001C, "Drive bay cover door was closed"},
182 {0x001D, "Product case was opened"},
183 {0x0020, "Prepare for shutdown (power-off)"},
184 {0x0021, "Downgrade UDMA mode to lower speed"},
185 {0x0022, "Upgrade UDMA mode to higher speed"},
186 {0x0023, "Sector repair completed"},
187 {0x0024, "Sbuf memory test failed"},
188 {0x0025, "Error flushing cached write data to disk"},
189 {0x0026, "Drive reported data ECC error"},
190 {0x0027, "DCB has checksum error"},
191 {0x0028, "DCB version is unsupported"},
192 {0x0029, "Background verify started"},
193 {0x002A, "Background verify failed"},
194 {0x002B, "Background verify done"},
195 {0x002C, "Bad sector overwritten during rebuild"},
196 {0x002D, "Source drive error occurred"},
197 {0x002E, "Replace failed because replacement drive too small"},
198 {0x002F, "Verify failed because array was never initialized"},
199 {0x0030, "Unsupported ATA drive"},
200 {0x0031, "Synchronize host/controller time"},
201 {0x0032, "Spare capacity is inadequate for some units"},
202 {0x0033, "Background migration started"},
203 {0x0034, "Background migration failed"},
204 {0x0035, "Background migration done"},
205 {0x0036, "Verify detected and fixed data/parity mismatch"},
206 {0x0037, "SO-DIMM incompatible"},
207 {0x0038, "SO-DIMM not detected"},
208 {0x0039, "Corrected Sbuf ECC error"},
209 {0x003A, "Drive power on reset detected"},
210 {0x003B, "Background rebuild paused"},
211 {0x003C, "Background initialize paused"},
212 {0x003D, "Background verify paused"},
213 {0x003E, "Background migration paused"},
214 {0x003F, "Corrupt flash file system detected"},
215 {0x0040, "Flash file system repaired"},
216 {0x0041, "Unit number assignments were lost"},
217 {0x0042, "Error during read of primary DCB"},
218 {0x0043, "Latent error found in backup DCB"},
219 {0x0044, "Battery voltage is normal"},
220 {0x0045, "Battery voltage is low"},
221 {0x0046, "Battery voltage is high"},
222 {0x0047, "Battery voltage is too low"},
223 {0x0048, "Battery voltage is too high"},
224 {0x0049, "Battery temperature is normal"},
225 {0x004A, "Battery temperature is low"},
226 {0x004B, "Battery temperature is high"},
227 {0x004C, "Battery temperature is too low"},
228 {0x004D, "Battery temperature is too high"},
229 {0x004E, "Battery capacity test started"},
230 {0x004F, "Cache synchronization skipped"},
231 {0x0050, "Battery capacity test completed"},
232 {0x0051, "Battery health check started"},
233 {0x0052, "Battery health check completed"},
234 {0x0053, "Battery capacity test needed"},
235 {0x0054, "Battery charge termination voltage is at high level"},
236 {0x0055, "Battery charging started"},
237 {0x0056, "Battery charging completed"},
238 {0x0057, "Battery charging fault"},
239 {0x0058, "Battery capacity is below warning level"},
240 {0x0059, "Battery capacity is below error level"},
241 {0x005A, "Battery is present"},
242 {0x005B, "Battery is not present"},
243 {0x005C, "Battery is weak"},
244 {0x005D, "Battery health check failed"},
245 {0x005E, "Cache synchronized after power fail"},
246 {0x005F, "Cache synchronization failed; some data lost"},
247 {0x0060, "Bad cache meta data checksum"},
248 {0x0061, "Bad cache meta data signature"},
249 {0x0062, "Cache meta data restore failed"},
250 {0x0063, "BBU not found after power fail"},
251 {0x00FC, "Recovered/finished array membership update"},
252 {0x00FD, "Handler lockup"},
253 {0x00FE, "Retrying PCI transfer"},
254 {0x00FF, "AEN queue is full"},
255 {0xFFFFFFFF, NULL}
256};
257
258/* AEN severity table. */
259static const char *twa_aen_severity_table[] = {
260 "None",
261 "ERROR",
262 "WARNING",
263 "INFO",
264 "DEBUG",
265 NULL
266};
267
268#if 0
269/* Error messages. */
270static const struct twa_message twa_error_table[] = {
271 {0x0100, "SGL entry contains zero data"},
272 {0x0101, "Invalid command opcode"},
273 {0x0102, "SGL entry has unaligned address"},
274 {0x0103, "SGL size does not match command"},
275 {0x0104, "SGL entry has illegal length"},
276 {0x0105, "Command packet is not aligned"},
277 {0x0106, "Invalid request ID"},
278 {0x0107, "Duplicate request ID"},
279 {0x0108, "ID not locked"},
280 {0x0109, "LBA out of range"},
281 {0x010A, "Logical unit not supported"},
282 {0x010B, "Parameter table does not exist"},
283 {0x010C, "Parameter index does not exist"},
284 {0x010D, "Invalid field in CDB"},
285 {0x010E, "Specified port has invalid drive"},
286 {0x010F, "Parameter item size mismatch"},
287 {0x0110, "Failed memory allocation"},
288 {0x0111, "Memory request too large"},
289 {0x0112, "Out of memory segments"},
290 {0x0113, "Invalid address to deallocate"},
291 {0x0114, "Out of memory"},
292 {0x0115, "Out of heap"},
293 {0x0120, "Double degrade"},
294 {0x0121, "Drive not degraded"},
295 {0x0122, "Reconstruct error"},
296 {0x0123, "Replace not accepted"},
297 {0x0124, "Replace drive capacity too small"},
298 {0x0125, "Sector count not allowed"},
299 {0x0126, "No spares left"},
300 {0x0127, "Reconstruct error"},
301 {0x0128, "Unit is offline"},
302 {0x0129, "Cannot update status to DCB"},
303 {0x0130, "Invalid stripe handle"},
304 {0x0131, "Handle that was not locked"},
305 {0x0132, "Handle that was not empy"},
306 {0x0133, "Handle has different owner"},
307 {0x0140, "IPR has parent"},
308 {0x0150, "Illegal Pbuf address alignment"},
309 {0x0151, "Illegal Pbuf transfer length"},
310 {0x0152, "Illegal Sbuf address alignment"},
311 {0x0153, "Illegal Sbuf transfer length"},
312 {0x0160, "Command packet too large"},
313 {0x0161, "SGL exceeds maximum length"},
314 {0x0162, "SGL has too many entries"},
315 {0x0170, "Insufficient resources for rebuilder"},
316 {0x0171, "Verify error (data != parity)"},
317 {0x0180, "Requested segment not in directory of this DCB"},
318 {0x0181, "DCB segment has unsupported version"},
319 {0x0182, "DCB segment has checksum error"},
320 {0x0183, "DCB support (settings) segment invalid"},
321 {0x0184, "DCB UDB (unit descriptor block) segment invalid"},
322 {0x0185, "DCB GUID (globally unique identifier) segment invalid"},
323 {0x01A0, "Could not clear Sbuf"},
324 {0x01C0, "Flash identify failed"},
325 {0x01C1, "Flash out of bounds"},
326 {0x01C2, "Flash verify error"},
327 {0x01C3, "Flash file object not found"},
328 {0x01C4, "Flash file already present"},
329 {0x01C5, "Flash file system full"},
330 {0x01C6, "Flash file not present"},
331 {0x01C7, "Flash file size error"},
332 {0x01C8, "Bad flash file checksum"},
333 {0x01CA, "Corrupt flash file system detected"},
334 {0x01D0, "Invalid field in parameter list"},
335 {0x01D1, "Parameter list length error"},
336 {0x01D2, "Parameter item is not changeable"},
337 {0x01D3, "Parameter item is not saveable"},
338 {0x0200, "UDMA CRC error"},
339 {0x0201, "Internal CRC error"},
340 {0x0202, "Data ECC error"},
341 {0x0203, "ADP level 1 error"},
342 {0x0204, "Port timeout"},
343 {0x0205, "Drive power on reset"},
344 {0x0206, "ADP level 2 error"},
345 {0x0207, "Soft reset failed"},
346 {0x0208, "Drive not ready"},
347 {0x0209, "Unclassified port error"},
348 {0x020A, "Drive aborted command"},
349 {0x0210, "Internal CRC error"},
350 {0x0211, "Host PCI bus abort"},
351 {0x0212, "Host PCI parity error"},
352 {0x0213, "Port handler error"},
353 {0x0214, "Token interrupt count error"},
354 {0x0215, "Timeout waiting for PCI transfer"},
355 {0x0216, "Corrected buffer ECC"},
356 {0x0217, "Uncorrected buffer ECC"},
357 {0x0230, "Unsupported command during flash recovery"},
358 {0x0231, "Next image buffer expected"},
359 {0x0232, "Binary image architecture incompatible"},
360 {0x0233, "Binary image has no signature"},
361 {0x0234, "Binary image has bad checksum"},
362 {0x0235, "Image downloaded overflowed buffer"},
363 {0x0240, "I2C device not found"},
364 {0x0241, "I2C transaction aborted"},
365 {0x0242, "SO-DIMM parameter(s) incompatible using defaults"},
366 {0x0243, "SO-DIMM unsupported"},
367 {0x0248, "SPI transfer status error"},
368 {0x0249, "SPI transfer timeout error"},
369 {0x0250, "Invalid unit descriptor size in CreateUnit"},
370 {0x0251, "Unit descriptor size exceeds data buffer in CreateUnit"},
371 {0x0252, "Invalid value in CreateUnit descriptor"},
372 {0x0253, "Inadequate disk space to support descriptor in CreateUnit"},
373 {0x0254, "Unable to create data channel for this unit descriptor"},
374 {0x0255, "CreateUnit descriptor specifies a drive already in use"},
375 {0x0256, "Unable to write configuration to all disks during CreateUnit"},
376 {0x0257, "CreateUnit does not support this descriptor version"},
377 {0x0258, "Invalid subunit for RAID 0 or 5 in CreateUnit"},
378 {0x0259, "Too many descriptors in CreateUnit"},
379 {0x025A, "Invalid configuration specified in CreateUnit descriptor"},
380 {0x025B, "Invalid LBA offset specified in CreateUnit descriptor"},
381 {0x025C, "Invalid stripelet size specified in CreateUnit descriptor"},
382 {0x0260, "SMART attribute exceeded threshold"},
383 {0xFFFFFFFF, NULL}
384};
385#endif
386
387struct twa_pci_identity {
388 uint32_t vendor_id;
389 uint32_t product_id;
390 const char *name;
391};
392
393static const struct twa_pci_identity twa_pci_products[] = {
394 { PCI_VENDOR_3WARE,
395 PCI_PRODUCT_3WARE_9000,
396 "3ware 9000 series",
397 },
398 { PCI_VENDOR_3WARE,
399 PCI_PRODUCT_3WARE_9550,
400 "3ware 9550SX series",
401 },
402 { PCI_VENDOR_3WARE,
403 PCI_PRODUCT_3WARE_9650,
404 "3ware 9650SE series",
405 },
406 { PCI_VENDOR_3WARE,
407 PCI_PRODUCT_3WARE_9690,
408 "3ware 9690 series",
409 },
410 { 0,
411 0,
412 NULL,
413 },
414};
415
416
417static inline void
418twa_outl(struct twa_softc *sc, int off, uint32_t val)
419{
420
421 bus_space_write_4(sc->twa_bus_iot, sc->twa_bus_ioh, off, val);
422 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4,
423 BUS_SPACE_BARRIER_WRITE);
424}
425
426static inline uint32_t twa_inl(struct twa_softc *sc, int off)
427{
428
429 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4,
430 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ);
431 return (bus_space_read_4(sc->twa_bus_iot, sc->twa_bus_ioh, off));
432}
433
434void
435twa_request_wait_handler(struct twa_request *tr)
436{
437
438 wakeup(tr);
439}
440
441static const struct twa_pci_identity *
442twa_lookup(pcireg_t id)
443{
444 const struct twa_pci_identity *entry;
445 int i;
446
447 for (i = 0; i < __arraycount(twa_pci_products); i++) {
448 entry = &twa_pci_products[i];
449 if (entry->vendor_id == PCI_VENDOR(id) &&
450 entry->product_id == PCI_PRODUCT(id)) {
451 return entry;
452 }
453 }
454 return NULL;
455}
456
457static int
458twa_match(device_t parent, cfdata_t cfdata, void *aux)
459{
460 struct pci_attach_args *pa = aux;
461 const struct twa_pci_identity *entry;
462
463 entry = twa_lookup(pa->pa_id);
464 if (entry != NULL) {
465 return 1;
466 }
467 return (0);
468}
469
470static const char *
471twa_find_msg_string(const struct twa_message *table, uint16_t code)
472{
473 int i;
474
475 for (i = 0; table[i].message != NULL; i++)
476 if (table[i].code == code)
477 return(table[i].message);
478
479 return(table[i].message);
480}
481
482void
483twa_release_request(struct twa_request *tr)
484{
485 int s;
486 struct twa_softc *sc;
487
488 sc = tr->tr_sc;
489
490 if ((tr->tr_flags & TWA_CMD_AEN) == 0) {
491 s = splbio();
492 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_free, tr, tr_link);
493 splx(s);
494 if (__predict_false((tr->tr_sc->twa_sc_flags &
495 TWA_STATE_REQUEST_WAIT) != 0)) {
496 tr->tr_sc->twa_sc_flags &= ~TWA_STATE_REQUEST_WAIT;
497 wakeup(&sc->twa_free);
498 }
499 } else
500 tr->tr_flags &= ~TWA_CMD_AEN_BUSY;
501}
502
503static void
504twa_unmap_request(struct twa_request *tr)
505{
506 struct twa_softc *sc = tr->tr_sc;
507 uint8_t cmd_status;
508 int s;
509
510 /* If the command involved data, unmap that too. */
511 if (tr->tr_data != NULL) {
512 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K)
513 cmd_status = tr->tr_command->command.cmd_pkt_9k.status;
514 else
515 cmd_status =
516 tr->tr_command->command.cmd_pkt_7k.generic.status;
517
518 if (tr->tr_flags & TWA_CMD_DATA_OUT) {
519 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map,
520 0, tr->tr_length, BUS_DMASYNC_POSTREAD);
521 /*
522 * If we are using a bounce buffer, and we are reading
523 * data, copy the real data in.
524 */
525 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED)
526 if (cmd_status == 0)
527 memcpy(tr->tr_real_data, tr->tr_data,
528 tr->tr_real_length);
529 }
530 if (tr->tr_flags & TWA_CMD_DATA_IN)
531 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map,
532 0, tr->tr_length, BUS_DMASYNC_POSTWRITE);
533
534 bus_dmamap_unload(sc->twa_dma_tag, tr->tr_dma_map);
535 }
536
537 /* Free alignment buffer if it was used. */
538 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) {
539 s = splvm();
540 uvm_km_kmem_free(kmem_va_arena, (vaddr_t)tr->tr_data,
541 tr->tr_length);
542 splx(s);
543 tr->tr_data = tr->tr_real_data;
544 tr->tr_length = tr->tr_real_length;
545 }
546}
547
548/*
549 * Function name: twa_wait_request
550 * Description: Sends down a firmware cmd, and waits for the completion,
551 * but NOT in a tight loop.
552 *
553 * Input: tr -- ptr to request pkt
554 * timeout -- max # of seconds to wait before giving up
555 * Output: None
556 * Return value: 0 -- success
557 * non-zero-- failure
558 */
559static int
560twa_wait_request(struct twa_request *tr, uint32_t timeout)
561{
562 time_t end_time;
563 struct timeval t1;
564 int s, rv;
565
566 tr->tr_flags |= TWA_CMD_SLEEP_ON_REQUEST;
567 tr->tr_callback = twa_request_wait_handler;
568 tr->tr_status = TWA_CMD_BUSY;
569
570 rv = twa_map_request(tr);
571
572 if (rv != 0)
573 return (rv);
574
575 microtime(&t1);
576 end_time = t1.tv_usec +
577 (timeout * 1000 * 100);
578
579 while (tr->tr_status != TWA_CMD_COMPLETE) {
580 rv = tr->tr_error;
581 if (rv != 0)
582 return(rv);
583 if ((rv = tsleep(tr, PRIBIO, "twawait", timeout * hz)) == 0)
584 break;
585
586 if (rv == EWOULDBLOCK) {
587 /*
588 * We will reset the controller only if the request has
589 * already been submitted, so as to not lose the
590 * request packet. If a busy request timed out, the
591 * reset will take care of freeing resources. If a
592 * pending request timed out, we will free resources
593 * for that request, right here. So, the caller is
594 * expected to NOT cleanup when ETIMEDOUT is returned.
595 */
596 if (tr->tr_status == TWA_CMD_BUSY)
597 twa_reset(tr->tr_sc);
598 else {
599 /* Request was never submitted. Clean up. */
600 s = splbio();
601 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr,
602 tr_link);
603 splx(s);
604
605 twa_unmap_request(tr);
606 if (tr->tr_data)
607 free(tr->tr_data, M_DEVBUF);
608
609 twa_release_request(tr);
610 }
611 return(ETIMEDOUT);
612 }
613 /*
614 * Either the request got completed, or we were woken up by a
615 * signal. Calculate the new timeout, in case it was the
616 * latter.
617 */
618 microtime(&t1);
619
620 timeout = (end_time - t1.tv_usec) / (1000 * 100);
621 }
622 return(rv);
623}
624
625/*
626 * Function name: twa_immediate_request
627 * Description: Sends down a firmware cmd, and waits for the completion
628 * in a tight loop.
629 *
630 * Input: tr -- ptr to request pkt
631 * timeout -- max # of seconds to wait before giving up
632 * Output: None
633 * Return value: 0 -- success
634 * non-zero-- failure
635 */
636static int
637twa_immediate_request(struct twa_request *tr, uint32_t timeout)
638{
639 struct timeval t1;
640 int s = 0, rv = 0;
641
642 rv = twa_map_request(tr);
643
644 if (rv != 0)
645 return(rv);
646
647 timeout = (timeout * 10000 * 10);
648
649 microtime(&t1);
650
651 timeout += t1.tv_usec;
652
653 do {
654 rv = tr->tr_error;
655 if (rv != 0)
656 return(rv);
657 s = splbio();
658 twa_done(tr->tr_sc);
659 splx(s);
660 if (tr->tr_status == TWA_CMD_COMPLETE)
661 return(rv);
662 microtime(&t1);
663 } while (t1.tv_usec <= timeout);
664
665 /*
666 * We will reset the controller only if the request has
667 * already been submitted, so as to not lose the
668 * request packet. If a busy request timed out, the
669 * reset will take care of freeing resources. If a
670 * pending request timed out, we will free resources
671 * for that request, right here. So, the caller is
672 * expected to NOT cleanup when ETIMEDOUT is returned.
673 */
674 rv = ETIMEDOUT;
675
676 if (tr->tr_status == TWA_CMD_BUSY)
677 twa_reset(tr->tr_sc);
678 else {
679 /* Request was never submitted. Clean up. */
680 s = splbio();
681 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, tr_link);
682 splx(s);
683 twa_unmap_request(tr);
684 if (tr->tr_data)
685 free(tr->tr_data, M_DEVBUF);
686
687 twa_release_request(tr);
688 }
689 return (rv);
690}
691
692static int
693twa_inquiry(struct twa_request *tr, int lunid)
694{
695 int error;
696 struct twa_command_9k *tr_9k_cmd;
697
698 if (tr->tr_data == NULL)
699 return (ENOMEM);
700
701 memset(tr->tr_data, 0, TWA_SECTOR_SIZE);
702
703 tr->tr_length = TWA_SECTOR_SIZE;
704 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K;
705 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT;
706
707 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k;
708
709 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND;
710 tr_9k_cmd->unit = lunid;
711 tr_9k_cmd->request_id = tr->tr_request_id;
712 tr_9k_cmd->status = 0;
713 tr_9k_cmd->sgl_offset = 16;
714 tr_9k_cmd->sgl_entries = 1;
715 /* create the CDB here */
716 tr_9k_cmd->cdb[0] = INQUIRY;
717 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e);
718 tr_9k_cmd->cdb[4] = 255;
719
720 /* XXXX setup page data no lun device
721 * it seems 9000 series does not indicate
722 * NOTPRESENT - need more investigation
723 */
724 ((struct scsipi_inquiry_data *)tr->tr_data)->device =
725 SID_QUAL_LU_NOTPRESENT;
726
727 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD);
728 if (error != 0)
729 return (error);
730
731 if (((struct scsipi_inquiry_data *)tr->tr_data)->device ==
732 SID_QUAL_LU_NOTPRESENT)
733 error = 1;
734
735 return (error);
736}
737
738static int
739twa_print_inquiry_data(struct twa_softc *sc, struct scsipi_inquiry_data *scsipi)
740{
741
742 printf("%s: %s\n", device_xname(sc->twa_dv), scsipi->vendor);
743
744 return (1);
745}
746
747
748static uint64_t
749twa_read_capacity(struct twa_request *tr, int lunid)
750{
751 int error;
752 struct twa_command_9k *tr_9k_cmd;
753 uint64_t array_size = 0LL;
754
755 if (tr->tr_data == NULL)
756 return (ENOMEM);
757
758 memset(tr->tr_data, 0, TWA_SECTOR_SIZE);
759
760 tr->tr_length = TWA_SECTOR_SIZE;
761 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K;
762 tr->tr_flags |= TWA_CMD_DATA_OUT;
763
764 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k;
765
766 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND;
767 tr_9k_cmd->unit = lunid;
768 tr_9k_cmd->request_id = tr->tr_request_id;
769 tr_9k_cmd->status = 0;
770 tr_9k_cmd->sgl_offset = 16;
771 tr_9k_cmd->sgl_entries = 1;
772 /* create the CDB here */
773 tr_9k_cmd->cdb[0] = READ_CAPACITY_16;
774 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e) | SRC16_SERVICE_ACTION;
775
776 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD);
777
778 if (error == 0) {
779#if BYTE_ORDER == BIG_ENDIAN
780 array_size = bswap64(_8btol(
781 ((struct scsipi_read_capacity_16_data *)tr->tr_data)->addr) + 1);
782#else
783 array_size = _8btol(((struct scsipi_read_capacity_16_data *)
784 tr->tr_data)->addr) + 1;
785#endif
786 }
787 return (array_size);
788}
789
790static int
791twa_request_sense(struct twa_request *tr, int lunid)
792{
793 int error = 1;
794 struct twa_command_9k *tr_9k_cmd;
795
796 if (tr->tr_data == NULL)
797 return (error);
798
799 memset(tr->tr_data, 0, TWA_SECTOR_SIZE);
800
801 tr->tr_length = TWA_SECTOR_SIZE;
802 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K;
803 tr->tr_flags |= TWA_CMD_DATA_OUT;
804
805 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k;
806
807 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND;
808 tr_9k_cmd->unit = lunid;
809 tr_9k_cmd->request_id = tr->tr_request_id;
810 tr_9k_cmd->status = 0;
811 tr_9k_cmd->sgl_offset = 16;
812 tr_9k_cmd->sgl_entries = 1;
813 /* create the CDB here */
814 tr_9k_cmd->cdb[0] = SCSI_REQUEST_SENSE;
815 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e);
816 tr_9k_cmd->cdb[4] = 255;
817
818 /*XXX AEN notification called in interrupt context
819 * so just queue the request. Return as quickly
820 * as possible from interrupt
821 */
822 if ((tr->tr_flags & TWA_CMD_AEN) != 0)
823 error = twa_map_request(tr);
824 else
825 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD);
826
827 return (error);
828}
829
830static int
831twa_alloc_req_pkts(struct twa_softc *sc, int num_reqs)
832{
833 struct twa_request *tr;
834 struct twa_command_packet *tc;
835 bus_dma_segment_t seg;
836 size_t max_segs, max_xfer;
837 int i, rv, rseg, size;
838
839 if ((sc->sc_units = malloc(sc->sc_nunits *
840 sizeof(struct twa_drive), M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL)
841 return(ENOMEM);
842
843 if ((sc->twa_req_buf = malloc(num_reqs * sizeof(struct twa_request),
844 M_DEVBUF, M_NOWAIT)) == NULL)
845 return(ENOMEM);
846
847 size = num_reqs * sizeof(struct twa_command_packet);
848
849 /* Allocate memory for cmd pkts. */
850 if ((rv = bus_dmamem_alloc(sc->twa_dma_tag,
851 size, PAGE_SIZE, 0, &seg,
852 1, &rseg, BUS_DMA_NOWAIT)) != 0){
853 aprint_error_dev(sc->twa_dv, "unable to allocate "
854 "command packets, rv = %d\n", rv);
855 return (ENOMEM);
856 }
857
858 if ((rv = bus_dmamem_map(sc->twa_dma_tag,
859 &seg, rseg, size, (void **)&sc->twa_cmds,
860 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
861 aprint_error_dev(sc->twa_dv,
862 "unable to map commands, rv = %d\n", rv);
863 return (1);
864 }
865
866 if ((rv = bus_dmamap_create(sc->twa_dma_tag,
867 size, num_reqs, size,
868 0, BUS_DMA_NOWAIT, &sc->twa_cmd_map)) != 0) {
869 aprint_error_dev(sc->twa_dv,
870 "unable to create command DMA map, "
871 "rv = %d\n", rv);
872 return (ENOMEM);
873 }
874
875 if ((rv = bus_dmamap_load(sc->twa_dma_tag, sc->twa_cmd_map,
876 sc->twa_cmds, size, NULL,
877 BUS_DMA_NOWAIT)) != 0) {
878 aprint_error_dev(sc->twa_dv,
879 "unable to load command DMA map, rv = %d\n", rv);
880 return (1);
881 }
882
883 if ((uintptr_t)sc->twa_cmds % TWA_ALIGNMENT) {
884 aprint_error_dev(sc->twa_dv,
885 "DMA map memory not aligned on %d boundary\n",
886 TWA_ALIGNMENT);
887
888 return (1);
889 }
890 tc = sc->twa_cmd_pkt_buf = (struct twa_command_packet *)sc->twa_cmds;
891 sc->twa_cmd_pkt_phys = sc->twa_cmd_map->dm_segs[0].ds_addr;
892
893 memset(sc->twa_req_buf, 0, num_reqs * sizeof(struct twa_request));
894 memset(sc->twa_cmd_pkt_buf, 0,
895 num_reqs * sizeof(struct twa_command_packet));
896
897 sc->sc_twa_request = sc->twa_req_buf;
898 max_segs = twa_get_maxsegs();
899 max_xfer = twa_get_maxxfer(max_segs);
900
901 for (i = 0; i < num_reqs; i++, tc++) {
902 tr = &(sc->twa_req_buf[i]);
903 tr->tr_command = tc;
904 tr->tr_cmd_phys = sc->twa_cmd_pkt_phys +
905 (i * sizeof(struct twa_command_packet));
906 tr->tr_request_id = i;
907 tr->tr_sc = sc;
908
909 /*
910 * Create a map for data buffers. maxsize (256 * 1024) used in
911 * bus_dma_tag_create above should suffice the bounce page needs
912 * for data buffers, since the max I/O size we support is 128KB.
913 * If we supported I/O's bigger than 256KB, we would have to
914 * create a second dma_tag, with the appropriate maxsize.
915 */
916 if ((rv = bus_dmamap_create(sc->twa_dma_tag,
917 max_xfer, max_segs, 1, 0, BUS_DMA_NOWAIT,
918 &tr->tr_dma_map)) != 0) {
919 aprint_error_dev(sc->twa_dv,
920 "unable to create command DMA map, "
921 "rv = %d\n", rv);
922 return (ENOMEM);
923 }
924 /* Insert request into the free queue. */
925 if (i != 0) {
926 sc->twa_lookup[i] = tr;
927 twa_release_request(tr);
928 } else
929 tr->tr_flags |= TWA_CMD_AEN;
930 }
931 return(0);
932}
933
934static void
935twa_recompute_openings(struct twa_softc *sc)
936{
937 struct twa_drive *td;
938 int unit;
939 int openings;
940 uint64_t total_size;
941
942 total_size = 0;
943 for (unit = 0; unit < sc->sc_nunits; unit++) {
944 td = &sc->sc_units[unit];
945 total_size += td->td_size;
946 }
947
948 for (unit = 0; unit < sc->sc_nunits; unit++) {
949 td = &sc->sc_units[unit];
950 /*
951 * In theory, TWA_Q_LENGTH - 1 should be usable, but
952 * keep one additional ccb for internal commands.
953 * This makes the controller more reliable under load.
954 */
955 if (total_size > 0) {
956 openings = (TWA_Q_LENGTH - 2) * td->td_size
957 / total_size;
958 } else
959 openings = 0;
960
961 if (openings == td->td_openings)
962 continue;
963 td->td_openings = openings;
964
965#ifdef TWA_DEBUG
966 printf("%s: unit %d openings %d\n",
967 device_xname(sc->twa_dv), unit, openings);
968#endif
969 if (td->td_dev != NULL)
970 (*td->td_callbacks->tcb_openings)(td->td_dev,
971 td->td_openings);
972 }
973}
974
975/* ARGSUSED */
976static int
977twa_request_bus_scan(device_t self, const char *attr, const int *flags)
978{
979 struct twa_softc *sc = device_private(self);
980 struct twa_drive *td;
981 struct twa_request *tr;
982 struct twa_attach_args twaa;
983 int locs[TWACF_NLOCS];
984 int s, unit;
985
986 s = splbio();
987 for (unit = 0; unit < sc->sc_nunits; unit++) {
988
989 if ((tr = twa_get_request(sc, 0)) == NULL) {
990 splx(s);
991 return (EIO);
992 }
993
994 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL;
995
996 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT);
997
998 if (tr->tr_data == NULL) {
999 twa_release_request(tr);
1000 splx(s);
1001 return (ENOMEM);
1002 }
1003 td = &sc->sc_units[unit];
1004
1005 if (twa_inquiry(tr, unit) == 0) {
1006 if (td->td_dev == NULL) {
1007 twa_print_inquiry_data(sc,
1008 ((struct scsipi_inquiry_data *)tr->tr_data));
1009
1010 sc->sc_units[unit].td_size =
1011 twa_read_capacity(tr, unit);
1012
1013 twaa.twaa_unit = unit;
1014
1015 twa_recompute_openings(sc);
1016
1017 locs[TWACF_UNIT] = unit;
1018
1019 sc->sc_units[unit].td_dev =
1020 config_found_sm_loc(sc->twa_dv, attr,
1021 locs, &twaa, twa_print, config_stdsubmatch);
1022 }
1023 } else {
1024 if (td->td_dev != NULL) {
1025 (void) config_detach(td->td_dev, DETACH_FORCE);
1026 td->td_dev = NULL;
1027 td->td_size = 0;
1028
1029 twa_recompute_openings(sc);
1030 }
1031 }
1032 free(tr->tr_data, M_DEVBUF);
1033
1034 twa_release_request(tr);
1035 }
1036 splx(s);
1037
1038 return (0);
1039}
1040
1041
1042#ifdef DIAGNOSTIC
1043static inline void
1044twa_check_busy_q(struct twa_request *tr)
1045{
1046 struct twa_request *rq;
1047 struct twa_softc *sc = tr->tr_sc;
1048
1049 TAILQ_FOREACH(rq, &sc->twa_busy, tr_link) {
1050 if (tr->tr_request_id == rq->tr_request_id) {
1051 panic("cannot submit same request more than once");
1052 } else if (tr->bp == rq->bp && tr->bp != 0) {
1053 /* XXX A check for 0 for the buf ptr is needed to
1054 * guard against ioctl requests with a buf ptr of
1055 * 0 and also aen notifications. Looking for
1056 * external cmds only.
1057 */
1058 panic("cannot submit same buf more than once");
1059 } else {
1060 /* Empty else statement */
1061 }
1062 }
1063}
1064#endif
1065
1066static int
1067twa_start(struct twa_request *tr)
1068{
1069 struct twa_softc *sc = tr->tr_sc;
1070 uint32_t status_reg;
1071 int s;
1072 int error;
1073
1074 s = splbio();
1075
1076 /*
1077 * The 9650 and 9690 have a bug in the detection of the full queue
1078 * condition.
1079 *
1080 * If a write operation has filled the queue and is directly followed
1081 * by a status read, it sometimes doesn't return the correct result.
1082 * To work around this, the upper 32bit are written first.
1083 * This effectively serialises the hardware, but does not change
1084 * the state of the queue.
1085 */
1086 if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) {
1087 /* Write lower 32 bits of address */
1088 TWA_WRITE_COMMAND_QUEUE_LOW(sc, tr->tr_cmd_phys +
1089 sizeof(struct twa_command_header));
1090 }
1091
1092 /* Check to see if we can post a command. */
1093 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
1094 if ((error = twa_check_ctlr_state(sc, status_reg)))
1095 goto out;
1096
1097 if (status_reg & TWA_STATUS_COMMAND_QUEUE_FULL) {
1098 if (tr->tr_status != TWA_CMD_PENDING) {
1099 tr->tr_status = TWA_CMD_PENDING;
1100 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_pending,
1101 tr, tr_link);
1102 }
1103 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1104 TWA_CONTROL_UNMASK_COMMAND_INTERRUPT);
1105 error = EBUSY;
1106 } else {
1107 bus_dmamap_sync(sc->twa_dma_tag, sc->twa_cmd_map,
1108 (char *)tr->tr_command - (char *)sc->twa_cmds,
1109 sizeof(struct twa_command_packet),
1110 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1111
1112 if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) {
1113 /*
1114 * Cmd queue is not full. Post the command
1115 * by writing upper 32 bits of address.
1116 */
1117 TWA_WRITE_COMMAND_QUEUE_HIGH(sc, tr->tr_cmd_phys +
1118 sizeof(struct twa_command_header));
1119 } else {
1120 /* Cmd queue is not full. Post the command. */
1121 TWA_WRITE_COMMAND_QUEUE(sc, tr->tr_cmd_phys +
1122 sizeof(struct twa_command_header));
1123 }
1124
1125 /* Mark the request as currently being processed. */
1126 tr->tr_status = TWA_CMD_BUSY;
1127
1128#ifdef DIAGNOSTIC
1129 twa_check_busy_q(tr);
1130#endif
1131
1132 /* Move the request into the busy queue. */
1133 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_busy, tr, tr_link);
1134 }
1135out:
1136 splx(s);
1137 return(error);
1138}
1139
1140static int
1141twa_drain_response_queue(struct twa_softc *sc)
1142{
1143 uint32_t status_reg;
1144
1145 for (;;) {
1146 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
1147 if (twa_check_ctlr_state(sc, status_reg))
1148 return(1);
1149 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY)
1150 return(0); /* no more response queue entries */
1151 (void)twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET);
1152 }
1153}
1154
1155/*
1156 * twa_drain_response_queue_large:
1157 *
1158 * specific to the 9550 and 9650 controller to remove requests.
1159 *
1160 * Removes all requests from "large" response queue on the 9550 controller.
1161 * This procedure is called as part of the 9550 controller reset sequence.
1162 */
1163static int
1164twa_drain_response_queue_large(struct twa_softc *sc, uint32_t timeout)
1165{
1166 uint32_t start_time = 0, end_time;
1167 uint32_t response = 0;
1168
1169 if (sc->sc_product_id == PCI_PRODUCT_3WARE_9550 ||
1170 sc->sc_product_id == PCI_PRODUCT_3WARE_9650 ) {
1171 start_time = 0;
1172 end_time = (timeout * TWA_MICROSECOND);
1173
1174 while ((response &
1175 TWA_9550SX_DRAIN_COMPLETE) != TWA_9550SX_DRAIN_COMPLETE) {
1176 response = twa_inl(sc, TWA_RESPONSE_QUEUE_LARGE_OFFSET);
1177 if (start_time >= end_time)
1178 return (1);
1179 DELAY(1);
1180 start_time++;
1181 }
1182 /* P-chip delay */
1183 DELAY(500000);
1184 }
1185 return (0);
1186}
1187
1188static void
1189twa_drain_busy_queue(struct twa_softc *sc)
1190{
1191 struct twa_request *tr;
1192
1193 /* Walk the busy queue. */
1194
1195 while ((tr = TAILQ_FIRST(&sc->twa_busy)) != NULL) {
1196 TAILQ_REMOVE(&sc->twa_busy, tr, tr_link);
1197
1198 twa_unmap_request(tr);
1199 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_INTERNAL) ||
1200 (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_IOCTL)) {
1201 /* It's an internal/ioctl request. Simply free it. */
1202 if (tr->tr_data)
1203 free(tr->tr_data, M_DEVBUF);
1204 twa_release_request(tr);
1205 } else {
1206 /* It's a SCSI request. Complete it. */
1207 tr->tr_command->command.cmd_pkt_9k.status = EIO;
1208 if (tr->tr_callback)
1209 tr->tr_callback(tr);
1210 }
1211 }
1212}
1213
1214static int
1215twa_drain_pending_queue(struct twa_softc *sc)
1216{
1217 struct twa_request *tr;
1218 int s, error = 0;
1219
1220 /*
1221 * Pull requests off the pending queue, and submit them.
1222 */
1223 s = splbio();
1224 while ((tr = TAILQ_FIRST(&sc->twa_pending)) != NULL) {
1225 TAILQ_REMOVE(&sc->twa_pending, tr, tr_link);
1226
1227 if ((error = twa_start(tr))) {
1228 if (error == EBUSY) {
1229 tr->tr_status = TWA_CMD_PENDING;
1230
1231 /* queue at the head */
1232 TAILQ_INSERT_HEAD(&tr->tr_sc->twa_pending,
1233 tr, tr_link);
1234 error = 0;
1235 break;
1236 } else {
1237 if (tr->tr_flags & TWA_CMD_SLEEP_ON_REQUEST) {
1238 tr->tr_error = error;
1239 tr->tr_callback(tr);
1240 error = EIO;
1241 }
1242 }
1243 }
1244 }
1245 splx(s);
1246
1247 return(error);
1248}
1249
1250static int
1251twa_drain_aen_queue(struct twa_softc *sc)
1252{
1253 int s, error = 0;
1254 struct twa_request *tr;
1255 struct twa_command_header *cmd_hdr;
1256 struct timeval t1;
1257 uint32_t timeout;
1258
1259 for (;;) {
1260 if ((tr = twa_get_request(sc, 0)) == NULL) {
1261 error = EIO;
1262 break;
1263 }
1264 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL;
1265 tr->tr_callback = NULL;
1266
1267 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT);
1268
1269 if (tr->tr_data == NULL) {
1270 error = 1;
1271 goto out;
1272 }
1273
1274 if (twa_request_sense(tr, 0) != 0) {
1275 error = 1;
1276 break;
1277 }
1278
1279 timeout = (1000/*ms*/ * 100/*us*/ * TWA_REQUEST_TIMEOUT_PERIOD);
1280
1281 microtime(&t1);
1282
1283 timeout += t1.tv_usec;
1284
1285 do {
1286 s = splbio();
1287 twa_done(tr->tr_sc);
1288 splx(s);
1289 if (tr->tr_status != TWA_CMD_BUSY)
1290 break;
1291 microtime(&t1);
1292 } while (t1.tv_usec <= timeout);
1293
1294 if (tr->tr_status != TWA_CMD_COMPLETE) {
1295 error = ETIMEDOUT;
1296 break;
1297 }
1298
1299 if ((error = tr->tr_command->command.cmd_pkt_9k.status))
1300 break;
1301
1302 cmd_hdr = (struct twa_command_header *)(tr->tr_data);
1303 if ((cmd_hdr->status_block.error) /* aen_code */
1304 == TWA_AEN_QUEUE_EMPTY)
1305 break;
1306 (void)twa_enqueue_aen(sc, cmd_hdr);
1307
1308 free(tr->tr_data, M_DEVBUF);
1309 twa_release_request(tr);
1310 }
1311out:
1312 if (tr) {
1313 if (tr->tr_data)
1314 free(tr->tr_data, M_DEVBUF);
1315
1316 twa_release_request(tr);
1317 }
1318 return(error);
1319}
1320
1321
1322#if 0
1323static void
1324twa_check_response_q(struct twa_request *tr, int clear)
1325{
1326 int j;
1327 static int i = 0;
1328 static struct twa_request *req = 0;
1329 static struct buf *hist[255];
1330
1331
1332 if (clear) {
1333 i = 0;
1334 for (j = 0; j < 255; j++)
1335 hist[j] = 0;
1336 return;
1337 }
1338
1339 if (req == 0)
1340 req = tr;
1341
1342 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_EXTERNAL) != 0) {
1343 /* XXX this is bogus ! req can't be anything else but tr ! */
1344 if (req->tr_request_id == tr->tr_request_id)
1345 panic("req id: %d on controller queue twice",
1346 tr->tr_request_id);
1347
1348 for (j = 0; j < i; j++)
1349 if (tr->bp == hist[j])
1350 panic("req id: %d buf found twice",
1351 tr->tr_request_id);
1352 }
1353 req = tr;
1354
1355 hist[i++] = req->bp;
1356}
1357#endif
1358
1359static int
1360twa_done(struct twa_softc *sc)
1361{
1362 union twa_response_queue rq;
1363 struct twa_request *tr;
1364 int rv = 0;
1365 uint32_t status_reg;
1366
1367 for (;;) {
1368 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
1369 if ((rv = twa_check_ctlr_state(sc, status_reg)))
1370 break;
1371 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY)
1372 break;
1373 /* Response queue is not empty. */
1374 rq.value = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET);
1375 tr = sc->sc_twa_request + rq.u.response_id;
1376#if 0
1377 twa_check_response_q(tr, 0);
1378#endif
1379 /* Unmap the command packet, and any associated data buffer. */
1380 twa_unmap_request(tr);
1381
1382 tr->tr_status = TWA_CMD_COMPLETE;
1383 TAILQ_REMOVE(&tr->tr_sc->twa_busy, tr, tr_link);
1384
1385 if (tr->tr_callback)
1386 tr->tr_callback(tr);
1387 }
1388 (void)twa_drain_pending_queue(sc);
1389
1390#if 0
1391 twa_check_response_q(NULL, 1);
1392#endif
1393 return(rv);
1394}
1395
1396/*
1397 * Function name: twa_init_ctlr
1398 * Description: Establishes a logical connection with the controller.
1399 * If bundled with firmware, determines whether or not
1400 * the driver is compatible with the firmware on the
1401 * controller, before proceeding to work with it.
1402 *
1403 * Input: sc -- ptr to per ctlr structure
1404 * Output: None
1405 * Return value: 0 -- success
1406 * non-zero-- failure
1407 */
1408static int
1409twa_init_ctlr(struct twa_softc *sc)
1410{
1411 uint16_t fw_on_ctlr_srl = 0;
1412 uint16_t fw_on_ctlr_arch_id = 0;
1413 uint16_t fw_on_ctlr_branch = 0;
1414 uint16_t fw_on_ctlr_build = 0;
1415 uint32_t init_connect_result = 0;
1416 int error = 0;
1417
1418 /* Wait for the controller to become ready. */
1419 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY,
1420 TWA_REQUEST_TIMEOUT_PERIOD)) {
1421 return(ENXIO);
1422 }
1423 /* Drain the response queue. */
1424 if (twa_drain_response_queue(sc))
1425 return(1);
1426
1427 /* Establish a logical connection with the controller. */
1428 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS,
1429 TWA_EXTENDED_INIT_CONNECT, TWA_CURRENT_FW_SRL,
1430 TWA_9000_ARCH_ID, TWA_CURRENT_FW_BRANCH,
1431 TWA_CURRENT_FW_BUILD, &fw_on_ctlr_srl,
1432 &fw_on_ctlr_arch_id, &fw_on_ctlr_branch,
1433 &fw_on_ctlr_build, &init_connect_result))) {
1434 return(error);
1435 }
1436 twa_drain_aen_queue(sc);
1437
1438 /* Set controller state to initialized. */
1439 sc->twa_state &= ~TWA_STATE_SHUTDOWN;
1440 return(0);
1441}
1442
1443static int
1444twa_setup(device_t self)
1445{
1446 struct twa_softc *sc;
1447 struct tw_cl_event_packet *aen_queue;
1448 uint32_t i = 0;
1449 int error = 0;
1450
1451 sc = device_private(self);
1452
1453 /* Initialize request queues. */
1454 TAILQ_INIT(&sc->twa_free);
1455 TAILQ_INIT(&sc->twa_busy);
1456 TAILQ_INIT(&sc->twa_pending);
1457
1458 sc->twa_sc_flags = 0;
1459
1460 if (twa_alloc_req_pkts(sc, TWA_Q_LENGTH)) {
1461
1462 return(ENOMEM);
1463 }
1464
1465 /* Allocate memory for the AEN queue. */
1466 if ((aen_queue = malloc(sizeof(struct tw_cl_event_packet) *
1467 TWA_Q_LENGTH, M_DEVBUF, M_WAITOK)) == NULL) {
1468 /*
1469 * This should not cause us to return error. We will only be
1470 * unable to support AEN's. But then, we will have to check
1471 * time and again to see if we can support AEN's, if we
1472 * continue. So, we will just return error.
1473 */
1474 return (ENOMEM);
1475 }
1476 /* Initialize the aen queue. */
1477 memset(aen_queue, 0, sizeof(struct tw_cl_event_packet) * TWA_Q_LENGTH);
1478
1479 for (i = 0; i < TWA_Q_LENGTH; i++)
1480 sc->twa_aen_queue[i] = &(aen_queue[i]);
1481
1482 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1483 TWA_CONTROL_DISABLE_INTERRUPTS);
1484
1485 /* Initialize the controller. */
1486 if ((error = twa_init_ctlr(sc))) {
1487 /* Soft reset the controller, and try one more time. */
1488
1489 printf("%s: controller initialization failed. "
1490 "Retrying initialization\n", device_xname(sc->twa_dv));
1491
1492 if ((error = twa_soft_reset(sc)) == 0)
1493 error = twa_init_ctlr(sc);
1494 }
1495
1496 twa_describe_controller(sc);
1497
1498 error = twa_request_bus_scan(self, "twa", 0);
1499
1500 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1501 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT |
1502 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT |
1503 TWA_CONTROL_ENABLE_INTERRUPTS);
1504
1505 return (error);
1506}
1507
1508void *twa_sdh;
1509
1510static void
1511twa_attach(device_t parent, device_t self, void *aux)
1512{
1513 struct pci_attach_args *pa;
1514 struct twa_softc *sc;
1515 pci_chipset_tag_t pc;
1516 pcireg_t csr;
1517 pci_intr_handle_t ih;
1518 const char *intrstr;
1519 const struct sysctlnode *node;
1520 const struct twa_pci_identity *entry;
1521 int i;
1522 bool use_64bit;
1523 char intrbuf[PCI_INTRSTR_LEN];
1524
1525 sc = device_private(self);
1526
1527 sc->twa_dv = self;
1528
1529 pa = aux;
1530 pc = pa->pa_pc;
1531 sc->pc = pa->pa_pc;
1532 sc->tag = pa->pa_tag;
1533
1534 entry = twa_lookup(pa->pa_id);
1535 pci_aprint_devinfo_fancy(pa, "RAID controller", entry->name, 1);
1536
1537 sc->sc_quirks = 0;
1538
1539 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9000) {
1540 sc->sc_nunits = TWA_MAX_UNITS;
1541 use_64bit = false;
1542 if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0,
1543 &sc->twa_bus_iot, &sc->twa_bus_ioh, NULL, NULL)) {
1544 aprint_error_dev(sc->twa_dv, "can't map i/o space\n");
1545 return;
1546 }
1547 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9550) {
1548 sc->sc_nunits = TWA_MAX_UNITS;
1549 use_64bit = true;
1550 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08,
1551 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot,
1552 &sc->twa_bus_ioh, NULL, NULL)) {
1553 aprint_error_dev(sc->twa_dv, "can't map mem space\n");
1554 return;
1555 }
1556 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9650) {
1557 sc->sc_nunits = TWA_9650_MAX_UNITS;
1558 use_64bit = true;
1559 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08,
1560 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot,
1561 &sc->twa_bus_ioh, NULL, NULL)) {
1562 aprint_error_dev(sc->twa_dv, "can't map mem space\n");
1563 return;
1564 }
1565 sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG;
1566 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9690) {
1567 sc->sc_nunits = TWA_9690_MAX_UNITS;
1568 use_64bit = true;
1569 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08,
1570 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot,
1571 &sc->twa_bus_ioh, NULL, NULL)) {
1572 aprint_error_dev(sc->twa_dv, "can't map mem space\n");
1573 return;
1574 }
1575 sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG;
1576 } else {
1577 sc->sc_nunits = 0;
1578 use_64bit = false;
1579 aprint_error_dev(sc->twa_dv,
1580 "product id 0x%02x not recognized\n",
1581 PCI_PRODUCT(pa->pa_id));
1582 return;
1583 }
1584
1585 if (pci_dma64_available(pa) && use_64bit) {
1586 aprint_verbose_dev(self, "64-bit DMA addressing active\n");
1587 sc->twa_dma_tag = pa->pa_dmat64;
1588 } else {
1589 sc->twa_dma_tag = pa->pa_dmat;
1590 }
1591
1592 sc->sc_product_id = PCI_PRODUCT(pa->pa_id);
1593 /* Enable the device. */
1594 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
1595
1596 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
1597 csr | PCI_COMMAND_MASTER_ENABLE);
1598
1599 /* Map and establish the interrupt. */
1600 if (pci_intr_map(pa, &ih)) {
1601 aprint_error_dev(sc->twa_dv, "can't map interrupt\n");
1602 return;
1603 }
1604 intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
1605
1606 sc->twa_ih = pci_intr_establish(pc, ih, IPL_BIO, twa_intr, sc);
1607 if (sc->twa_ih == NULL) {
1608 aprint_error_dev(sc->twa_dv, "can't establish interrupt%s%s\n",
1609 (intrstr) ? " at " : "",
1610 (intrstr) ? intrstr : "");
1611 return;
1612 }
1613
1614 if (intrstr != NULL)
1615 aprint_normal_dev(sc->twa_dv, "interrupting at %s\n", intrstr);
1616
1617 twa_setup(self);
1618
1619 if (twa_sdh == NULL)
1620 twa_sdh = shutdownhook_establish(twa_shutdown, NULL);
1621
1622 /* sysctl set-up for 3ware cli */
1623 if (sysctl_createv(NULL, 0, NULL, &node,
1624 0, CTLTYPE_NODE, device_xname(sc->twa_dv),
1625 SYSCTL_DESCR("twa driver information"),
1626 NULL, 0, NULL, 0,
1627 CTL_HW, CTL_CREATE, CTL_EOL) != 0) {
1628 aprint_error_dev(sc->twa_dv,
1629 "could not create %s.%s sysctl node\n",
1630 "hw", device_xname(sc->twa_dv));
1631 return;
1632 }
1633 if ((i = sysctl_createv(NULL, 0, NULL, NULL,
1634 0, CTLTYPE_STRING, "driver_version",
1635 SYSCTL_DESCR("twa driver version"),
1636 NULL, 0, __UNCONST(&twaver), 0,
1637 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL))
1638 != 0) {
1639 aprint_error_dev(sc->twa_dv,
1640 "could not create %s.%s.driver_version sysctl\n",
1641 "hw", device_xname(sc->twa_dv));
1642 return;
1643 }
1644
1645 return;
1646}
1647
1648static void
1649twa_shutdown(void *arg)
1650{
1651 extern struct cfdriver twa_cd;
1652 struct twa_softc *sc;
1653 int i, unit;
1654
1655 for (i = 0; i < twa_cd.cd_ndevs; i++) {
1656 if ((sc = device_lookup_private(&twa_cd, i)) == NULL)
1657 continue;
1658
1659 for (unit = 0; unit < sc->sc_nunits; unit++)
1660 if (sc->sc_units[unit].td_dev != NULL)
1661 (void) config_detach(sc->sc_units[unit].td_dev,
1662 DETACH_FORCE | DETACH_QUIET);
1663
1664 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1665 TWA_CONTROL_DISABLE_INTERRUPTS);
1666
1667 /* Let the controller know that we are going down. */
1668 (void)twa_init_connection(sc, TWA_SHUTDOWN_MESSAGE_CREDITS,
1669 0, 0, 0, 0, 0,
1670 NULL, NULL, NULL, NULL, NULL);
1671 }
1672}
1673
1674void
1675twa_register_callbacks(struct twa_softc *sc, int unit,
1676 const struct twa_callbacks *tcb)
1677{
1678
1679 sc->sc_units[unit].td_callbacks = tcb;
1680}
1681
1682/*
1683 * Print autoconfiguration message for a sub-device
1684 */
1685static int
1686twa_print(void *aux, const char *pnp)
1687{
1688 struct twa_attach_args *twaa;
1689
1690 twaa = aux;
1691
1692 if (pnp !=NULL)
1693 aprint_normal("block device at %s\n", pnp);
1694 aprint_normal(" unit %d\n", twaa->twaa_unit);
1695 return (UNCONF);
1696}
1697
1698static void
1699twa_fillin_sgl(struct twa_sg *sgl, bus_dma_segment_t *segs, int nsegments)
1700{
1701 int i;
1702 for (i = 0; i < nsegments; i++) {
1703 sgl[i].address = segs[i].ds_addr;
1704 sgl[i].length = (uint32_t)(segs[i].ds_len);
1705 }
1706}
1707
1708static int
1709twa_submit_io(struct twa_request *tr)
1710{
1711 int error;
1712
1713 if ((error = twa_start(tr))) {
1714 if (error == EBUSY)
1715 error = 0; /* request is in the pending queue */
1716 else {
1717 tr->tr_error = error;
1718 }
1719 }
1720 return(error);
1721}
1722
1723/*
1724 * Function name: twa_setup_data_dmamap
1725 * Description: Callback of bus_dmamap_load for the buffer associated
1726 * with data. Updates the cmd pkt (size/sgl_entries
1727 * fields, as applicable) to reflect the number of sg
1728 * elements.
1729 *
1730 * Input: arg -- ptr to request pkt
1731 * segs -- ptr to a list of segment descriptors
1732 * nsegments--# of segments
1733 * error -- 0 if no errors encountered before callback,
1734 * non-zero if errors were encountered
1735 * Output: None
1736 * Return value: None
1737 */
1738static int
1739twa_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments)
1740{
1741 struct twa_request *tr = (struct twa_request *)arg;
1742 struct twa_command_packet *cmdpkt = tr->tr_command;
1743 struct twa_command_9k *cmd9k;
1744 union twa_command_7k *cmd7k;
1745 uint8_t sgl_offset;
1746 int error;
1747
1748 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) {
1749 cmd9k = &(cmdpkt->command.cmd_pkt_9k);
1750 twa_fillin_sgl(&(cmd9k->sg_list[0]), segs, nsegments);
1751 cmd9k->sgl_entries += nsegments - 1;
1752 } else {
1753 /* It's a 7000 command packet. */
1754 cmd7k = &(cmdpkt->command.cmd_pkt_7k);
1755 if ((sgl_offset = cmdpkt->command.cmd_pkt_7k.generic.sgl_offset))
1756 twa_fillin_sgl((struct twa_sg *)
1757 (((uint32_t *)cmd7k) + sgl_offset),
1758 segs, nsegments);
1759 /* Modify the size field, based on sg address size. */
1760 cmd7k->generic.size +=
1761 ((TWA_64BIT_ADDRESSES ? 3 : 2) * nsegments);
1762 }
1763 if (tr->tr_flags & TWA_CMD_DATA_IN)
1764 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0,
1765 tr->tr_length, BUS_DMASYNC_PREWRITE);
1766 if (tr->tr_flags & TWA_CMD_DATA_OUT) {
1767 /*
1768 * If we're using an alignment buffer, and we're
1769 * writing data, copy the real data out.
1770 */
1771 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED)
1772 memcpy(tr->tr_data, tr->tr_real_data,
1773 tr->tr_real_length);
1774 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0,
1775 tr->tr_length, BUS_DMASYNC_PREREAD);
1776 }
1777 error = twa_submit_io(tr);
1778
1779 if (error) {
1780 twa_unmap_request(tr);
1781 /*
1782 * If the caller had been returned EINPROGRESS, and he has
1783 * registered a callback for handling completion, the callback
1784 * will never get called because we were unable to submit the
1785 * request. So, free up the request right here.
1786 */
1787 if (tr->tr_callback)
1788 twa_release_request(tr);
1789 }
1790 return (error);
1791}
1792
1793/*
1794 * Function name: twa_map_request
1795 * Description: Maps a cmd pkt and data associated with it, into
1796 * DMA'able memory.
1797 *
1798 * Input: tr -- ptr to request pkt
1799 * Output: None
1800 * Return value: 0 -- success
1801 * non-zero-- failure
1802 */
1803int
1804twa_map_request(struct twa_request *tr)
1805{
1806 struct twa_softc *sc = tr->tr_sc;
1807 int s, rv, rc;
1808
1809 /* If the command involves data, map that too. */
1810 if (tr->tr_data != NULL) {
1811
1812 if (((u_long)tr->tr_data & (511)) != 0) {
1813 tr->tr_flags |= TWA_CMD_DATA_COPY_NEEDED;
1814 tr->tr_real_data = tr->tr_data;
1815 tr->tr_real_length = tr->tr_length;
1816 s = splvm();
1817 rc = uvm_km_kmem_alloc(kmem_va_arena,
1818 tr->tr_length, (VM_NOSLEEP | VM_INSTANTFIT),
1819 (vmem_addr_t *)&tr->tr_data);
1820 splx(s);
1821
1822 if (rc != 0) {
1823 tr->tr_data = tr->tr_real_data;
1824 tr->tr_length = tr->tr_real_length;
1825 return(ENOMEM);
1826 }
1827 if ((tr->tr_flags & TWA_CMD_DATA_IN) != 0)
1828 memcpy(tr->tr_data, tr->tr_real_data,
1829 tr->tr_length);
1830 }
1831
1832 /*
1833 * Map the data buffer into bus space and build the S/G list.
1834 */
1835 rv = bus_dmamap_load(sc->twa_dma_tag, tr->tr_dma_map,
1836 tr->tr_data, tr->tr_length, NULL,
1837 BUS_DMA_NOWAIT | BUS_DMA_STREAMING);
1838
1839 if (rv != 0) {
1840 if ((tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) != 0) {
1841 s = splvm();
1842 uvm_km_kmem_free(kmem_va_arena,
1843 (vaddr_t)tr->tr_data, tr->tr_length);
1844 splx(s);
1845 }
1846 return (rv);
1847 }
1848
1849 if ((rv = twa_setup_data_dmamap(tr,
1850 tr->tr_dma_map->dm_segs,
1851 tr->tr_dma_map->dm_nsegs))) {
1852
1853 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) {
1854 s = splvm();
1855 uvm_km_kmem_free(kmem_va_arena,
1856 (vaddr_t)tr->tr_data, tr->tr_length);
1857 splx(s);
1858 tr->tr_data = tr->tr_real_data;
1859 tr->tr_length = tr->tr_real_length;
1860 }
1861 }
1862
1863 } else
1864 if ((rv = twa_submit_io(tr)))
1865 twa_unmap_request(tr);
1866
1867 return (rv);
1868}
1869
1870/*
1871 * Function name: twa_intr
1872 * Description: Interrupt handler. Determines the kind of interrupt,
1873 * and calls the appropriate handler.
1874 *
1875 * Input: sc -- ptr to per ctlr structure
1876 * Output: None
1877 * Return value: None
1878 */
1879
1880static int
1881twa_intr(void *arg)
1882{
1883 int caught, s, rv __diagused;
1884 struct twa_softc *sc;
1885 uint32_t status_reg;
1886 sc = (struct twa_softc *)arg;
1887
1888 caught = 0;
1889 /* Collect current interrupt status. */
1890 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
1891 if (twa_check_ctlr_state(sc, status_reg)) {
1892 caught = 1;
1893 goto bail;
1894 }
1895 /* Dispatch based on the kind of interrupt. */
1896 if (status_reg & TWA_STATUS_HOST_INTERRUPT) {
1897 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1898 TWA_CONTROL_CLEAR_HOST_INTERRUPT);
1899 caught = 1;
1900 }
1901 if ((status_reg & TWA_STATUS_ATTENTION_INTERRUPT) != 0) {
1902 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1903 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT);
1904 rv = twa_fetch_aen(sc);
1905#ifdef DIAGNOSTIC
1906 if (rv != 0)
1907 printf("%s: unable to retrieve AEN (%d)\n",
1908 device_xname(sc->twa_dv), rv);
1909#endif
1910 caught = 1;
1911 }
1912 if (status_reg & TWA_STATUS_COMMAND_INTERRUPT) {
1913 /* Start any requests that might be in the pending queue. */
1914 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1915 TWA_CONTROL_MASK_COMMAND_INTERRUPT);
1916 (void)twa_drain_pending_queue(sc);
1917 caught = 1;
1918 }
1919 if (status_reg & TWA_STATUS_RESPONSE_INTERRUPT) {
1920 s = splbio();
1921 twa_done(sc);
1922 splx(s);
1923 caught = 1;
1924 }
1925bail:
1926 return (caught);
1927}
1928
1929/*
1930 * Accept an open operation on the control device.
1931 */
1932static int
1933twaopen(dev_t dev, int flag, int mode, struct lwp *l)
1934{
1935 struct twa_softc *twa;
1936
1937 if ((twa = device_lookup_private(&twa_cd, minor(dev))) == NULL)
1938 return (ENXIO);
1939 if ((twa->twa_sc_flags & TWA_STATE_OPEN) != 0)
1940 return (EBUSY);
1941
1942 twa->twa_sc_flags |= TWA_STATE_OPEN;
1943
1944 return (0);
1945}
1946
1947/*
1948 * Accept the last close on the control device.
1949 */
1950static int
1951twaclose(dev_t dev, int flag, int mode,
1952 struct lwp *l)
1953{
1954 struct twa_softc *twa;
1955
1956 twa = device_lookup_private(&twa_cd, minor(dev));
1957 twa->twa_sc_flags &= ~TWA_STATE_OPEN;
1958 return (0);
1959}
1960
1961/*
1962 * Function name: twaioctl
1963 * Description: ioctl handler.
1964 *
1965 * Input: sc -- ptr to per ctlr structure
1966 * cmd -- ioctl cmd
1967 * buf -- ptr to buffer in kernel memory, which is
1968 * a copy of the input buffer in user-space
1969 * Output: buf -- ptr to buffer in kernel memory, which will
1970 * be copied of the output buffer in user-space
1971 * Return value: 0 -- success
1972 * non-zero-- failure
1973 */
1974static int
1975twaioctl(dev_t dev, u_long cmd, void *data, int flag,
1976 struct lwp *l)
1977{
1978 struct twa_softc *sc;
1979 struct twa_ioctl_9k *user_buf = (struct twa_ioctl_9k *)data;
1980 struct tw_cl_event_packet event_buf;
1981 struct twa_request *tr = 0;
1982 int32_t event_index = 0;
1983 int32_t start_index;
1984 int s, error = 0;
1985
1986 sc = device_lookup_private(&twa_cd, minor(dev));
1987
1988 switch (cmd) {
1989 case TW_OSL_IOCTL_FIRMWARE_PASS_THROUGH:
1990 {
1991 struct twa_command_packet *cmdpkt;
1992 uint32_t data_buf_size_adjusted;
1993
1994 /* Get a request packet */
1995 tr = twa_get_request_wait(sc, 0);
1996 KASSERT(tr != NULL);
1997 /*
1998 * Make sure that the data buffer sent to firmware is a
1999 * 512 byte multiple in size.
2000 */
2001 data_buf_size_adjusted =
2002 (user_buf->twa_drvr_pkt.buffer_length + 511) & ~511;
2003
2004 if ((tr->tr_length = data_buf_size_adjusted)) {
2005 if ((tr->tr_data = malloc(data_buf_size_adjusted,
2006 M_DEVBUF, M_WAITOK)) == NULL) {
2007 error = ENOMEM;
2008 goto fw_passthru_done;
2009 }
2010 /* Copy the payload. */
2011 if ((error = copyin((void *) (user_buf->pdata),
2012 (void *) (tr->tr_data),
2013 user_buf->twa_drvr_pkt.buffer_length)) != 0) {
2014 goto fw_passthru_done;
2015 }
2016 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT;
2017 }
2018 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_IOCTL;
2019 cmdpkt = tr->tr_command;
2020
2021 /* Copy the command packet. */
2022 memcpy(cmdpkt, &(user_buf->twa_cmd_pkt),
2023 sizeof(struct twa_command_packet));
2024 cmdpkt->command.cmd_pkt_7k.generic.request_id =
2025 tr->tr_request_id;
2026
2027 /* Send down the request, and wait for it to complete. */
2028 if ((error = twa_wait_request(tr, TWA_REQUEST_TIMEOUT_PERIOD))) {
2029 if (error == ETIMEDOUT)
2030 break; /* clean-up done by twa_wait_request */
2031 goto fw_passthru_done;
2032 }
2033
2034 /* Copy the command packet back into user space. */
2035 memcpy(&user_buf->twa_cmd_pkt, cmdpkt,
2036 sizeof(struct twa_command_packet));
2037
2038 /* If there was a payload, copy it back too. */
2039 if (tr->tr_length)
2040 error = copyout(tr->tr_data, user_buf->pdata,
2041 user_buf->twa_drvr_pkt.buffer_length);
2042fw_passthru_done:
2043 /* Free resources. */
2044 if (tr->tr_data)
2045 free(tr->tr_data, M_DEVBUF);
2046
2047 if (tr)
2048 twa_release_request(tr);
2049 break;
2050 }
2051
2052 case TW_OSL_IOCTL_SCAN_BUS:
2053 twa_request_bus_scan(sc->twa_dv, "twa", 0);
2054 break;
2055
2056 case TW_CL_IOCTL_GET_FIRST_EVENT:
2057 if (sc->twa_aen_queue_wrapped) {
2058 if (sc->twa_aen_queue_overflow) {
2059 /*
2060 * The aen queue has wrapped, even before some
2061 * events have been retrieved. Let the caller
2062 * know that he missed out on some AEN's.
2063 */
2064 user_buf->twa_drvr_pkt.status =
2065 TWA_ERROR_AEN_OVERFLOW;
2066 sc->twa_aen_queue_overflow = FALSE;
2067 } else
2068 user_buf->twa_drvr_pkt.status = 0;
2069 event_index = sc->twa_aen_head;
2070 } else {
2071 if (sc->twa_aen_head == sc->twa_aen_tail) {
2072 user_buf->twa_drvr_pkt.status =
2073 TWA_ERROR_AEN_NO_EVENTS;
2074 break;
2075 }
2076 user_buf->twa_drvr_pkt.status = 0;
2077 event_index = sc->twa_aen_tail; /* = 0 */
2078 }
2079 if ((error = copyout(sc->twa_aen_queue[event_index],
2080 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0)
2081 (sc->twa_aen_queue[event_index])->retrieved =
2082 TWA_AEN_RETRIEVED;
2083 break;
2084
2085 case TW_CL_IOCTL_GET_LAST_EVENT:
2086 if (sc->twa_aen_queue_wrapped) {
2087 if (sc->twa_aen_queue_overflow) {
2088 /*
2089 * The aen queue has wrapped, even before some
2090 * events have been retrieved. Let the caller
2091 * know that he missed out on some AEN's.
2092 */
2093 user_buf->twa_drvr_pkt.status =
2094 TWA_ERROR_AEN_OVERFLOW;
2095 sc->twa_aen_queue_overflow = FALSE;
2096 } else
2097 user_buf->twa_drvr_pkt.status = 0;
2098 } else {
2099 if (sc->twa_aen_head == sc->twa_aen_tail) {
2100 user_buf->twa_drvr_pkt.status =
2101 TWA_ERROR_AEN_NO_EVENTS;
2102 break;
2103 }
2104 user_buf->twa_drvr_pkt.status = 0;
2105 }
2106 event_index =
2107 (sc->twa_aen_head - 1 + TWA_Q_LENGTH) % TWA_Q_LENGTH;
2108 if ((error = copyout(sc->twa_aen_queue[event_index],
2109 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0)
2110 (sc->twa_aen_queue[event_index])->retrieved =
2111 TWA_AEN_RETRIEVED;
2112 break;
2113
2114 case TW_CL_IOCTL_GET_NEXT_EVENT:
2115 user_buf->twa_drvr_pkt.status = 0;
2116 if (sc->twa_aen_queue_wrapped) {
2117
2118 if (sc->twa_aen_queue_overflow) {
2119 /*
2120 * The aen queue has wrapped, even before some
2121 * events have been retrieved. Let the caller
2122 * know that he missed out on some AEN's.
2123 */
2124 user_buf->twa_drvr_pkt.status =
2125 TWA_ERROR_AEN_OVERFLOW;
2126 sc->twa_aen_queue_overflow = FALSE;
2127 }
2128 start_index = sc->twa_aen_head;
2129 } else {
2130 if (sc->twa_aen_head == sc->twa_aen_tail) {
2131 user_buf->twa_drvr_pkt.status =
2132 TWA_ERROR_AEN_NO_EVENTS;
2133 break;
2134 }
2135 start_index = sc->twa_aen_tail; /* = 0 */
2136 }
2137 error = copyin(user_buf->pdata, &event_buf,
2138 sizeof(struct tw_cl_event_packet));
2139
2140 event_index = (start_index + event_buf.sequence_id -
2141 (sc->twa_aen_queue[start_index])->sequence_id + 1)
2142 % TWA_Q_LENGTH;
2143
2144 if (!((sc->twa_aen_queue[event_index])->sequence_id >
2145 event_buf.sequence_id)) {
2146 if (user_buf->twa_drvr_pkt.status ==
2147 TWA_ERROR_AEN_OVERFLOW)
2148 /* so we report the overflow next time */
2149 sc->twa_aen_queue_overflow = TRUE;
2150 user_buf->twa_drvr_pkt.status = TWA_ERROR_AEN_NO_EVENTS;
2151 break;
2152 }
2153 if ((error = copyout(sc->twa_aen_queue[event_index],
2154 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0)
2155 (sc->twa_aen_queue[event_index])->retrieved =
2156 TWA_AEN_RETRIEVED;
2157 break;
2158
2159 case TW_CL_IOCTL_GET_PREVIOUS_EVENT:
2160 user_buf->twa_drvr_pkt.status = 0;
2161 if (sc->twa_aen_queue_wrapped) {
2162 if (sc->twa_aen_queue_overflow) {
2163 /*
2164 * The aen queue has wrapped, even before some
2165 * events have been retrieved. Let the caller
2166 * know that he missed out on some AEN's.
2167 */
2168 user_buf->twa_drvr_pkt.status =
2169 TWA_ERROR_AEN_OVERFLOW;
2170 sc->twa_aen_queue_overflow = FALSE;
2171 }
2172 start_index = sc->twa_aen_head;
2173 } else {
2174 if (sc->twa_aen_head == sc->twa_aen_tail) {
2175 user_buf->twa_drvr_pkt.status =
2176 TWA_ERROR_AEN_NO_EVENTS;
2177 break;
2178 }
2179 start_index = sc->twa_aen_tail; /* = 0 */
2180 }
2181 if ((error = copyin(user_buf->pdata, &event_buf,
2182 sizeof(struct tw_cl_event_packet))) != 0)
2183
2184 event_index = (start_index + event_buf.sequence_id -
2185 (sc->twa_aen_queue[start_index])->sequence_id - 1)
2186 % TWA_Q_LENGTH;
2187 if (!((sc->twa_aen_queue[event_index])->sequence_id <
2188 event_buf.sequence_id)) {
2189 if (user_buf->twa_drvr_pkt.status ==
2190 TWA_ERROR_AEN_OVERFLOW)
2191 /* so we report the overflow next time */
2192 sc->twa_aen_queue_overflow = TRUE;
2193 user_buf->twa_drvr_pkt.status =
2194 TWA_ERROR_AEN_NO_EVENTS;
2195 break;
2196 }
2197 if ((error = copyout(sc->twa_aen_queue [event_index],
2198 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0)
2199 aprint_error_dev(sc->twa_dv, "get_previous: Could not "
2200 "copyout to event_buf. error = %x\n", error);
2201 (sc->twa_aen_queue[event_index])->retrieved = TWA_AEN_RETRIEVED;
2202 break;
2203
2204 case TW_CL_IOCTL_GET_LOCK:
2205 {
2206 struct tw_cl_lock_packet twa_lock;
2207
2208 copyin(user_buf->pdata, &twa_lock,
2209 sizeof(struct tw_cl_lock_packet));
2210 s = splbio();
2211 if ((sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) ||
2212 (twa_lock.force_flag) ||
2213 (time_second >= sc->twa_ioctl_lock.timeout)) {
2214
2215 sc->twa_ioctl_lock.lock = TWA_LOCK_HELD;
2216 sc->twa_ioctl_lock.timeout = time_second +
2217 (twa_lock.timeout_msec / 1000);
2218 twa_lock.time_remaining_msec = twa_lock.timeout_msec;
2219 user_buf->twa_drvr_pkt.status = 0;
2220 } else {
2221 twa_lock.time_remaining_msec =
2222 (sc->twa_ioctl_lock.timeout - time_second) *
2223 1000;
2224 user_buf->twa_drvr_pkt.status =
2225 TWA_ERROR_IOCTL_LOCK_ALREADY_HELD;
2226 }
2227 splx(s);
2228 copyout(&twa_lock, user_buf->pdata,
2229 sizeof(struct tw_cl_lock_packet));
2230 break;
2231 }
2232
2233 case TW_CL_IOCTL_RELEASE_LOCK:
2234 s = splbio();
2235 if (sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) {
2236 user_buf->twa_drvr_pkt.status =
2237 TWA_ERROR_IOCTL_LOCK_NOT_HELD;
2238 } else {
2239 sc->twa_ioctl_lock.lock = TWA_LOCK_FREE;
2240 user_buf->twa_drvr_pkt.status = 0;
2241 }
2242 splx(s);
2243 break;
2244
2245 case TW_CL_IOCTL_GET_COMPATIBILITY_INFO:
2246 {
2247 struct tw_cl_compatibility_packet comp_pkt;
2248
2249 memcpy(comp_pkt.driver_version, TWA_DRIVER_VERSION_STRING,
2250 sizeof(TWA_DRIVER_VERSION_STRING));
2251 comp_pkt.working_srl = sc->working_srl;
2252 comp_pkt.working_branch = sc->working_branch;
2253 comp_pkt.working_build = sc->working_build;
2254 user_buf->twa_drvr_pkt.status = 0;
2255
2256 /* Copy compatibility information to user space. */
2257 copyout(&comp_pkt, user_buf->pdata,
2258 min(sizeof(struct tw_cl_compatibility_packet),
2259 user_buf->twa_drvr_pkt.buffer_length));
2260 break;
2261 }
2262
2263 case TWA_IOCTL_GET_UNITNAME: /* WASABI EXTENSION */
2264 {
2265 struct twa_unitname *tn;
2266 struct twa_drive *tdr;
2267
2268 tn = (struct twa_unitname *)data;
2269 /* XXX mutex */
2270 if (tn->tn_unit < 0 || tn->tn_unit >= sc->sc_nunits)
2271 return (EINVAL);
2272 tdr = &sc->sc_units[tn->tn_unit];
2273 if (tdr->td_dev == NULL)
2274 tn->tn_name[0] = '\0';
2275 else
2276 strlcpy(tn->tn_name, device_xname(tdr->td_dev),
2277 sizeof(tn->tn_name));
2278 return (0);
2279 }
2280
2281 default:
2282 /* Unknown opcode. */
2283 error = ENOTTY;
2284 }
2285
2286 return(error);
2287}
2288
2289const struct cdevsw twa_cdevsw = {
2290 .d_open = twaopen,
2291 .d_close = twaclose,
2292 .d_read = noread,
2293 .d_write = nowrite,
2294 .d_ioctl = twaioctl,
2295 .d_stop = nostop,
2296 .d_tty = notty,
2297 .d_poll = nopoll,
2298 .d_mmap = nommap,
2299 .d_kqfilter = nokqfilter,
2300 .d_discard = nodiscard,
2301 .d_flag = D_OTHER
2302};
2303
2304/*
2305 * Function name: twa_get_param
2306 * Description: Get a firmware parameter.
2307 *
2308 * Input: sc -- ptr to per ctlr structure
2309 * table_id -- parameter table #
2310 * param_id -- index of the parameter in the table
2311 * param_size -- size of the parameter in bytes
2312 * callback -- ptr to function, if any, to be called
2313 * back on completion; NULL if no callback.
2314 * Output: None
2315 * Return value: ptr to param structure -- success
2316 * NULL -- failure
2317 */
2318static int
2319twa_get_param(struct twa_softc *sc, int table_id, int param_id,
2320 size_t param_size, void (* callback)(struct twa_request *tr),
2321 struct twa_param_9k **param)
2322{
2323 int rv = 0;
2324 struct twa_request *tr;
2325 union twa_command_7k *cmd;
2326
2327 /* Get a request packet. */
2328 if ((tr = twa_get_request(sc, 0)) == NULL) {
2329 rv = EAGAIN;
2330 goto out;
2331 }
2332
2333 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL;
2334
2335 /* Allocate memory to read data into. */
2336 if ((*param = (struct twa_param_9k *)
2337 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) {
2338 rv = ENOMEM;
2339 goto out;
2340 }
2341
2342 memset(*param, 0, sizeof(struct twa_param_9k) - 1 + param_size);
2343 tr->tr_data = *param;
2344 tr->tr_length = TWA_SECTOR_SIZE;
2345 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT;
2346
2347 /* Build the cmd pkt. */
2348 cmd = &(tr->tr_command->command.cmd_pkt_7k);
2349
2350 tr->tr_command->cmd_hdr.header_desc.size_header = 128;
2351
2352 cmd->param.opcode = TWA_OP_GET_PARAM;
2353 cmd->param.sgl_offset = 2;
2354 cmd->param.size = 2;
2355 cmd->param.request_id = tr->tr_request_id;
2356 cmd->param.unit = 0;
2357 cmd->param.param_count = 1;
2358
2359 /* Specify which parameter we need. */
2360 (*param)->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR;
2361 (*param)->parameter_id = param_id;
2362 (*param)->parameter_size_bytes = param_size;
2363
2364 /* Submit the command. */
2365 if (callback == NULL) {
2366 /* There's no call back; wait till the command completes. */
2367 rv = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD);
2368
2369 if (rv != 0)
2370 goto out;
2371
2372 if ((rv = cmd->param.status) != 0) {
2373 /* twa_drain_complete_queue will have done the unmapping */
2374 goto out;
2375 }
2376 twa_release_request(tr);
2377 return (rv);
2378 } else {
2379 /* There's a call back. Simply submit the command. */
2380 tr->tr_callback = callback;
2381 rv = twa_map_request(tr);
2382 return (rv);
2383 }
2384out:
2385 if (tr)
2386 twa_release_request(tr);
2387 return(rv);
2388}
2389
2390/*
2391 * Function name: twa_set_param
2392 * Description: Set a firmware parameter.
2393 *
2394 * Input: sc -- ptr to per ctlr structure
2395 * table_id -- parameter table #
2396 * param_id -- index of the parameter in the table
2397 * param_size -- size of the parameter in bytes
2398 * callback -- ptr to function, if any, to be called
2399 * back on completion; NULL if no callback.
2400 * Output: None
2401 * Return value: 0 -- success
2402 * non-zero-- failure
2403 */
2404static int
2405twa_set_param(struct twa_softc *sc, int table_id, int param_id, int param_size,
2406 void *data, void (* callback)(struct twa_request *tr))
2407{
2408 struct twa_request *tr;
2409 union twa_command_7k *cmd;
2410 struct twa_param_9k *param = NULL;
2411 int error = ENOMEM;
2412
2413 tr = twa_get_request(sc, 0);
2414 if (tr == NULL)
2415 return (EAGAIN);
2416
2417 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL;
2418
2419 /* Allocate memory to send data using. */
2420 if ((param = (struct twa_param_9k *)
2421 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL)
2422 goto out;
2423 memset(param, 0, sizeof(struct twa_param_9k) - 1 + param_size);
2424 tr->tr_data = param;
2425 tr->tr_length = TWA_SECTOR_SIZE;
2426 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT;
2427
2428 /* Build the cmd pkt. */
2429 cmd = &(tr->tr_command->command.cmd_pkt_7k);
2430
2431 tr->tr_command->cmd_hdr.header_desc.size_header = 128;
2432
2433 cmd->param.opcode = TWA_OP_SET_PARAM;
2434 cmd->param.sgl_offset = 2;
2435 cmd->param.size = 2;
2436 cmd->param.request_id = tr->tr_request_id;
2437 cmd->param.unit = 0;
2438 cmd->param.param_count = 1;
2439
2440 /* Specify which parameter we want to set. */
2441 param->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR;
2442 param->parameter_id = param_id;
2443 param->parameter_size_bytes = param_size;
2444 memcpy(param->data, data, param_size);
2445
2446 /* Submit the command. */
2447 if (callback == NULL) {
2448 /* There's no call back; wait till the command completes. */
2449 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD);
2450 if (error == ETIMEDOUT)
2451 /* clean-up done by twa_immediate_request */
2452 return(error);
2453 if (error)
2454 goto out;
2455 if ((error = cmd->param.status)) {
2456 /*
2457 * twa_drain_complete_queue will have done the
2458 * unmapping.
2459 */
2460 goto out;
2461 }
2462 free(param, M_DEVBUF);
2463 twa_release_request(tr);
2464 return(error);
2465 } else {
2466 /* There's a call back. Simply submit the command. */
2467 tr->tr_callback = callback;
2468 if ((error = twa_map_request(tr)))
2469 goto out;
2470
2471 return (0);
2472 }
2473out:
2474 if (param)
2475 free(param, M_DEVBUF);
2476 if (tr)
2477 twa_release_request(tr);
2478 return(error);
2479}
2480
2481/*
2482 * Function name: twa_init_connection
2483 * Description: Send init_connection cmd to firmware
2484 *
2485 * Input: sc -- ptr to per ctlr structure
2486 * message_credits -- max # of requests that we might send
2487 * down simultaneously. This will be
2488 * typically set to 256 at init-time or
2489 * after a reset, and to 1 at shutdown-time
2490 * set_features -- indicates if we intend to use 64-bit
2491 * sg, also indicates if we want to do a
2492 * basic or an extended init_connection;
2493 *
2494 * Note: The following input/output parameters are valid, only in case of an
2495 * extended init_connection:
2496 *
2497 * current_fw_srl -- srl of fw we are bundled
2498 * with, if any; 0 otherwise
2499 * current_fw_arch_id -- arch_id of fw we are bundled
2500 * with, if any; 0 otherwise
2501 * current_fw_branch -- branch # of fw we are bundled
2502 * with, if any; 0 otherwise
2503 * current_fw_build -- build # of fw we are bundled
2504 * with, if any; 0 otherwise
2505 * Output: fw_on_ctlr_srl -- srl of fw on ctlr
2506 * fw_on_ctlr_arch_id -- arch_id of fw on ctlr
2507 * fw_on_ctlr_branch -- branch # of fw on ctlr
2508 * fw_on_ctlr_build -- build # of fw on ctlr
2509 * init_connect_result -- result bitmap of fw response
2510 * Return value: 0 -- success
2511 * non-zero-- failure
2512 */
2513static int
2514twa_init_connection(struct twa_softc *sc, uint16_t message_credits,
2515 uint32_t set_features, uint16_t current_fw_srl,
2516 uint16_t current_fw_arch_id, uint16_t current_fw_branch,
2517 uint16_t current_fw_build, uint16_t *fw_on_ctlr_srl,
2518 uint16_t *fw_on_ctlr_arch_id, uint16_t *fw_on_ctlr_branch,
2519 uint16_t *fw_on_ctlr_build, uint32_t *init_connect_result)
2520{
2521 struct twa_request *tr;
2522 struct twa_command_init_connect *init_connect;
2523 int error = 1;
2524
2525 /* Get a request packet. */
2526 if ((tr = twa_get_request(sc, 0)) == NULL)
2527 goto out;
2528 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL;
2529 /* Build the cmd pkt. */
2530 init_connect = &(tr->tr_command->command.cmd_pkt_7k.init_connect);
2531
2532 tr->tr_command->cmd_hdr.header_desc.size_header = 128;
2533
2534 init_connect->opcode = TWA_OP_INIT_CONNECTION;
2535 init_connect->request_id = tr->tr_request_id;
2536 init_connect->message_credits = message_credits;
2537 init_connect->features = set_features;
2538 if (TWA_64BIT_ADDRESSES)
2539 init_connect->features |= TWA_64BIT_SG_ADDRESSES;
2540 if (set_features & TWA_EXTENDED_INIT_CONNECT) {
2541 /*
2542 * Fill in the extra fields needed for
2543 * an extended init_connect.
2544 */
2545 init_connect->size = 6;
2546 init_connect->fw_srl = current_fw_srl;
2547 init_connect->fw_arch_id = current_fw_arch_id;
2548 init_connect->fw_branch = current_fw_branch;
2549 } else
2550 init_connect->size = 3;
2551
2552 /* Submit the command, and wait for it to complete. */
2553 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD);
2554 if (error == ETIMEDOUT)
2555 return(error); /* clean-up done by twa_immediate_request */
2556 if (error)
2557 goto out;
2558 if ((error = init_connect->status)) {
2559 /* twa_drain_complete_queue will have done the unmapping */
2560 goto out;
2561 }
2562 if (set_features & TWA_EXTENDED_INIT_CONNECT) {
2563 *fw_on_ctlr_srl = init_connect->fw_srl;
2564 *fw_on_ctlr_arch_id = init_connect->fw_arch_id;
2565 *fw_on_ctlr_branch = init_connect->fw_branch;
2566 *fw_on_ctlr_build = init_connect->fw_build;
2567 *init_connect_result = init_connect->result;
2568 }
2569 twa_release_request(tr);
2570 return(error);
2571
2572out:
2573 if (tr)
2574 twa_release_request(tr);
2575 return(error);
2576}
2577
2578static int
2579twa_reset(struct twa_softc *sc)
2580{
2581 int s;
2582 int error = 0;
2583
2584 /* Set the 'in reset' flag. */
2585 sc->twa_sc_flags |= TWA_STATE_IN_RESET;
2586
2587 /*
2588 * Disable interrupts from the controller, and mask any
2589 * accidental entry into our interrupt handler.
2590 */
2591 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
2592 TWA_CONTROL_DISABLE_INTERRUPTS);
2593
2594 s = splbio();
2595
2596 /* Soft reset the controller. */
2597 if ((error = twa_soft_reset(sc)))
2598 goto out;
2599
2600 /* Re-establish logical connection with the controller. */
2601 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS,
2602 0, 0, 0, 0, 0,
2603 NULL, NULL, NULL, NULL, NULL))) {
2604 goto out;
2605 }
2606 /*
2607 * Complete all requests in the complete queue; error back all requests
2608 * in the busy queue. Any internal requests will be simply freed.
2609 * Re-submit any requests in the pending queue.
2610 */
2611 twa_drain_busy_queue(sc);
2612
2613out:
2614 splx(s);
2615 /*
2616 * Enable interrupts, and also clear attention and response interrupts.
2617 */
2618 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
2619 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT |
2620 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT |
2621 TWA_CONTROL_ENABLE_INTERRUPTS);
2622
2623 /* Clear the 'in reset' flag. */
2624 sc->twa_sc_flags &= ~TWA_STATE_IN_RESET;
2625
2626 return(error);
2627}
2628
2629static int
2630twa_soft_reset(struct twa_softc *sc)
2631{
2632 uint32_t status_reg;
2633
2634 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
2635 TWA_CONTROL_ISSUE_SOFT_RESET |
2636 TWA_CONTROL_CLEAR_HOST_INTERRUPT |
2637 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT |
2638 TWA_CONTROL_MASK_COMMAND_INTERRUPT |
2639 TWA_CONTROL_MASK_RESPONSE_INTERRUPT |
2640 TWA_CONTROL_DISABLE_INTERRUPTS);
2641
2642 if (twa_drain_response_queue_large(sc, 30) != 0) {
2643 aprint_error_dev(sc->twa_dv,
2644 "response queue not empty after reset.\n");
2645 return(1);
2646 }
2647 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY |
2648 TWA_STATUS_ATTENTION_INTERRUPT, 30)) {
2649 aprint_error_dev(sc->twa_dv,
2650 "no attention interrupt after reset.\n");
2651 return(1);
2652 }
2653 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
2654 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT);
2655
2656 if (twa_drain_response_queue(sc)) {
2657 aprint_error_dev(sc->twa_dv, "cannot drain response queue.\n");
2658 return(1);
2659 }
2660 if (twa_drain_aen_queue(sc)) {
2661 aprint_error_dev(sc->twa_dv, "cannot drain AEN queue.\n");
2662 return(1);
2663 }
2664 if (twa_find_aen(sc, TWA_AEN_SOFT_RESET)) {
2665 aprint_error_dev(sc->twa_dv,
2666 "reset not reported by controller.\n");
2667 return(1);
2668 }
2669 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
2670 if (TWA_STATUS_ERRORS(status_reg) ||
2671 twa_check_ctlr_state(sc, status_reg)) {
2672 aprint_error_dev(sc->twa_dv, "controller errors detected.\n");
2673 return(1);
2674 }
2675 return(0);
2676}
2677
2678static int
2679twa_wait_status(struct twa_softc *sc, uint32_t status, uint32_t timeout)
2680{
2681 struct timeval t1;
2682 time_t end_time;
2683 uint32_t status_reg;
2684
2685 timeout = (timeout * 1000 * 100);
2686
2687 microtime(&t1);
2688
2689 end_time = t1.tv_usec + timeout;
2690
2691 do {
2692 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
2693 /* got the required bit(s)? */
2694 if ((status_reg & status) == status)
2695 return(0);
2696 DELAY(100000);
2697 microtime(&t1);
2698 } while (t1.tv_usec <= end_time);
2699
2700 return(1);
2701}
2702
2703static int
2704twa_fetch_aen(struct twa_softc *sc)
2705{
2706 struct twa_request *tr;
2707 int s, error = 0;
2708
2709 s = splbio();
2710
2711 if ((tr = twa_get_request(sc, TWA_CMD_AEN)) == NULL) {
2712 splx(s);
2713 return(EIO);
2714 }
2715 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL;
2716 tr->tr_callback = twa_aen_callback;
2717 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT);
2718 if (twa_request_sense(tr, 0) != 0) {
2719 if (tr->tr_data)
2720 free(tr->tr_data, M_DEVBUF);
2721 twa_release_request(tr);
2722 error = 1;
2723 }
2724 splx(s);
2725
2726 return(error);
2727}
2728
2729/*
2730 * Function name: twa_aen_callback
2731 * Description: Callback for requests to fetch AEN's.
2732 *
2733 * Input: tr -- ptr to completed request pkt
2734 * Output: None
2735 * Return value: None
2736 */
2737static void
2738twa_aen_callback(struct twa_request *tr)
2739{
2740 int i;
2741 int fetch_more_aens = 0;
2742 struct twa_softc *sc = tr->tr_sc;
2743 struct twa_command_header *cmd_hdr =
2744 (struct twa_command_header *)(tr->tr_data);
2745 struct twa_command_9k *cmd =
2746 &(tr->tr_command->command.cmd_pkt_9k);
2747
2748 if (! cmd->status) {
2749 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) &&
2750 (cmd->cdb[0] == 0x3 /* REQUEST_SENSE */))
2751 if (twa_enqueue_aen(sc, cmd_hdr)
2752 != TWA_AEN_QUEUE_EMPTY)
2753 fetch_more_aens = 1;
2754 } else {
2755 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0';
2756 for (i = 0; i < 18; i++)
2757 printf("%x\t", tr->tr_command->cmd_hdr.sense_data[i]);
2758 printf("\n"); /* print new line */
2759
2760 for (i = 0; i < 128; i++)
2761 printf("%x\t", ((int8_t *)(tr->tr_data))[i]);
2762 printf("\n"); /* print new line */
2763 }
2764 if (tr->tr_data)
2765 free(tr->tr_data, M_DEVBUF);
2766 twa_release_request(tr);
2767
2768 if (fetch_more_aens)
2769 twa_fetch_aen(sc);
2770}
2771
2772/*
2773 * Function name: twa_enqueue_aen
2774 * Description: Queues AEN's to be supplied to user-space tools on request.
2775 *
2776 * Input: sc -- ptr to per ctlr structure
2777 * cmd_hdr -- ptr to hdr of fw cmd pkt, from where the AEN
2778 * details can be retrieved.
2779 * Output: None
2780 * Return value: None
2781 */
2782static uint16_t
2783twa_enqueue_aen(struct twa_softc *sc, struct twa_command_header *cmd_hdr)
2784{
2785 int rv __diagused, s;
2786 struct tw_cl_event_packet *event;
2787 uint16_t aen_code;
2788 unsigned long sync_time;
2789
2790 s = splbio();
2791 aen_code = cmd_hdr->status_block.error;
2792
2793 switch (aen_code) {
2794 case TWA_AEN_SYNC_TIME_WITH_HOST:
2795
2796 sync_time = (time_second - (3 * 86400)) % 604800;
2797 rv = twa_set_param(sc, TWA_PARAM_TIME_TABLE,
2798 TWA_PARAM_TIME_SchedulerTime, 4,
2799 &sync_time, twa_aen_callback);
2800#ifdef DIAGNOSTIC
2801 if (rv != 0)
2802 aprint_error_dev(sc->twa_dv,
2803 "unable to sync time with ctlr\n");
2804#endif
2805 break;
2806
2807 case TWA_AEN_QUEUE_EMPTY:
2808 break;
2809
2810 default:
2811 /* Queue the event. */
2812 event = sc->twa_aen_queue[sc->twa_aen_head];
2813 if (event->retrieved == TWA_AEN_NOT_RETRIEVED)
2814 sc->twa_aen_queue_overflow = TRUE;
2815 event->severity =
2816 cmd_hdr->status_block.substatus_block.severity;
2817 event->time_stamp_sec = time_second;
2818 event->aen_code = aen_code;
2819 event->retrieved = TWA_AEN_NOT_RETRIEVED;
2820 event->sequence_id = ++(sc->twa_current_sequence_id);
2821 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0';
2822 event->parameter_len = strlen(cmd_hdr->err_specific_desc);
2823 memcpy(event->parameter_data, cmd_hdr->err_specific_desc,
2824 event->parameter_len);
2825
2826 if (event->severity < TWA_AEN_SEVERITY_DEBUG) {
2827 printf("%s: AEN 0x%04X: %s: %s: %s\n",
2828 device_xname(sc->twa_dv),
2829 aen_code,
2830 twa_aen_severity_table[event->severity],
2831 twa_find_msg_string(twa_aen_table, aen_code),
2832 event->parameter_data);
2833 }
2834
2835 if ((sc->twa_aen_head + 1) == TWA_Q_LENGTH)
2836 sc->twa_aen_queue_wrapped = TRUE;
2837 sc->twa_aen_head = (sc->twa_aen_head + 1) % TWA_Q_LENGTH;
2838 break;
2839 } /* switch */
2840 splx(s);
2841
2842 return (aen_code);
2843}
2844
2845/*
2846 * Function name: twa_find_aen
2847 * Description: Reports whether a given AEN ever occurred.
2848 *
2849 * Input: sc -- ptr to per ctlr structure
2850 * aen_code-- AEN to look for
2851 * Output: None
2852 * Return value: 0 -- success
2853 * non-zero-- failure
2854 */
2855static int
2856twa_find_aen(struct twa_softc *sc, uint16_t aen_code)
2857{
2858 uint32_t last_index;
2859 int s;
2860 int i;
2861
2862 s = splbio();
2863
2864 if (sc->twa_aen_queue_wrapped)
2865 last_index = sc->twa_aen_head;
2866 else
2867 last_index = 0;
2868
2869 i = sc->twa_aen_head;
2870 do {
2871 i = (i + TWA_Q_LENGTH - 1) % TWA_Q_LENGTH;
2872 if ((sc->twa_aen_queue[i])->aen_code == aen_code) {
2873 splx(s);
2874 return(0);
2875 }
2876 } while (i != last_index);
2877
2878 splx(s);
2879 return(1);
2880}
2881
2882static inline void
2883twa_request_init(struct twa_request *tr, int flags)
2884{
2885 tr->tr_data = NULL;
2886 tr->tr_real_data = NULL;
2887 tr->tr_length = 0;
2888 tr->tr_real_length = 0;
2889 tr->tr_status = TWA_CMD_SETUP;/* command is in setup phase */
2890 tr->tr_flags = flags;
2891 tr->tr_error = 0;
2892 tr->tr_callback = NULL;
2893 tr->tr_cmd_pkt_type = 0;
2894 tr->bp = 0;
2895
2896 /*
2897 * Look at the status field in the command packet to see how
2898 * it completed the last time it was used, and zero out only
2899 * the portions that might have changed. Note that we don't
2900 * care to zero out the sglist.
2901 */
2902 if (tr->tr_command->command.cmd_pkt_9k.status)
2903 memset(tr->tr_command, 0,
2904 sizeof(struct twa_command_header) + 28);
2905 else
2906 memset(&(tr->tr_command->command), 0, 28);
2907}
2908
2909struct twa_request *
2910twa_get_request_wait(struct twa_softc *sc, int flags)
2911{
2912 struct twa_request *tr;
2913 int s;
2914
2915 KASSERT((flags & TWA_CMD_AEN) == 0);
2916
2917 s = splbio();
2918 while ((tr = TAILQ_FIRST(&sc->twa_free)) == NULL) {
2919 sc->twa_sc_flags |= TWA_STATE_REQUEST_WAIT;
2920 (void) tsleep(&sc->twa_free, PRIBIO, "twaccb", hz);
2921 }
2922 TAILQ_REMOVE(&sc->twa_free, tr, tr_link);
2923
2924 splx(s);
2925
2926 twa_request_init(tr, flags);
2927
2928 return(tr);
2929}
2930
2931struct twa_request *
2932twa_get_request(struct twa_softc *sc, int flags)
2933{
2934 int s;
2935 struct twa_request *tr;
2936
2937 /* Get a free request packet. */
2938 s = splbio();
2939 if (__predict_false((flags & TWA_CMD_AEN) != 0)) {
2940
2941 if ((sc->sc_twa_request->tr_flags & TWA_CMD_AEN_BUSY) == 0) {
2942 tr = sc->sc_twa_request;
2943 flags |= TWA_CMD_AEN_BUSY;
2944 } else {
2945 splx(s);
2946 return (NULL);
2947 }
2948 } else {
2949 if (__predict_false((tr =
2950 TAILQ_FIRST(&sc->twa_free)) == NULL)) {
2951 splx(s);
2952 return (NULL);
2953 }
2954 TAILQ_REMOVE(&sc->twa_free, tr, tr_link);
2955 }
2956 splx(s);
2957
2958 twa_request_init(tr, flags);
2959
2960 return(tr);
2961}
2962
2963/*
2964 * Print some information about the controller
2965 */
2966static void
2967twa_describe_controller(struct twa_softc *sc)
2968{
2969 struct twa_param_9k *p[10];
2970 int i, rv = 0;
2971 uint32_t dsize;
2972 uint8_t ports;
2973
2974 memset(p, 0, sizeof(p));
2975
2976 /* Get the port count. */
2977 rv |= twa_get_param(sc, TWA_PARAM_CONTROLLER,
2978 TWA_PARAM_CONTROLLER_PortCount, 1, NULL, &p[0]);
2979
2980 /* get version strings */
2981 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_FW,
2982 16, NULL, &p[1]);
2983 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_BIOS,
2984 16, NULL, &p[2]);
2985 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_Mon,
2986 16, NULL, &p[3]);
2987 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCBA,
2988 8, NULL, &p[4]);
2989 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_ATA,
2990 8, NULL, &p[5]);
2991 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCI,
2992 8, NULL, &p[6]);
2993 rv |= twa_get_param(sc, TWA_PARAM_DRIVESUMMARY, TWA_PARAM_DRIVESTATUS,
2994 16, NULL, &p[7]);
2995
2996 if (rv) {
2997 /* some error occurred */
2998 aprint_error_dev(sc->twa_dv,
2999 "failed to fetch version information\n");
3000 goto bail;
3001 }
3002
3003 ports = *(uint8_t *)(p[0]->data);
3004
3005 aprint_normal_dev(sc->twa_dv, "%d ports, Firmware %.16s, BIOS %.16s\n",
3006 ports, p[1]->data, p[2]->data);
3007
3008 aprint_verbose_dev(sc->twa_dv,
3009 "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n",
3010 p[3]->data, p[4]->data,
3011 p[5]->data, p[6]->data);
3012
3013 for (i = 0; i < ports; i++) {
3014
3015 if ((*((char *)(p[7]->data + i)) & TWA_DRIVE_DETECTED) == 0)
3016 continue;
3017
3018 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i,
3019 TWA_PARAM_DRIVEMODELINDEX,
3020 TWA_PARAM_DRIVEMODEL_LENGTH, NULL, &p[8]);
3021
3022 if (rv != 0) {
3023 aprint_error_dev(sc->twa_dv,
3024 "unable to get drive model for port %d\n", i);
3025 continue;
3026 }
3027
3028 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i,
3029 TWA_PARAM_DRIVESIZEINDEX,
3030 TWA_PARAM_DRIVESIZE_LENGTH, NULL, &p[9]);
3031
3032 if (rv != 0) {
3033 aprint_error_dev(sc->twa_dv, "unable to get drive size"
3034 " for port %d\n", i);
3035 free(p[8], M_DEVBUF);
3036 continue;
3037 }
3038
3039 dsize = *(uint32_t *)(p[9]->data);
3040
3041 aprint_verbose_dev(sc->twa_dv, "port %d: %.40s %d MB\n",
3042 i, p[8]->data, dsize / 2048);
3043
3044 if (p[8])
3045 free(p[8], M_DEVBUF);
3046 if (p[9])
3047 free(p[9], M_DEVBUF);
3048 }
3049bail:
3050 if (p[0])
3051 free(p[0], M_DEVBUF);
3052 if (p[1])
3053 free(p[1], M_DEVBUF);
3054 if (p[2])
3055 free(p[2], M_DEVBUF);
3056 if (p[3])
3057 free(p[3], M_DEVBUF);
3058 if (p[4])
3059 free(p[4], M_DEVBUF);
3060 if (p[5])
3061 free(p[5], M_DEVBUF);
3062 if (p[6])
3063 free(p[6], M_DEVBUF);
3064}
3065
3066/*
3067 * Function name: twa_check_ctlr_state
3068 * Description: Makes sure that the fw status register reports a
3069 * proper status.
3070 *
3071 * Input: sc -- ptr to per ctlr structure
3072 * status_reg -- value in the status register
3073 * Output: None
3074 * Return value: 0 -- no errors
3075 * non-zero-- errors
3076 */
3077static int
3078twa_check_ctlr_state(struct twa_softc *sc, uint32_t status_reg)
3079{
3080 int result = 0;
3081 struct timeval t1;
3082 static time_t last_warning[2] = {0, 0};
3083
3084 /* Check if the 'micro-controller ready' bit is not set. */
3085 if ((status_reg & TWA_STATUS_EXPECTED_BITS) !=
3086 TWA_STATUS_EXPECTED_BITS) {
3087
3088 microtime(&t1);
3089
3090 last_warning[0] += (5 * 1000 * 100);
3091
3092 if (t1.tv_usec > last_warning[0]) {
3093 microtime(&t1);
3094 last_warning[0] = t1.tv_usec;
3095 }
3096 result = 1;
3097 }
3098
3099 /* Check if any error bits are set. */
3100 if ((status_reg & TWA_STATUS_UNEXPECTED_BITS) != 0) {
3101
3102 microtime(&t1);
3103 last_warning[1] += (5 * 1000 * 100);
3104 if (t1.tv_usec > last_warning[1]) {
3105 microtime(&t1);
3106 last_warning[1] = t1.tv_usec;
3107 }
3108 if (status_reg & TWA_STATUS_PCI_PARITY_ERROR_INTERRUPT) {
3109 aprint_error_dev(sc->twa_dv, "clearing PCI parity "
3110 "error re-seat/move/replace card.\n");
3111 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
3112 TWA_CONTROL_CLEAR_PARITY_ERROR);
3113 pci_conf_write(sc->pc, sc->tag,
3114 PCI_COMMAND_STATUS_REG,
3115 TWA_PCI_CONFIG_CLEAR_PARITY_ERROR);
3116 }
3117 if (status_reg & TWA_STATUS_PCI_ABORT_INTERRUPT) {
3118 aprint_error_dev(sc->twa_dv, "clearing PCI abort\n");
3119 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
3120 TWA_CONTROL_CLEAR_PCI_ABORT);
3121 pci_conf_write(sc->pc, sc->tag,
3122 PCI_COMMAND_STATUS_REG,
3123 TWA_PCI_CONFIG_CLEAR_PCI_ABORT);
3124 }
3125 if (status_reg & TWA_STATUS_QUEUE_ERROR_INTERRUPT) {
3126 /*
3127 * As documented by 3ware, the 9650 erroneously
3128 * flags queue errors during resets.
3129 * Just ignore them during the reset instead of
3130 * bothering the console.
3131 */
3132 if ((sc->sc_product_id != PCI_PRODUCT_3WARE_9650) ||
3133 ((sc->twa_sc_flags & TWA_STATE_IN_RESET) == 0)) {
3134 aprint_error_dev(sc->twa_dv,
3135 "clearing controller queue error\n");
3136 }
3137
3138 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
3139 TWA_CONTROL_CLEAR_QUEUE_ERROR);
3140 }
3141 if (status_reg & TWA_STATUS_MICROCONTROLLER_ERROR) {
3142 aprint_error_dev(sc->twa_dv,
3143 "micro-controller error\n");
3144 result = 1;
3145 }
3146 }
3147 return(result);
3148}
3149
3150MODULE(MODULE_CLASS_DRIVER, twa, "pci");
3151
3152#ifdef _MODULE
3153#include "ioconf.c"
3154#endif
3155
3156static int
3157twa_modcmd(modcmd_t cmd, void *opaque)
3158{
3159 int error = 0;
3160
3161#ifdef _MODULE
3162 switch (cmd) {
3163 case MODULE_CMD_INIT:
3164 error = config_init_component(cfdriver_ioconf_twa,
3165 cfattach_ioconf_twa, cfdata_ioconf_twa);
3166 break;
3167 case MODULE_CMD_FINI:
3168 error = config_fini_component(cfdriver_ioconf_twa,
3169 cfattach_ioconf_twa, cfdata_ioconf_twa);
3170 break;
3171 default:
3172 error = ENOTTY;
3173 break;
3174 }
3175#endif
3176
3177 return error;
3178}
3179