1 | /* $NetBSD: pcmciareg.h,v 1.10 2005/12/11 12:23:23 christos Exp $ */ |
2 | |
3 | /* |
4 | * Copyright (c) 1997 Marc Horowitz. All rights reserved. |
5 | * |
6 | * Redistribution and use in source and binary forms, with or without |
7 | * modification, are permitted provided that the following conditions |
8 | * are met: |
9 | * 1. Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * 2. Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
14 | * 3. All advertising materials mentioning features or use of this software |
15 | * must display the following acknowledgement: |
16 | * This product includes software developed by Marc Horowitz. |
17 | * 4. The name of the author may not be used to endorse or promote products |
18 | * derived from this software without specific prior written permission. |
19 | * |
20 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
21 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
22 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
23 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
24 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
25 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
26 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
27 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
28 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
29 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
30 | */ |
31 | |
32 | /* most of this is from the PCMCIA PC Card Standard, Release 2.1 */ |
33 | |
34 | /* Note: the weird indenting here is to make the constants more |
35 | readable. Please don't normalize it. --marc */ |
36 | |
37 | /* |
38 | * CIS Tuples */ |
39 | |
40 | /* Layer 1 Basic Compatibility Tuples */ |
41 | #define PCMCIA_CISTPL_NULL 0x00 |
42 | #define PCMCIA_CISTPL_DEVICE 0x01 |
43 | #define PCMCIA_DTYPE_MASK 0xF0 |
44 | #define PCMCIA_DTYPE_NULL 0x00 |
45 | #define PCMCIA_DTYPE_ROM 0x10 |
46 | #define PCMCIA_DTYPE_OTPROM 0x20 |
47 | #define PCMCIA_DTYPE_EPROM 0x30 |
48 | #define PCMCIA_DTYPE_EEPROM 0x40 |
49 | #define PCMCIA_DTYPE_FLASH 0x50 |
50 | #define PCMCIA_DTYPE_SRAM 0x60 |
51 | #define PCMCIA_DTYPE_DRAM 0x70 |
52 | #define PCMCIA_DTYPE_FUNCSPEC 0xD0 |
53 | #define PCMCIA_DTYPE_EXTEND 0xE0 |
54 | #define PCMCIA_DSPEED_MASK 0x07 |
55 | #define PCMCIA_DSPEED_NULL 0x00 |
56 | #define PCMCIA_DSPEED_250NS 0x01 |
57 | #define PCMCIA_DSPEED_200NS 0x02 |
58 | #define PCMCIA_DSPEED_150NS 0x03 |
59 | #define PCMCIA_DSPEED_100NS 0x04 |
60 | #define PCMCIA_DSPEED_EXT 0x07 |
61 | |
62 | /* |
63 | * the 2.1 docs have 0x02-0x07 as reserved, but the linux drivers list the |
64 | * follwing tuple code values. I have at least one card (3com 3c562 |
65 | * lan+modem) which has a code 0x06 tuple, so I'm going to assume that these |
66 | * are for real |
67 | */ |
68 | |
69 | #define PCMCIA_CISTPL_LONGLINK_CB 0x02 |
70 | #define PCMCIA_CISTPL_INDIRECT 0x03 |
71 | #define PCMCIA_CISTPL_CONFIG_CB 0x04 |
72 | #define PCMCIA_CISTPL_CFTABLE_ENTRY_CB 0x05 |
73 | #define PCMCIA_CISTPL_LONGLINK_MFC 0x06 |
74 | #define PCMCIA_MFC_MEM_ATTR 0x00 |
75 | #define PCMCIA_MFC_MEM_COMMON 0x01 |
76 | #define PCMCIA_CISTPL_BAR 0x07 |
77 | #define PCMCIA_CISTPL_PWR_MGMNT 0x08 |
78 | |
79 | #define PCMCIA_CISTPL_CHECKSUM 0x10 |
80 | #define PCMCIA_CISTPL_LONGLINK_A 0x11 |
81 | #define PCMCIA_CISTPL_LONGLINK_C 0x12 |
82 | #define PCMCIA_CISTPL_LINKTARGET 0x13 |
83 | #define PCMCIA_CISTPL_NO_LINK 0x14 |
84 | #define PCMCIA_CISTPL_VERS_1 0x15 |
85 | #define PCMCIA_CISTPL_ALTSTR 0x16 |
86 | #define PCMCIA_CISTPL_DEVICE_A 0x17 |
87 | #define PCMCIA_CISTPL_JEDEC_C 0x18 |
88 | #define PCMCIA_CISTPL_JEDEC_A 0x19 |
89 | #define PCMCIA_CISTPL_CONFIG 0x1A |
90 | #define PCMCIA_TPCC_RASZ_MASK 0x03 |
91 | #define PCMCIA_TPCC_RASZ_SHIFT 0 |
92 | #define PCMCIA_TPCC_RMSZ_MASK 0x3C |
93 | #define PCMCIA_TPCC_RMSZ_SHIFT 2 |
94 | #define PCMCIA_TPCC_RFSZ_MASK 0xC0 |
95 | #define PCMCIA_TPCC_RFSZ_SHIFT 6 |
96 | #define PCMCIA_CISTPL_CFTABLE_ENTRY 0x1B |
97 | #define PCMCIA_TPCE_INDX_INTFACE 0x80 |
98 | #define PCMCIA_TPCE_INDX_DEFAULT 0x40 |
99 | #define PCMCIA_TPCE_INDX_NUM_MASK 0x3F |
100 | #define PCMCIA_TPCE_IF_MWAIT 0x80 |
101 | #define PCMCIA_TPCE_IF_RDYBSY 0x40 |
102 | #define PCMCIA_TPCE_IF_WP 0x20 |
103 | #define PCMCIA_TPCE_IF_BVD 0x10 |
104 | #define PCMCIA_TPCE_IF_IFTYPE 0x0F |
105 | #define PCMCIA_IFTYPE_MEMORY 0 |
106 | #define PCMCIA_IFTYPE_IO 1 |
107 | #define PCMCIA_TPCE_FS_MISC 0x80 |
108 | #define PCMCIA_TPCE_FS_MEMSPACE_MASK 0x60 |
109 | #define PCMCIA_TPCE_FS_MEMSPACE_NONE 0x00 |
110 | #define PCMCIA_TPCE_FS_MEMSPACE_LENGTH 0x20 |
111 | #define PCMCIA_TPCE_FS_MEMSPACE_LENGTHADDR 0x40 |
112 | #define PCMCIA_TPCE_FS_MEMSPACE_TABLE 0x60 |
113 | #define PCMCIA_TPCE_FS_IRQ 0x10 |
114 | #define PCMCIA_TPCE_FS_IOSPACE 0x08 |
115 | #define PCMCIA_TPCE_FS_TIMING 0x04 |
116 | #define PCMCIA_TPCE_FS_POWER_MASK 0x03 |
117 | #define PCMCIA_TPCE_FS_POWER_NONE 0x00 |
118 | #define PCMCIA_TPCE_FS_POWER_VCC 0x01 |
119 | #define PCMCIA_TPCE_FS_POWER_VCCVPP1 0x02 |
120 | #define PCMCIA_TPCE_FS_POWER_VCCVPP1VPP2 0x03 |
121 | #define PCMCIA_TPCE_TD_RESERVED_MASK 0xE0 |
122 | #define PCMCIA_TPCE_TD_RDYBSY_MASK 0x1C |
123 | #define PCMCIA_TPCE_TD_WAIT_MASK 0x03 |
124 | #define PCMCIA_TPCE_IO_HASRANGE 0x80 |
125 | #define PCMCIA_TPCE_IO_BUSWIDTH_16BIT 0x40 |
126 | #define PCMCIA_TPCE_IO_BUSWIDTH_8BIT 0x20 |
127 | #define PCMCIA_TPCE_IO_IOADDRLINES_MASK 0x1F |
128 | #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_MASK 0xC0 |
129 | #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_NONE 0x00 |
130 | #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_ONE 0x40 |
131 | #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_TWO 0x80 |
132 | #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_FOUR 0xC0 |
133 | #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_MASK 0x30 |
134 | #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_NONE 0x00 |
135 | #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_ONE 0x10 |
136 | #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_TWO 0x20 |
137 | #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_FOUR 0x30 |
138 | #define PCMCIA_TPCE_IO_RANGE_COUNT 0x0F |
139 | #define PCMCIA_TPCE_IR_SHARE 0x80 |
140 | #define PCMCIA_TPCE_IR_PULSE 0x40 |
141 | #define PCMCIA_TPCE_IR_LEVEL 0x20 |
142 | #define PCMCIA_TPCE_IR_HASMASK 0x10 |
143 | #define PCMCIA_TPCE_IR_IRQ 0x0F |
144 | #define PCMCIA_TPCE_MS_HOSTADDR 0x80 |
145 | #define PCMCIA_TPCE_MS_CARDADDR_SIZE_MASK 0x60 |
146 | #define PCMCIA_TPCE_MS_CARDADDR_SIZE_SHIFT 5 |
147 | #define PCMCIA_TPCE_MS_LENGTH_SIZE_MASK 0x18 |
148 | #define PCMCIA_TPCE_MS_LENGTH_SIZE_SHIFT 3 |
149 | #define PCMCIA_TPCE_MS_COUNT 0x07 |
150 | #define PCMCIA_TPCE_MI_EXT 0x80 |
151 | #define PCMCIA_TPCE_MI_RESERVED 0x40 |
152 | #define PCMCIA_TPCE_MI_PWRDOWN 0x20 |
153 | #define PCMCIA_TPCE_MI_READONLY 0x10 |
154 | #define PCMCIA_TPCE_MI_AUDIO 0x08 |
155 | #define PCMCIA_TPCE_MI_MAXTWINS 0x07 |
156 | #define PCMCIA_CISTPL_DEVICE_OC 0x1C |
157 | #define PCMCIA_CISTPL_DEVICE_OA 0x1D |
158 | #define PCMCIA_CISTPL_DEVICE_GEO 0x1E |
159 | #define PCMCIA_CISTPL_DEVICE_GEO_A 0x1F |
160 | #define PCMCIA_CISTPL_MANFID 0x20 |
161 | #define PCMCIA_CISTPL_FUNCID 0x21 |
162 | #define PCMCIA_FUNCTION_UNSPEC -1 |
163 | #define PCMCIA_FUNCTION_MULTIFUNCTION 0 |
164 | #define PCMCIA_FUNCTION_MEMORY 1 |
165 | #define PCMCIA_FUNCTION_SERIAL 2 |
166 | #define PCMCIA_FUNCTION_PARALLEL 3 |
167 | #define PCMCIA_FUNCTION_DISK 4 |
168 | #define PCMCIA_FUNCTION_VIDEO 5 |
169 | #define PCMCIA_FUNCTION_NETWORK 6 |
170 | #define PCMCIA_FUNCTION_AIMS 7 |
171 | #define PCMCIA_FUNCTION_SCSI 8 |
172 | #define PCMCIA_FUNCTION_SECURITY 9 |
173 | #define PCMCIA_FUNCTION_INSTRUMENT 10 |
174 | #define PCMCIA_CISTPL_FUNCE 0x22 |
175 | #define PCMCIA_TPLFE_TYPE_LAN_TECH 0x01 |
176 | #define PCMCIA_TPLFE_TYPE_LAN_SPEED 0x02 |
177 | #define PCMCIA_TPLFE_TYPE_LAN_MEDIA 0x03 |
178 | #define PCMCIA_TPLFE_TYPE_LAN_NID 0x04 |
179 | #define PCMCIA_TPLFE_TYPE_LAN_CONN 0x05 |
180 | #define PCMCIA_TPLFE_TYPE_DISK_DEVICE_INTERFACE 0x01 |
181 | #define PCMCIA_TPLFE_DDI_PCCARD_ATA 0x01 |
182 | #define PCMCIA_CISTPL_END 0xFF |
183 | |
184 | /* Layer 2 Data Recording Format Tuples */ |
185 | |
186 | #define PCMCIA_CISTPL_SWIL 0x23 |
187 | /* #define PCMCIA_CISTPL_RESERVED 0x24-0x3F */ |
188 | #define PCMCIA_CISTPL_VERS_2 0x40 |
189 | #define PCMCIA_CISTPL_FORMAT 0x41 |
190 | #define PCMCIA_CISTPL_GEOMETRY 0x42 |
191 | #define PCMCIA_CISTPL_BYTEORDER 0x43 |
192 | #define PCMCIA_CISTPL_DATE 0x44 |
193 | #define PCMCIA_CISTPL_BATTERY 0x45 |
194 | #define PCMCIA_CISTPL_FORAMT_A 0x47 |
195 | |
196 | /* Layer 3 Data Organization Tuples */ |
197 | |
198 | #define PCMCIA_CISTPL_ORG 0x46 |
199 | /* #define PCMCIA_CISTPL_RESERVED 0x47-0x7F */ |
200 | |
201 | /* Layer 4 System-Specific Standard Tuples */ |
202 | |
203 | /* #define PCMCIA_CISTPL_RESERVED 0x80-0x8F */ |
204 | #define PCMCIA_CISTPL_SPCL 0x90 |
205 | /* #define PCMCIA_CISTPL_RESERVED 0x90-0xFE */ |
206 | |
207 | /* |
208 | * Card Configuration Registers |
209 | */ |
210 | |
211 | #define PCMCIA_CCR_OPTION 0 |
212 | #define PCMCIA_CCR_OPTION_SRESET 0x80 |
213 | #define PCMCIA_CCR_OPTION_LEVIREQ 0x40 |
214 | #define PCMCIA_CCR_OPTION_CFINDEX 0x3F |
215 | #define PCMCIA_CCR_OPTION_IREQ_ENABLE 0x04 |
216 | #define PCMCIA_CCR_OPTION_ADDR_DECODE 0x02 |
217 | #define PCMCIA_CCR_OPTION_FUNC_ENABLE 0x01 |
218 | #define PCMCIA_CCR_STATUS 1 |
219 | #define PCMCIA_CCR_STATUS_PINCHANGED 0x80 |
220 | #define PCMCIA_CCR_STATUS_SIGCHG 0x40 |
221 | #define PCMCIA_CCR_STATUS_IOIS8 0x20 |
222 | #define PCMCIA_CCR_STATUS_RESERVED1 0x10 |
223 | #define PCMCIA_CCR_STATUS_AUDIO 0x08 |
224 | #define PCMCIA_CCR_STATUS_PWRDWN 0x04 |
225 | #define PCMCIA_CCR_STATUS_INTR 0x02 |
226 | #define PCMCIA_CCR_STATUS_INTRACK 0x01 |
227 | #define PCMCIA_CCR_PIN 2 |
228 | #define PCMCIA_CCR_PIN_CBVD1 0x80 |
229 | #define PCMCIA_CCR_PIN_CBVD2 0x40 |
230 | #define PCMCIA_CCR_PIN_CRDYBSY 0x20 |
231 | #define PCMCIA_CCR_PIN_CWPROT 0x10 |
232 | #define PCMCIA_CCR_PIN_RBVD1 0x08 |
233 | #define PCMCIA_CCR_PIN_RBVD2 0x04 |
234 | #define PCMCIA_CCR_PIN_RRDYBSY 0x02 |
235 | #define PCMCIA_CCR_PIN_RWPROT 0x01 |
236 | #define PCMCIA_CCR_SOCKETCOPY 3 |
237 | #define PCMCIA_CCR_SOCKETCOPY_RESERVED 0x80 |
238 | #define PCMCIA_CCR_SOCKETCOPY_COPY_MASK 0x70 |
239 | #define PCMCIA_CCR_SOCKETCOPY_COPY_SHIFT 4 |
240 | #define PCMCIA_CCR_SOCKETCOPY_SOCKET_MASK 0x0F |
241 | #define PCMCIA_CCR_EXTSTATUS 4 |
242 | #define PCMCIA_CCR_IOBASE0 5 |
243 | #define PCMCIA_CCR_IOBASE1 6 |
244 | #define PCMCIA_CCR_IOBASE2 7 |
245 | #define PCMCIA_CCR_IOBASE3 8 |
246 | #define PCMCIA_CCR_IOLIMIT 9 |
247 | |
248 | #define PCMCIA_CCR_SIZE 0x14 |
249 | |