1 | /* $NetBSD: nouveau_engine_disp_nvf0.c,v 1.1.1.1 2014/08/06 12:36:24 riastradh Exp $ */ |
2 | |
3 | /* |
4 | * Copyright 2012 Red Hat Inc. |
5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), |
8 | * to deal in the Software without restriction, including without limitation |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
10 | * and/or sell copies of the Software, and to permit persons to whom the |
11 | * Software is furnished to do so, subject to the following conditions: |
12 | * |
13 | * The above copyright notice and this permission notice shall be included in |
14 | * all copies or substantial portions of the Software. |
15 | * |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
22 | * OTHER DEALINGS IN THE SOFTWARE. |
23 | * |
24 | * Authors: Ben Skeggs |
25 | */ |
26 | |
27 | #include <sys/cdefs.h> |
28 | __KERNEL_RCSID(0, "$NetBSD: nouveau_engine_disp_nvf0.c,v 1.1.1.1 2014/08/06 12:36:24 riastradh Exp $" ); |
29 | |
30 | #include <engine/software.h> |
31 | #include <engine/disp.h> |
32 | |
33 | #include <core/class.h> |
34 | |
35 | #include "nv50.h" |
36 | |
37 | /******************************************************************************* |
38 | * Base display object |
39 | ******************************************************************************/ |
40 | |
41 | static struct nouveau_oclass |
42 | nvf0_disp_sclass[] = { |
43 | { NVF0_DISP_MAST_CLASS, &nvd0_disp_mast_ofuncs }, |
44 | { NVF0_DISP_SYNC_CLASS, &nvd0_disp_sync_ofuncs }, |
45 | { NVF0_DISP_OVLY_CLASS, &nvd0_disp_ovly_ofuncs }, |
46 | { NVF0_DISP_OIMM_CLASS, &nvd0_disp_oimm_ofuncs }, |
47 | { NVF0_DISP_CURS_CLASS, &nvd0_disp_curs_ofuncs }, |
48 | {} |
49 | }; |
50 | |
51 | static struct nouveau_oclass |
52 | nvf0_disp_base_oclass[] = { |
53 | { NVF0_DISP_CLASS, &nvd0_disp_base_ofuncs, nvd0_disp_base_omthds }, |
54 | {} |
55 | }; |
56 | |
57 | /******************************************************************************* |
58 | * Display engine implementation |
59 | ******************************************************************************/ |
60 | |
61 | static int |
62 | nvf0_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, |
63 | struct nouveau_oclass *oclass, void *data, u32 size, |
64 | struct nouveau_object **pobject) |
65 | { |
66 | struct nv50_disp_priv *priv; |
67 | int heads = nv_rd32(parent, 0x022448); |
68 | int ret; |
69 | |
70 | ret = nouveau_disp_create(parent, engine, oclass, heads, |
71 | "PDISP" , "display" , &priv); |
72 | *pobject = nv_object(priv); |
73 | if (ret) |
74 | return ret; |
75 | |
76 | nv_engine(priv)->sclass = nvf0_disp_base_oclass; |
77 | nv_engine(priv)->cclass = &nv50_disp_cclass; |
78 | nv_subdev(priv)->intr = nvd0_disp_intr; |
79 | INIT_WORK(&priv->supervisor, nvd0_disp_intr_supervisor); |
80 | priv->sclass = nvf0_disp_sclass; |
81 | priv->head.nr = heads; |
82 | priv->dac.nr = 3; |
83 | priv->sor.nr = 4; |
84 | priv->dac.power = nv50_dac_power; |
85 | priv->dac.sense = nv50_dac_sense; |
86 | priv->sor.power = nv50_sor_power; |
87 | priv->sor.hda_eld = nvd0_hda_eld; |
88 | priv->sor.hdmi = nvd0_hdmi_ctrl; |
89 | priv->sor.dp = &nvd0_sor_dp_func; |
90 | return 0; |
91 | } |
92 | |
93 | struct nouveau_oclass * |
94 | nvf0_disp_oclass = &(struct nv50_disp_impl) { |
95 | .base.base.handle = NV_ENGINE(DISP, 0x92), |
96 | .base.base.ofuncs = &(struct nouveau_ofuncs) { |
97 | .ctor = nvf0_disp_ctor, |
98 | .dtor = _nouveau_disp_dtor, |
99 | .init = _nouveau_disp_init, |
100 | .fini = _nouveau_disp_fini, |
101 | }, |
102 | .mthd.core = &nve0_disp_mast_mthd_chan, |
103 | .mthd.base = &nvd0_disp_sync_mthd_chan, |
104 | .mthd.ovly = &nve0_disp_ovly_mthd_chan, |
105 | .mthd.prev = -0x020000, |
106 | }.base.base; |
107 | |