1 | /* |
2 | * Copyright © 2009 Keith Packard |
3 | * |
4 | * Permission to use, copy, modify, distribute, and sell this software and its |
5 | * documentation for any purpose is hereby granted without fee, provided that |
6 | * the above copyright notice appear in all copies and that both that copyright |
7 | * notice and this permission notice appear in supporting documentation, and |
8 | * that the name of the copyright holders not be used in advertising or |
9 | * publicity pertaining to distribution of the software without specific, |
10 | * written prior permission. The copyright holders make no representations |
11 | * about the suitability of this software for any purpose. It is provided "as |
12 | * is" without express or implied warranty. |
13 | * |
14 | * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, |
15 | * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO |
16 | * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR |
17 | * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, |
18 | * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER |
19 | * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE |
20 | * OF THIS SOFTWARE. |
21 | */ |
22 | |
23 | #include <linux/kernel.h> |
24 | #include <linux/module.h> |
25 | #include <linux/delay.h> |
26 | #include <linux/init.h> |
27 | #include <linux/errno.h> |
28 | #include <linux/sched.h> |
29 | #include <linux/i2c.h> |
30 | #include <linux/export.h> |
31 | #include <linux/device.h> |
32 | #include <drm/drm_dp_helper.h> |
33 | #include <drm/drmP.h> |
34 | |
35 | /** |
36 | * DOC: dp helpers |
37 | * |
38 | * These functions contain some common logic and helpers at various abstraction |
39 | * levels to deal with Display Port sink devices and related things like DP aux |
40 | * channel transfers, EDID reading over DP aux channels, decoding certain DPCD |
41 | * blocks, ... |
42 | */ |
43 | |
44 | /* Run a single AUX_CH I2C transaction, writing/reading data as necessary */ |
45 | static int |
46 | i2c_algo_dp_aux_transaction(struct i2c_adapter *adapter, int mode, |
47 | uint8_t write_byte, uint8_t *read_byte) |
48 | { |
49 | struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data; |
50 | int ret; |
51 | |
52 | ret = (*algo_data->aux_ch)(adapter, mode, |
53 | write_byte, read_byte); |
54 | return ret; |
55 | } |
56 | |
57 | /* |
58 | * I2C over AUX CH |
59 | */ |
60 | |
61 | /* |
62 | * Send the address. If the I2C link is running, this 'restarts' |
63 | * the connection with the new address, this is used for doing |
64 | * a write followed by a read (as needed for DDC) |
65 | */ |
66 | static int |
67 | i2c_algo_dp_aux_address(struct i2c_adapter *adapter, u16 address, bool reading) |
68 | { |
69 | struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data; |
70 | int mode = MODE_I2C_START; |
71 | int ret; |
72 | |
73 | if (reading) |
74 | mode |= MODE_I2C_READ; |
75 | else |
76 | mode |= MODE_I2C_WRITE; |
77 | algo_data->address = address; |
78 | algo_data->running = true; |
79 | ret = i2c_algo_dp_aux_transaction(adapter, mode, 0, NULL); |
80 | return ret; |
81 | } |
82 | |
83 | /* |
84 | * Stop the I2C transaction. This closes out the link, sending |
85 | * a bare address packet with the MOT bit turned off |
86 | */ |
87 | static void |
88 | i2c_algo_dp_aux_stop(struct i2c_adapter *adapter, bool reading) |
89 | { |
90 | struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data; |
91 | int mode = MODE_I2C_STOP; |
92 | |
93 | if (reading) |
94 | mode |= MODE_I2C_READ; |
95 | else |
96 | mode |= MODE_I2C_WRITE; |
97 | if (algo_data->running) { |
98 | (void) i2c_algo_dp_aux_transaction(adapter, mode, 0, NULL); |
99 | algo_data->running = false; |
100 | } |
101 | } |
102 | |
103 | /* |
104 | * Write a single byte to the current I2C address, the |
105 | * the I2C link must be running or this returns -EIO |
106 | */ |
107 | static int |
108 | i2c_algo_dp_aux_put_byte(struct i2c_adapter *adapter, u8 byte) |
109 | { |
110 | struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data; |
111 | int ret; |
112 | |
113 | if (!algo_data->running) |
114 | return -EIO; |
115 | |
116 | ret = i2c_algo_dp_aux_transaction(adapter, MODE_I2C_WRITE, byte, NULL); |
117 | return ret; |
118 | } |
119 | |
120 | /* |
121 | * Read a single byte from the current I2C address, the |
122 | * I2C link must be running or this returns -EIO |
123 | */ |
124 | static int |
125 | i2c_algo_dp_aux_get_byte(struct i2c_adapter *adapter, u8 *byte_ret) |
126 | { |
127 | struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data; |
128 | int ret; |
129 | |
130 | if (!algo_data->running) |
131 | return -EIO; |
132 | |
133 | ret = i2c_algo_dp_aux_transaction(adapter, MODE_I2C_READ, 0, byte_ret); |
134 | return ret; |
135 | } |
136 | |
137 | static int |
138 | i2c_algo_dp_aux_xfer(struct i2c_adapter *adapter, |
139 | struct i2c_msg *msgs, |
140 | int num) |
141 | { |
142 | int ret = 0; |
143 | bool reading = false; |
144 | int m; |
145 | int b; |
146 | |
147 | for (m = 0; m < num; m++) { |
148 | u16 len = msgs[m].len; |
149 | u8 *buf = msgs[m].buf; |
150 | reading = (msgs[m].flags & I2C_M_RD) != 0; |
151 | ret = i2c_algo_dp_aux_address(adapter, msgs[m].addr, reading); |
152 | if (ret < 0) |
153 | break; |
154 | if (reading) { |
155 | for (b = 0; b < len; b++) { |
156 | ret = i2c_algo_dp_aux_get_byte(adapter, &buf[b]); |
157 | if (ret < 0) |
158 | break; |
159 | } |
160 | } else { |
161 | for (b = 0; b < len; b++) { |
162 | ret = i2c_algo_dp_aux_put_byte(adapter, buf[b]); |
163 | if (ret < 0) |
164 | break; |
165 | } |
166 | } |
167 | if (ret < 0) |
168 | break; |
169 | } |
170 | if (ret >= 0) |
171 | ret = num; |
172 | i2c_algo_dp_aux_stop(adapter, reading); |
173 | DRM_DEBUG_KMS("dp_aux_xfer return %d\n" , ret); |
174 | return ret; |
175 | } |
176 | |
177 | static u32 |
178 | i2c_algo_dp_aux_functionality(struct i2c_adapter *adapter) |
179 | { |
180 | return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | |
181 | I2C_FUNC_SMBUS_READ_BLOCK_DATA | |
182 | I2C_FUNC_SMBUS_BLOCK_PROC_CALL | |
183 | I2C_FUNC_10BIT_ADDR; |
184 | } |
185 | |
186 | static const struct i2c_algorithm i2c_dp_aux_algo = { |
187 | .master_xfer = i2c_algo_dp_aux_xfer, |
188 | .functionality = i2c_algo_dp_aux_functionality, |
189 | }; |
190 | |
191 | static void |
192 | i2c_dp_aux_reset_bus(struct i2c_adapter *adapter) |
193 | { |
194 | (void) i2c_algo_dp_aux_address(adapter, 0, false); |
195 | (void) i2c_algo_dp_aux_stop(adapter, false); |
196 | } |
197 | |
198 | static int |
199 | i2c_dp_aux_prepare_bus(struct i2c_adapter *adapter) |
200 | { |
201 | adapter->algo = &i2c_dp_aux_algo; |
202 | adapter->retries = 3; |
203 | i2c_dp_aux_reset_bus(adapter); |
204 | return 0; |
205 | } |
206 | |
207 | /** |
208 | * i2c_dp_aux_add_bus() - register an i2c adapter using the aux ch helper |
209 | * @adapter: i2c adapter to register |
210 | * |
211 | * This registers an i2c adapater that uses dp aux channel as it's underlaying |
212 | * transport. The driver needs to fill out the &i2c_algo_dp_aux_data structure |
213 | * and store it in the algo_data member of the @adapter argument. This will be |
214 | * used by the i2c over dp aux algorithm to drive the hardware. |
215 | * |
216 | * RETURNS: |
217 | * 0 on success, -ERRNO on failure. |
218 | */ |
219 | int |
220 | i2c_dp_aux_add_bus(struct i2c_adapter *adapter) |
221 | { |
222 | int error; |
223 | |
224 | error = i2c_dp_aux_prepare_bus(adapter); |
225 | if (error) |
226 | return error; |
227 | error = i2c_add_adapter(adapter); |
228 | return error; |
229 | } |
230 | EXPORT_SYMBOL(i2c_dp_aux_add_bus); |
231 | |
232 | /* Helpers for DP link training */ |
233 | static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r) |
234 | { |
235 | return link_status[r - DP_LANE0_1_STATUS]; |
236 | } |
237 | |
238 | static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE], |
239 | int lane) |
240 | { |
241 | int i = DP_LANE0_1_STATUS + (lane >> 1); |
242 | int s = (lane & 1) * 4; |
243 | u8 l = dp_link_status(link_status, i); |
244 | return (l >> s) & 0xf; |
245 | } |
246 | |
247 | bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE], |
248 | int lane_count) |
249 | { |
250 | u8 lane_align; |
251 | u8 lane_status; |
252 | int lane; |
253 | |
254 | lane_align = dp_link_status(link_status, |
255 | DP_LANE_ALIGN_STATUS_UPDATED); |
256 | if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0) |
257 | return false; |
258 | for (lane = 0; lane < lane_count; lane++) { |
259 | lane_status = dp_get_lane_status(link_status, lane); |
260 | if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS) |
261 | return false; |
262 | } |
263 | return true; |
264 | } |
265 | EXPORT_SYMBOL(drm_dp_channel_eq_ok); |
266 | |
267 | bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE], |
268 | int lane_count) |
269 | { |
270 | int lane; |
271 | u8 lane_status; |
272 | |
273 | for (lane = 0; lane < lane_count; lane++) { |
274 | lane_status = dp_get_lane_status(link_status, lane); |
275 | if ((lane_status & DP_LANE_CR_DONE) == 0) |
276 | return false; |
277 | } |
278 | return true; |
279 | } |
280 | EXPORT_SYMBOL(drm_dp_clock_recovery_ok); |
281 | |
282 | u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE], |
283 | int lane) |
284 | { |
285 | int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1); |
286 | int s = ((lane & 1) ? |
287 | DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT : |
288 | DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT); |
289 | u8 l = dp_link_status(link_status, i); |
290 | |
291 | return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT; |
292 | } |
293 | EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage); |
294 | |
295 | u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE], |
296 | int lane) |
297 | { |
298 | int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1); |
299 | int s = ((lane & 1) ? |
300 | DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT : |
301 | DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT); |
302 | u8 l = dp_link_status(link_status, i); |
303 | |
304 | return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT; |
305 | } |
306 | EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis); |
307 | |
308 | void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { |
309 | if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0) |
310 | udelay(100); |
311 | else |
312 | mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4); |
313 | } |
314 | EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay); |
315 | |
316 | void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { |
317 | if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0) |
318 | udelay(400); |
319 | else |
320 | mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4); |
321 | } |
322 | EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay); |
323 | |
324 | u8 drm_dp_link_rate_to_bw_code(int link_rate) |
325 | { |
326 | switch (link_rate) { |
327 | case 162000: |
328 | default: |
329 | return DP_LINK_BW_1_62; |
330 | case 270000: |
331 | return DP_LINK_BW_2_7; |
332 | case 540000: |
333 | return DP_LINK_BW_5_4; |
334 | } |
335 | } |
336 | EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code); |
337 | |
338 | int drm_dp_bw_code_to_link_rate(u8 link_bw) |
339 | { |
340 | switch (link_bw) { |
341 | case DP_LINK_BW_1_62: |
342 | default: |
343 | return 162000; |
344 | case DP_LINK_BW_2_7: |
345 | return 270000; |
346 | case DP_LINK_BW_5_4: |
347 | return 540000; |
348 | } |
349 | } |
350 | EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate); |
351 | |
352 | /** |
353 | * DOC: dp helpers |
354 | * |
355 | * The DisplayPort AUX channel is an abstraction to allow generic, driver- |
356 | * independent access to AUX functionality. Drivers can take advantage of |
357 | * this by filling in the fields of the drm_dp_aux structure. |
358 | * |
359 | * Transactions are described using a hardware-independent drm_dp_aux_msg |
360 | * structure, which is passed into a driver's .transfer() implementation. |
361 | * Both native and I2C-over-AUX transactions are supported. |
362 | */ |
363 | |
364 | static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request, |
365 | unsigned int offset, void *buffer, size_t size) |
366 | { |
367 | struct drm_dp_aux_msg msg; |
368 | unsigned int retry; |
369 | int err; |
370 | |
371 | memset(&msg, 0, sizeof(msg)); |
372 | msg.address = offset; |
373 | msg.request = request; |
374 | msg.buffer = buffer; |
375 | msg.size = size; |
376 | |
377 | /* |
378 | * The specification doesn't give any recommendation on how often to |
379 | * retry native transactions, so retry 7 times like for I2C-over-AUX |
380 | * transactions. |
381 | */ |
382 | for (retry = 0; retry < 7; retry++) { |
383 | err = aux->transfer(aux, &msg); |
384 | if (err < 0) { |
385 | if (err == -EBUSY) |
386 | continue; |
387 | |
388 | return err; |
389 | } |
390 | |
391 | |
392 | switch (msg.reply & DP_AUX_NATIVE_REPLY_MASK) { |
393 | case DP_AUX_NATIVE_REPLY_ACK: |
394 | if (err < size) |
395 | return -EPROTO; |
396 | return err; |
397 | |
398 | case DP_AUX_NATIVE_REPLY_NACK: |
399 | return -EIO; |
400 | |
401 | case DP_AUX_NATIVE_REPLY_DEFER: |
402 | usleep_range(400, 500); |
403 | break; |
404 | } |
405 | } |
406 | |
407 | DRM_DEBUG_KMS("too many retries, giving up\n" ); |
408 | return -EIO; |
409 | } |
410 | |
411 | /** |
412 | * drm_dp_dpcd_read() - read a series of bytes from the DPCD |
413 | * @aux: DisplayPort AUX channel |
414 | * @offset: address of the (first) register to read |
415 | * @buffer: buffer to store the register values |
416 | * @size: number of bytes in @buffer |
417 | * |
418 | * Returns the number of bytes transferred on success, or a negative error |
419 | * code on failure. -EIO is returned if the request was NAKed by the sink or |
420 | * if the retry count was exceeded. If not all bytes were transferred, this |
421 | * function returns -EPROTO. Errors from the underlying AUX channel transfer |
422 | * function, with the exception of -EBUSY (which causes the transaction to |
423 | * be retried), are propagated to the caller. |
424 | */ |
425 | ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, |
426 | void *buffer, size_t size) |
427 | { |
428 | return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, buffer, |
429 | size); |
430 | } |
431 | EXPORT_SYMBOL(drm_dp_dpcd_read); |
432 | |
433 | /** |
434 | * drm_dp_dpcd_write() - write a series of bytes to the DPCD |
435 | * @aux: DisplayPort AUX channel |
436 | * @offset: address of the (first) register to write |
437 | * @buffer: buffer containing the values to write |
438 | * @size: number of bytes in @buffer |
439 | * |
440 | * Returns the number of bytes transferred on success, or a negative error |
441 | * code on failure. -EIO is returned if the request was NAKed by the sink or |
442 | * if the retry count was exceeded. If not all bytes were transferred, this |
443 | * function returns -EPROTO. Errors from the underlying AUX channel transfer |
444 | * function, with the exception of -EBUSY (which causes the transaction to |
445 | * be retried), are propagated to the caller. |
446 | */ |
447 | ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset, |
448 | void *buffer, size_t size) |
449 | { |
450 | return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer, |
451 | size); |
452 | } |
453 | EXPORT_SYMBOL(drm_dp_dpcd_write); |
454 | |
455 | /** |
456 | * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207) |
457 | * @aux: DisplayPort AUX channel |
458 | * @status: buffer to store the link status in (must be at least 6 bytes) |
459 | * |
460 | * Returns the number of bytes transferred on success or a negative error |
461 | * code on failure. |
462 | */ |
463 | int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux, |
464 | u8 status[DP_LINK_STATUS_SIZE]) |
465 | { |
466 | return drm_dp_dpcd_read(aux, DP_LANE0_1_STATUS, status, |
467 | DP_LINK_STATUS_SIZE); |
468 | } |
469 | EXPORT_SYMBOL(drm_dp_dpcd_read_link_status); |
470 | |
471 | /** |
472 | * drm_dp_link_probe() - probe a DisplayPort link for capabilities |
473 | * @aux: DisplayPort AUX channel |
474 | * @link: pointer to structure in which to return link capabilities |
475 | * |
476 | * The structure filled in by this function can usually be passed directly |
477 | * into drm_dp_link_power_up() and drm_dp_link_configure() to power up and |
478 | * configure the link based on the link's capabilities. |
479 | * |
480 | * Returns 0 on success or a negative error code on failure. |
481 | */ |
482 | int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link) |
483 | { |
484 | u8 values[3]; |
485 | int err; |
486 | |
487 | memset(link, 0, sizeof(*link)); |
488 | |
489 | err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values)); |
490 | if (err < 0) |
491 | return err; |
492 | |
493 | link->revision = values[0]; |
494 | link->rate = drm_dp_bw_code_to_link_rate(values[1]); |
495 | link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK; |
496 | |
497 | if (values[2] & DP_ENHANCED_FRAME_CAP) |
498 | link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING; |
499 | |
500 | return 0; |
501 | } |
502 | EXPORT_SYMBOL(drm_dp_link_probe); |
503 | |
504 | /** |
505 | * drm_dp_link_power_up() - power up a DisplayPort link |
506 | * @aux: DisplayPort AUX channel |
507 | * @link: pointer to a structure containing the link configuration |
508 | * |
509 | * Returns 0 on success or a negative error code on failure. |
510 | */ |
511 | int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link) |
512 | { |
513 | u8 value; |
514 | int err; |
515 | |
516 | /* DP_SET_POWER register is only available on DPCD v1.1 and later */ |
517 | if (link->revision < 0x11) |
518 | return 0; |
519 | |
520 | err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value); |
521 | if (err < 0) |
522 | return err; |
523 | |
524 | value &= ~DP_SET_POWER_MASK; |
525 | value |= DP_SET_POWER_D0; |
526 | |
527 | err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); |
528 | if (err < 0) |
529 | return err; |
530 | |
531 | /* |
532 | * According to the DP 1.1 specification, a "Sink Device must exit the |
533 | * power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink |
534 | * Control Field" (register 0x600). |
535 | */ |
536 | usleep_range(1000, 2000); |
537 | |
538 | return 0; |
539 | } |
540 | EXPORT_SYMBOL(drm_dp_link_power_up); |
541 | |
542 | /** |
543 | * drm_dp_link_configure() - configure a DisplayPort link |
544 | * @aux: DisplayPort AUX channel |
545 | * @link: pointer to a structure containing the link configuration |
546 | * |
547 | * Returns 0 on success or a negative error code on failure. |
548 | */ |
549 | int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link) |
550 | { |
551 | u8 values[2]; |
552 | int err; |
553 | |
554 | values[0] = drm_dp_link_rate_to_bw_code(link->rate); |
555 | values[1] = link->num_lanes; |
556 | |
557 | if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING) |
558 | values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN; |
559 | |
560 | err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values)); |
561 | if (err < 0) |
562 | return err; |
563 | |
564 | return 0; |
565 | } |
566 | EXPORT_SYMBOL(drm_dp_link_configure); |
567 | |
568 | /* |
569 | * I2C-over-AUX implementation |
570 | */ |
571 | |
572 | static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter) |
573 | { |
574 | return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | |
575 | I2C_FUNC_SMBUS_READ_BLOCK_DATA | |
576 | I2C_FUNC_SMBUS_BLOCK_PROC_CALL | |
577 | I2C_FUNC_10BIT_ADDR; |
578 | } |
579 | |
580 | /* |
581 | * Transfer a single I2C-over-AUX message and handle various error conditions, |
582 | * retrying the transaction as appropriate. It is assumed that the |
583 | * aux->transfer function does not modify anything in the msg other than the |
584 | * reply field. |
585 | */ |
586 | static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) |
587 | { |
588 | unsigned int retry; |
589 | int err; |
590 | |
591 | /* |
592 | * DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device |
593 | * is required to retry at least seven times upon receiving AUX_DEFER |
594 | * before giving up the AUX transaction. |
595 | */ |
596 | for (retry = 0; retry < 7; retry++) { |
597 | err = aux->transfer(aux, msg); |
598 | if (err < 0) { |
599 | if (err == -EBUSY) |
600 | continue; |
601 | |
602 | DRM_DEBUG_KMS("transaction failed: %d\n" , err); |
603 | return err; |
604 | } |
605 | |
606 | |
607 | switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) { |
608 | case DP_AUX_NATIVE_REPLY_ACK: |
609 | /* |
610 | * For I2C-over-AUX transactions this isn't enough, we |
611 | * need to check for the I2C ACK reply. |
612 | */ |
613 | break; |
614 | |
615 | case DP_AUX_NATIVE_REPLY_NACK: |
616 | DRM_DEBUG_KMS("native nack\n" ); |
617 | return -EREMOTEIO; |
618 | |
619 | case DP_AUX_NATIVE_REPLY_DEFER: |
620 | DRM_DEBUG_KMS("native defer" ); |
621 | /* |
622 | * We could check for I2C bit rate capabilities and if |
623 | * available adjust this interval. We could also be |
624 | * more careful with DP-to-legacy adapters where a |
625 | * long legacy cable may force very low I2C bit rates. |
626 | * |
627 | * For now just defer for long enough to hopefully be |
628 | * safe for all use-cases. |
629 | */ |
630 | usleep_range(500, 600); |
631 | continue; |
632 | |
633 | default: |
634 | DRM_ERROR("invalid native reply %#04x\n" , msg->reply); |
635 | return -EREMOTEIO; |
636 | } |
637 | |
638 | switch (msg->reply & DP_AUX_I2C_REPLY_MASK) { |
639 | case DP_AUX_I2C_REPLY_ACK: |
640 | /* |
641 | * Both native ACK and I2C ACK replies received. We |
642 | * can assume the transfer was successful. |
643 | */ |
644 | if (err < msg->size) |
645 | return -EPROTO; |
646 | return 0; |
647 | |
648 | case DP_AUX_I2C_REPLY_NACK: |
649 | DRM_DEBUG_KMS("I2C nack\n" ); |
650 | return -EREMOTEIO; |
651 | |
652 | case DP_AUX_I2C_REPLY_DEFER: |
653 | DRM_DEBUG_KMS("I2C defer\n" ); |
654 | usleep_range(400, 500); |
655 | continue; |
656 | |
657 | default: |
658 | DRM_ERROR("invalid I2C reply %#04x\n" , msg->reply); |
659 | return -EREMOTEIO; |
660 | } |
661 | } |
662 | |
663 | DRM_DEBUG_KMS("too many retries, giving up\n" ); |
664 | return -EREMOTEIO; |
665 | } |
666 | |
667 | static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, |
668 | int num) |
669 | { |
670 | struct drm_dp_aux *aux = adapter->algo_data; |
671 | unsigned int i, j; |
672 | struct drm_dp_aux_msg msg; |
673 | int err = 0; |
674 | |
675 | memset(&msg, 0, sizeof(msg)); |
676 | |
677 | for (i = 0; i < num; i++) { |
678 | msg.address = msgs[i].addr; |
679 | msg.request = (msgs[i].flags & I2C_M_RD) ? |
680 | DP_AUX_I2C_READ : |
681 | DP_AUX_I2C_WRITE; |
682 | msg.request |= DP_AUX_I2C_MOT; |
683 | /* Send a bare address packet to start the transaction. |
684 | * Zero sized messages specify an address only (bare |
685 | * address) transaction. |
686 | */ |
687 | msg.buffer = NULL; |
688 | msg.size = 0; |
689 | err = drm_dp_i2c_do_msg(aux, &msg); |
690 | if (err < 0) |
691 | break; |
692 | /* |
693 | * Many hardware implementations support FIFOs larger than a |
694 | * single byte, but it has been empirically determined that |
695 | * transferring data in larger chunks can actually lead to |
696 | * decreased performance. Therefore each message is simply |
697 | * transferred byte-by-byte. |
698 | */ |
699 | for (j = 0; j < msgs[i].len; j++) { |
700 | msg.buffer = msgs[i].buf + j; |
701 | msg.size = 1; |
702 | |
703 | err = drm_dp_i2c_do_msg(aux, &msg); |
704 | if (err < 0) |
705 | break; |
706 | } |
707 | if (err < 0) |
708 | break; |
709 | } |
710 | if (err >= 0) |
711 | err = num; |
712 | /* Send a bare address packet to close out the transaction. |
713 | * Zero sized messages specify an address only (bare |
714 | * address) transaction. |
715 | */ |
716 | msg.request &= ~DP_AUX_I2C_MOT; |
717 | msg.buffer = NULL; |
718 | msg.size = 0; |
719 | (void)drm_dp_i2c_do_msg(aux, &msg); |
720 | |
721 | return err; |
722 | } |
723 | |
724 | static const struct i2c_algorithm drm_dp_i2c_algo = { |
725 | .functionality = drm_dp_i2c_functionality, |
726 | .master_xfer = drm_dp_i2c_xfer, |
727 | }; |
728 | |
729 | /** |
730 | * drm_dp_aux_register_i2c_bus() - register an I2C adapter for I2C-over-AUX |
731 | * @aux: DisplayPort AUX channel |
732 | * |
733 | * Returns 0 on success or a negative error code on failure. |
734 | */ |
735 | int drm_dp_aux_register_i2c_bus(struct drm_dp_aux *aux) |
736 | { |
737 | aux->ddc.algo = &drm_dp_i2c_algo; |
738 | aux->ddc.algo_data = aux; |
739 | aux->ddc.retries = 3; |
740 | |
741 | aux->ddc.class = I2C_CLASS_DDC; |
742 | aux->ddc.owner = THIS_MODULE; |
743 | aux->ddc.dev.parent = aux->dev; |
744 | #ifndef __NetBSD__ |
745 | aux->ddc.dev.of_node = aux->dev->of_node; |
746 | #endif |
747 | |
748 | strlcpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev), |
749 | sizeof(aux->ddc.name)); |
750 | |
751 | return i2c_add_adapter(&aux->ddc); |
752 | } |
753 | EXPORT_SYMBOL(drm_dp_aux_register_i2c_bus); |
754 | |
755 | /** |
756 | * drm_dp_aux_unregister_i2c_bus() - unregister an I2C-over-AUX adapter |
757 | * @aux: DisplayPort AUX channel |
758 | */ |
759 | void drm_dp_aux_unregister_i2c_bus(struct drm_dp_aux *aux) |
760 | { |
761 | i2c_del_adapter(&aux->ddc); |
762 | } |
763 | EXPORT_SYMBOL(drm_dp_aux_unregister_i2c_bus); |
764 | |