1 | /* $NetBSD: cd1400reg.h,v 1.6 2005/12/11 12:21:26 christos Exp $ */ |
2 | |
3 | /*- |
4 | * cyclades cyclom-y serial driver |
5 | * Andrew Herbert <andrew@werple.apana.org.au>, 17 August 1993 |
6 | * |
7 | * Copyright (c) 1993 Andrew Herbert. |
8 | * All rights reserved. |
9 | * |
10 | * Redistribution and use in source and binary forms, with or without |
11 | * modification, are permitted provided that the following conditions |
12 | * are met: |
13 | * 1. Redistributions of source code must retain the above copyright |
14 | * notice, this list of conditions and the following disclaimer. |
15 | * 2. Redistributions in binary form must reproduce the above copyright |
16 | * notice, this list of conditions and the following disclaimer in the |
17 | * documentation and/or other materials provided with the distribution. |
18 | * 3. The name Andrew Herbert may not be used to endorse or promote products |
19 | * derived from this software without specific prior written permission. |
20 | * |
21 | * THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED |
22 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
23 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
24 | * NO EVENT SHALL I BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
25 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
26 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
27 | * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF |
28 | * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING |
29 | * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
30 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
31 | * |
32 | * Id: cd1400.h,v 1.1.4.1 1995/09/14 07:09:41 davidg Exp |
33 | */ |
34 | |
35 | /* |
36 | * Definitions for Cirrus Logic CD1400 serial/parallel chips. |
37 | */ |
38 | |
39 | #define CD1400_NO_OF_CHANNELS 4 /* 4 serial channels per chip */ |
40 | #define CD1400_RX_FIFO_SIZE 12 |
41 | #define CD1400_TX_FIFO_SIZE 12 |
42 | #define CD1400_PAR_FIFO_SIZE 30 |
43 | |
44 | /* |
45 | * Global registers. |
46 | */ |
47 | #define CD1400_GFRCR 0x40 /* global firmware revision code */ |
48 | #define CD1400_CAR 0x68 /* channel access */ |
49 | #define CD1400_CAR_CHAN (3<<0) /* channel select */ |
50 | #define CD1400_GCR 0x4B /* global configuration */ |
51 | #define CD1400_GCR_PARALLEL (1<<7) /* channel 0 is parallel */ |
52 | #define CD1400_SVRR 0x67 /* service request */ |
53 | #define CD1400_SVRR_MDMCH (1<<2) |
54 | #define CD1400_SVRR_TXRDY (1<<1) |
55 | #define CD1400_SVRR_RXRDY (1<<0) |
56 | #define CD1400_RICR 0x44 /* receive interrupting channel */ |
57 | #define CD1400_TICR 0x45 /* transmit interrupting channel */ |
58 | #define CD1400_MICR 0x46 /* modem interrupting channel */ |
59 | #define CD1400_RIR 0x6B /* receive interrupt status */ |
60 | #define CD1400_RIR_RDIREQ (1<<7) /* rx service required */ |
61 | #define CD1400_RIR_RBUSY (1<<6) /* rx service in progress */ |
62 | #define CD1400_RIR_CHAN (3<<0) /* channel select */ |
63 | #define CD1400_TIR 0x6A /* transmit interrupt status */ |
64 | #define CD1400_TIR_RDIREQ (1<<7) /* tx service required */ |
65 | #define CD1400_TIR_RBUSY (1<<6) /* tx service in progress */ |
66 | #define CD1400_TIR_CHAN (3<<0) /* channel select */ |
67 | #define CD1400_MIR 0x69 /* modem interrupt status */ |
68 | #define CD1400_MIR_RDIREQ (1<<7) /* modem service required */ |
69 | #define CD1400_MIR_RBUSY (1<<6) /* modem service in progress */ |
70 | #define CD1400_MIR_CHAN (3<<0) /* channel select */ |
71 | #define CD1400_PPR 0x7E /* prescaler period */ |
72 | #define CD1400_PPR_PRESCALER 512 |
73 | |
74 | /* |
75 | * Virtual registers. |
76 | */ |
77 | #define CD1400_RIVR 0x43 /* receive interrupt vector */ |
78 | #define CD1400_RIVR_EXCEPTION (1<<2) /* receive exception bit */ |
79 | #define CD1400_TIVR 0x42 /* transmit interrupt vector */ |
80 | #define CD1400_MIVR 0x41 /* modem interrupt vector */ |
81 | #define CD1400_TDR 0x63 /* transmit data */ |
82 | #define CD1400_RDSR 0x62 /* receive data/status */ |
83 | #define CD1400_RDSR_TIMEOUT (1<<7) /* rx timeout */ |
84 | #define CD1400_RDSR_SPECIAL_SHIFT 4 /* rx special char shift */ |
85 | #define CD1400_RDSR_SPECIAL (7<<4) /* rx special char */ |
86 | #define CD1400_RDSR_BREAK (1<<3) /* rx break */ |
87 | #define CD1400_RDSR_PE (1<<2) /* rx parity error */ |
88 | #define CD1400_RDSR_FE (1<<1) /* rx framing error */ |
89 | #define CD1400_RDSR_OE (1<<0) /* rx overrun error */ |
90 | #define CD1400_MISR 0x4C /* modem interrupt status */ |
91 | #define CD1400_MISR_DSRd (1<<7) /* DSR delta */ |
92 | #define CD1400_MISR_CTSd (1<<6) /* CTS delta */ |
93 | #define CD1400_MISR_RId (1<<5) /* RI delta */ |
94 | #define CD1400_MISR_CDd (1<<4) /* CD delta */ |
95 | #define CD1400_EOSRR 0x60 /* end of service request */ |
96 | |
97 | /* |
98 | * Channel registers. |
99 | */ |
100 | #define CD1400_LIVR 0x18 /* local interrupt vector */ |
101 | #define CD1400_CCR 0x05 /* channel control */ |
102 | #define CD1400_CCR_CMDRESET (1<<7) /* enables following: */ |
103 | #define CD1400_CCR_FTF (1<<1) /* flush tx fifo */ |
104 | #define CD1400_CCR_FULLRESET (1<<0) /* full reset */ |
105 | #define CD1400_CCR_CMDCORCHG (1<<6) /* enables following: */ |
106 | #define CD1400_CCR_COR3 (1<<3) /* COR3 changed */ |
107 | #define CD1400_CCR_COR2 (1<<2) /* COR2 changed */ |
108 | #define CD1400_CCR_COR1 (1<<1) /* COR1 changed */ |
109 | #define CD1400_CCR_CMDSENDSC (1<<5) /* enables following: */ |
110 | #define CD1400_CCR_SC (7<<0) /* special char 1-4 */ |
111 | #define CD1400_CCR_CMDCHANCTL (1<<4) /* enables following: */ |
112 | #define CD1400_CCR_XMTEN (1<<3) /* tx enable */ |
113 | #define CD1400_CCR_XMTDIS (1<<2) /* tx disable */ |
114 | #define CD1400_CCR_RCVEN (1<<1) /* rx enable */ |
115 | #define CD1400_CCR_RCVDIS (1<<0) /* rx disable */ |
116 | #define CD1400_SRER 0x06 /* service request enable */ |
117 | #define CD1400_SRER_MDMCH (1<<7) /* modem change */ |
118 | #define CD1400_SRER_RXDATA (1<<4) /* rx data */ |
119 | #define CD1400_SRER_TXRDY (1<<2) /* tx fifo empty */ |
120 | #define CD1400_SRER_TXMPTY (1<<1) /* tx shift reg empty */ |
121 | #define CD1400_SRER_NNDT (1<<0) /* no new data */ |
122 | #define CD1400_COR1 0x08 /* channel option 1 */ |
123 | #define CD1400_COR1_PARODD (1<<7) |
124 | #define CD1400_COR1_PARNORMAL (2<<5) |
125 | #define CD1400_COR1_PARFORCE (1<<5) /* odd/even = force 1/0 */ |
126 | #define CD1400_COR1_PARNONE (0<<5) |
127 | #define CD1400_COR1_NOINPCK (1<<4) |
128 | #define CD1400_COR1_STOP2 (2<<2) |
129 | #define CD1400_COR1_STOP15 (1<<2) /* 1.5 stop bits */ |
130 | #define CD1400_COR1_STOP1 (0<<2) |
131 | #define CD1400_COR1_CS8 (3<<0) |
132 | #define CD1400_COR1_CS7 (2<<0) |
133 | #define CD1400_COR1_CS6 (1<<0) |
134 | #define CD1400_COR1_CS5 (0<<0) |
135 | #define CD1400_COR2 0x09 /* channel option 2 */ |
136 | #define CD1400_COR2_IXANY (1<<7) /* implied XON mode */ |
137 | #define CD1400_COR2_IXOFF (1<<6) /* in-band tx flow control */ |
138 | #define CD1400_COR2_ETC (1<<5) /* embedded tx command */ |
139 | #define CD1400_COR2_LLM (1<<4) /* local loopback mode */ |
140 | #define CD1400_COR2_RLM (1<<3) /* remote loopback mode */ |
141 | #define CD1400_COR2_RTSAO (1<<2) /* RTS auto output */ |
142 | #define CD1400_COR2_CCTS_OFLOW (1<<1) /* CTS auto enable */ |
143 | #define CD1400_COR2_CDSR_OFLOW (1<<0) /* DSR auto enable */ |
144 | #define CD1400_COR3 0x0A /* channel option 3 */ |
145 | #define CD1400_COR3_SCDRNG (1<<7) /* special char detect range */ |
146 | #define CD1400_COR3_SCD34 (1<<6) /* special char detect 3-4 */ |
147 | #define CD1400_COR3_FTC (1<<5) /* flow control transparency */ |
148 | #define CD1400_COR3_SCD12 (1<<4) /* special char detect 1-2 */ |
149 | #define CD1400_COR3_RXTH (15<<0) /* rx fifo threshold */ |
150 | #define CD1400_COR4 0x1E /* channel option 4 */ |
151 | #define CD1400_COR4_IGNCR (1<<7) |
152 | #define CD1400_COR4_ICRNL (1<<6) |
153 | #define CD1400_COR4_INLCR (1<<5) |
154 | #define CD1400_COR4_IGNBRK (1<<4) |
155 | #define CD1400_COR4_NOBRKINT (1<<3) |
156 | #define CD1400_COR4_PFO_ESC (4<<0) /* parity/framing/overrun... */ |
157 | #define CD1400_COR4_PFO_NUL (3<<0) |
158 | #define CD1400_COR4_PFO_DISCARD (2<<0) |
159 | #define CD1400_COR4_PFO_GOOD (1<<0) |
160 | #define CD1400_COR4_PFO_EXCEPTION (0<<0) |
161 | #define CD1400_COR5 0x1F /* channel option 5 */ |
162 | #define CD1400_COR5_ISTRIP (1<<7) |
163 | #define CD1400_COR5_LNEXT (1<<6) |
164 | #define CD1400_COR5_CMOE (1<<5) /* char matching on error */ |
165 | #define CD1400_COR5_EBD (1<<2) /* end of break detected */ |
166 | #define CD1400_COR5_ONLCR (1<<1) |
167 | #define CD1400_COR5_OCRNL (1<<0) |
168 | #define CD1400_CCSR 0x0B /* channel control status */ |
169 | #define CD1400_RDCR 0x0E /* received data count */ |
170 | #define CD1400_SCHR1 0x1A /* special character 1 */ |
171 | #define CD1400_SCHR2 0x1B /* special character 2 */ |
172 | #define CD1400_SCHR3 0x1C /* special character 3 */ |
173 | #define CD1400_SCHR4 0x1D /* special character 4 */ |
174 | #define CD1400_SCRL 0x22 /* special character range, low */ |
175 | #define CD1400_SCRH 0x23 /* special character range, high */ |
176 | #define CD1400_LNC 0x24 /* lnext character */ |
177 | #define CD1400_MCOR1 0x15 /* modem change option 1 */ |
178 | #define CD1400_MCOR1_DSRzd (1<<7) /* DSR one-to-zero delta */ |
179 | #define CD1400_MCOR1_CTSzd (1<<6) |
180 | #define CD1400_MCOR1_RIzd (1<<5) |
181 | #define CD1400_MCOR1_CDzd (1<<4) |
182 | #define CD1400_MCOR1_DTRth (15<<0) /* dtrflow threshold */ |
183 | #define CD1400_MCOR2 0x16 /* modem change option 2 */ |
184 | #define CD1400_MCOR2_DSRod (1<<7) /* DSR zero-to-one delta */ |
185 | #define CD1400_MCOR2_CTSod (1<<6) |
186 | #define CD1400_MCOR2_RIod (1<<5) |
187 | #define CD1400_MCOR2_CDod (1<<4) |
188 | #define CD1400_RTPR 0x21 /* receive timeout period */ |
189 | #define CD1400_MSVR1 0x6C /* modem signal value 1 */ |
190 | #define CD1400_MSVR1_RTS (1<<0) /* RTS line (r/w) */ |
191 | #define CD1400_MSVR2 0x6D /* modem signal value 2 */ |
192 | #define CD1400_MSVR2_DSR (1<<7) /* !DSR line (r) */ |
193 | #define CD1400_MSVR2_CTS (1<<6) /* !CTS line (r) */ |
194 | #define CD1400_MSVR2_RI (1<<5) /* !RI line (r) */ |
195 | #define CD1400_MSVR2_CD (1<<4) /* !CD line (r) */ |
196 | #define CD1400_MSVR2_DTR (1<<1) /* DTR line (r/w) */ |
197 | #define CD1400_PSVR 0x6F /* printer signal value */ |
198 | #define CD1400_RBPR 0x78 /* receive baud rate period */ |
199 | #define CD1400_RCOR 0x7C /* receive clock option */ |
200 | #define CD1400_TBPR 0x72 /* transmit baud rate period */ |
201 | #define CD1400_TCOR 0x76 /* transmit clock option */ |
202 | |