1/* $NetBSD: cs89x0var.h,v 1.17 2015/04/13 16:33:24 riastradh Exp $ */
2
3/*
4 * Copyright 1997
5 * Digital Equipment Corporation. All rights reserved.
6 *
7 * This software is furnished under license and may be used and
8 * copied only in accordance with the following terms and conditions.
9 * Subject to these conditions, you may download, copy, install,
10 * use, modify and distribute this software in source and/or binary
11 * form. No title or ownership is transferred hereby.
12 *
13 * 1) Any source code used, modified or distributed must reproduce
14 * and retain this copyright notice and list of conditions as
15 * they appear in the source file.
16 *
17 * 2) No right is granted to use any trade name, trademark, or logo of
18 * Digital Equipment Corporation. Neither the "Digital Equipment
19 * Corporation" name nor any trademark or logo of Digital Equipment
20 * Corporation may be used to endorse or promote products derived
21 * from this software without the prior written permission of
22 * Digital Equipment Corporation.
23 *
24 * 3) This software is provided "AS-IS" and any express or implied
25 * warranties, including but not limited to, any implied warranties
26 * of merchantability, fitness for a particular purpose, or
27 * non-infringement are disclaimed. In no event shall DIGITAL be
28 * liable for any damages whatsoever, and in particular, DIGITAL
29 * shall not be liable for special, indirect, consequential, or
30 * incidental damages or damages for lost profits, loss of
31 * revenue or loss of use, whether such damages arise in contract,
32 * negligence, tort, under statute, in equity, at law or otherwise,
33 * even if advised of the possibility of such damage.
34 */
35
36/*
37**++
38** FACILITY Crystal CS8900 Ethernet driver header file
39**
40** ABSTRACT
41**
42** This module provides CS8900 driver softc and related definitions
43**
44** AUTHORS
45**
46** Peter Dettori SEA - Software Engineering.
47**
48** CREATION DATE:
49**
50** 13-Feb-1997.
51**
52** MODIFICATION HISTORY:
53**
54**--
55*/
56
57#ifndef _DEV_IC_CS89X0VAR_H_
58#define _DEV_IC_CS89X0VAR_H_
59
60#include <sys/rndsource.h>
61
62/*
63 * Ethernet software status per interface.
64 *
65 * Each interface is referenced by a network interface structure,
66 * arpcom.ac_if, which the routing code uses to locate the interface.
67 * This structure contains the output queue for the interface,
68 * its address, ...
69 */
70struct cs_softc {
71 device_t sc_dev; /* base device glue */
72 struct ethercom sc_ethercom; /* Ethernet common */
73 struct ifmedia sc_media; /* media control structures */
74
75 void *sc_ih; /* interrupt handler */
76
77 bus_space_tag_t sc_iot; /* bus space tag for IO */
78 bus_space_tag_t sc_memt; /* bus space tag for memory mode */
79 bus_space_handle_t sc_ioh; /* bus space handles */
80 bus_space_handle_t sc_memh;
81
82#if 0
83 isa_chipset_tag_t sc_ic; /* ISA chipset */
84#endif
85
86 int sc_irq; /* IRQ line */
87
88 int sc_prodid; /* saved product ID */
89 int sc_prodrev; /* saved product rev */
90
91 bus_addr_t sc_pktpgaddr; /* PacketPage bus memory address */
92
93 int sc_cfgflags; /* software configuration flags */
94
95 int sc_memorymode; /* are we in memory mode? */
96 int sc_txbusy; /* transmit in progress */
97 int sc_resetting; /* reset in progress */
98
99 int sc_xe_ent; /* current early-xmit table entry */
100 int sc_xe_togo; /* # of packets to go at this ent */
101
102 int sc_carrier; /* has carrier */
103
104 u_int8_t sc_enaddr[ETHER_ADDR_LEN]; /* MAC address */
105
106 int eeprom_size; /* how large is the eeprom (in bytes) */
107 u_int16_t *eeprom_data; /* copy of the eeprom data */
108
109 krndsource_t rnd_source; /* random source */
110
111 /* power management */
112 int (*sc_enable)(struct cs_softc *);
113 void (*sc_disable)(struct cs_softc *);
114
115 /* DMA hooks */
116 void (*sc_dma_process_rx)(struct cs_softc *);
117 void (*sc_dma_chipinit)(struct cs_softc *);
118 void (*sc_dma_attach)(struct cs_softc *);
119
120 /* register access hooks */
121 u_int8_t (*sc_io_read_1)(struct cs_softc *, bus_size_t);
122 u_int16_t (*sc_io_read_2)(struct cs_softc *, bus_size_t);
123 void (*sc_io_read_multi_2)(struct cs_softc *, bus_size_t, u_int16_t *,
124 bus_size_t);
125 void (*sc_io_write_2)(struct cs_softc *, bus_size_t, u_int16_t);
126 void (*sc_io_write_multi_2)(struct cs_softc *, bus_size_t,
127 const u_int16_t *, bus_size_t);
128 u_int16_t (*sc_mem_read_2)(struct cs_softc *, bus_size_t);
129 void (*sc_mem_write_2)(struct cs_softc *, bus_size_t, u_int16_t);
130 void (*sc_mem_write_region_2)(struct cs_softc *, bus_size_t,
131 const u_int16_t *, bus_size_t);
132};
133
134#define IO_READ_1(sc, a) \
135 (sc)->sc_io_read_1 ? \
136 (sc)->sc_io_read_1((sc), (a)) : \
137 bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (a))
138#define IO_READ_2(sc, a) \
139 (sc)->sc_io_read_2 ? \
140 (sc)->sc_io_read_2((sc), (a)) : \
141 bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, (a))
142#define IO_READ_MULTI_2(sc, a, b, c) \
143 if ((sc)->sc_io_read_multi_2) \
144 (sc)->sc_io_read_multi_2((sc), (a), (b), (c)); else \
145 bus_space_read_multi_2((sc)->sc_iot, (sc)->sc_ioh, (a), (b), (c))
146#define IO_WRITE_2(sc, a, d) \
147 if ((sc)->sc_io_write_2) \
148 (sc)->sc_io_write_2((sc), (a), (d)); else \
149 bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, (a), (d))
150#define IO_WRITE_MULTI_2(sc, a, d, c) \
151 if ((sc)->sc_io_write_multi_2) \
152 (sc)->sc_io_write_multi_2((sc), (a), (d), (c)); else \
153 bus_space_write_multi_2((sc)->sc_iot, (sc)->sc_ioh, (a), (d), (c))
154#define MEM_READ_2(sc, a) \
155 (sc)->sc_mem_read_2 ? \
156 (sc)->sc_mem_read_2((sc), (a)) : \
157 bus_space_read_2((sc)->sc_memt, (sc)->sc_memh, (a))
158#define MEM_WRITE_2(sc, a, d) \
159 if ((sc)->sc_mem_write_2) \
160 (sc)->sc_mem_write_2((sc), (a), (d)); else \
161 bus_space_write_2((sc)->sc_memt, (sc)->sc_memh, (a), (d))
162#define MEM_WRITE_REGION_2(sc, a, d, c) \
163 if ((sc)->sc_mem_write_region_2) \
164 (sc)->sc_mem_write_region_2((sc), (a), (d), (c)); else \
165 bus_space_write_region_2((sc)->sc_memt, (sc)->sc_memh, (a), (d), (c))
166
167
168/* Config Flags in cs_softc */
169
170#define CFGFLG_MEM_MODE 0x0001
171#define CFGFLG_USE_SA 0x0002
172#define CFGFLG_IOCHRDY 0x0004
173#define CFGFLG_DCDC_POL 0x0008
174#define CFGFLG_DMA_MODE 0x0020
175#define CFGFLG_ATTACHED 0x0040 /* XXX should not be here? */
176#define CFGFLG_CARDBUS_HACK 0x0080
177#define CFGFLG_ENABLED 0x0100 /* XXX should not be here? */
178#define CFGFLG_PARSE_EEPROM 0x0200
179#define CFGFLG_NOT_EEPROM 0x8000
180
181
182/*
183 * Inlines for reading/writing the packet page area.
184 */
185
186static __inline u_int16_t _cs_read_port(struct cs_softc *, int);
187
188static __inline u_int16_t
189_cs_read_port(struct cs_softc *sc, int off)
190{
191 u_int16_t result;
192
193 if (sc->sc_cfgflags & CFGFLG_CARDBUS_HACK) {
194 /*
195 * hack for EtherJet PCMCIA and cardbus (obtained from freebsd)
196 *
197 * EtherJet PCMCIA don't work with cardbus bridges
198 * (at least TI1250) without this hack.
199 */
200 result = (IO_READ_1(sc, off) & 0xff);
201 result |= ((IO_READ_1(sc, off+1) & 0xff) << 8);
202 }
203 else {
204 result = IO_READ_2(sc, off);
205 }
206
207 return result;
208}
209
210static __inline u_int16_t _CS_READ_PACKET_PAGE_IO(struct cs_softc *, int);
211
212static __inline u_int16_t
213_CS_READ_PACKET_PAGE_IO(struct cs_softc *sc, int offset)
214{
215
216 IO_WRITE_2(sc, PORT_PKTPG_PTR, offset);
217 return (_cs_read_port(sc, PORT_PKTPG_DATA));
218}
219
220static __inline u_int16_t CS_READ_PACKET_PAGE_IO(struct cs_softc *, int);
221
222static __inline u_int16_t
223CS_READ_PACKET_PAGE_IO(struct cs_softc *sc, int offset)
224{
225
226 IO_WRITE_2(sc, PORT_PKTPG_PTR, offset);
227 return (IO_READ_2(sc, PORT_PKTPG_DATA));
228}
229
230#define CS_READ_PACKET_PAGE_MEM(sc, offset) \
231 MEM_READ_2((sc), (offset))
232
233#define CS_READ_PACKET_PAGE(sc, offset) \
234 ((sc)->sc_memorymode ? CS_READ_PACKET_PAGE_MEM((sc), (offset)) :\
235 _CS_READ_PACKET_PAGE_IO((sc), (offset)))
236
237#define CS_WRITE_PACKET_PAGE_IO(sc, offset, val) \
238do { \
239 IO_WRITE_2((sc), PORT_PKTPG_PTR, (offset)); \
240 IO_WRITE_2((sc), PORT_PKTPG_DATA, (val)); \
241} while (0)
242
243#define CS_WRITE_PACKET_PAGE_MEM(sc, offset, val) \
244 MEM_WRITE_2((sc), (offset), (val))
245
246#define CS_WRITE_PACKET_PAGE(sc, offset, val) \
247do { \
248 if ((sc)->sc_memorymode) \
249 CS_WRITE_PACKET_PAGE_MEM((sc), (offset), (val)); \
250 else \
251 CS_WRITE_PACKET_PAGE_IO((sc), (offset), (val)); \
252} while (0)
253
254#define CS_READ_PORT(sc, off)\
255 IO_READ_2((sc), (off))
256
257#define CS_WRITE_PORT(sc, off, val)\
258 IO_WRITE_2((sc), (off), (val))
259
260
261/* Return Status */
262#define CS_ERROR -1
263#define CS_OK 1
264
265
266/* Media Type in cs_softc */
267
268#define MEDIA_AUI 0x0001
269#define MEDIA_10BASE2 0x0002
270#define MEDIA_10BASET 0x0003
271
272
273/* Miscellaneous definitions */
274
275#define MAXLOOP 0x8888
276
277int cs_attach(struct cs_softc *, u_int8_t *, int *, int, int);
278int cs_detach(struct cs_softc *);
279int cs_verify_eeprom(struct cs_softc *);
280int cs_read_eeprom(struct cs_softc *, int, u_int16_t *);
281int cs_intr(void *);
282int cs_activate(device_t, enum devact);
283void cs_ether_input(struct cs_softc *, struct mbuf *);
284void cs_print_rx_errors(struct cs_softc *, u_int16_t);
285int cs_init(struct ifnet *);
286
287#define CS_IS_ENABLED(sc) ((sc)->sc_cfgflags & CFGFLG_ENABLED)
288
289#endif /* _DEV_IC_CS89X0VAR_H_ */
290