1 | /* $NetBSD: nouveau_engine_dmaobj_nvd0.c,v 1.1.1.1 2014/08/06 12:36:24 riastradh Exp $ */ |
2 | |
3 | /* |
4 | * Copyright 2012 Red Hat Inc. |
5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), |
8 | * to deal in the Software without restriction, including without limitation |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
10 | * and/or sell copies of the Software, and to permit persons to whom the |
11 | * Software is furnished to do so, subject to the following conditions: |
12 | * |
13 | * The above copyright notice and this permission notice shall be included in |
14 | * all copies or substantial portions of the Software. |
15 | * |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
22 | * OTHER DEALINGS IN THE SOFTWARE. |
23 | * |
24 | * Authors: Ben Skeggs |
25 | */ |
26 | |
27 | #include <sys/cdefs.h> |
28 | __KERNEL_RCSID(0, "$NetBSD: nouveau_engine_dmaobj_nvd0.c,v 1.1.1.1 2014/08/06 12:36:24 riastradh Exp $" ); |
29 | |
30 | #include <core/device.h> |
31 | #include <core/gpuobj.h> |
32 | #include <core/class.h> |
33 | |
34 | #include <subdev/fb.h> |
35 | #include <engine/dmaobj.h> |
36 | |
37 | struct nvd0_dmaeng_priv { |
38 | struct nouveau_dmaeng base; |
39 | }; |
40 | |
41 | static int |
42 | nvd0_dmaobj_bind(struct nouveau_dmaeng *dmaeng, |
43 | struct nouveau_object *parent, |
44 | struct nouveau_dmaobj *dmaobj, |
45 | struct nouveau_gpuobj **pgpuobj) |
46 | { |
47 | u32 flags0 = 0x00000000; |
48 | int ret; |
49 | |
50 | if (!nv_iclass(parent, NV_ENGCTX_CLASS)) { |
51 | switch (nv_mclass(parent->parent)) { |
52 | case NVD0_DISP_MAST_CLASS: |
53 | case NVD0_DISP_SYNC_CLASS: |
54 | case NVD0_DISP_OVLY_CLASS: |
55 | case NVE0_DISP_MAST_CLASS: |
56 | case NVE0_DISP_SYNC_CLASS: |
57 | case NVE0_DISP_OVLY_CLASS: |
58 | case NVF0_DISP_MAST_CLASS: |
59 | case NVF0_DISP_SYNC_CLASS: |
60 | case NVF0_DISP_OVLY_CLASS: |
61 | case GM107_DISP_MAST_CLASS: |
62 | case GM107_DISP_SYNC_CLASS: |
63 | case GM107_DISP_OVLY_CLASS: |
64 | break; |
65 | default: |
66 | return -EINVAL; |
67 | } |
68 | } else |
69 | return 0; |
70 | |
71 | if (!(dmaobj->conf0 & NVD0_DMA_CONF0_ENABLE)) { |
72 | if (dmaobj->target == NV_MEM_TARGET_VM) { |
73 | dmaobj->conf0 |= NVD0_DMA_CONF0_TYPE_VM; |
74 | dmaobj->conf0 |= NVD0_DMA_CONF0_PAGE_LP; |
75 | } else { |
76 | dmaobj->conf0 |= NVD0_DMA_CONF0_TYPE_LINEAR; |
77 | dmaobj->conf0 |= NVD0_DMA_CONF0_PAGE_SP; |
78 | } |
79 | } |
80 | |
81 | flags0 |= (dmaobj->conf0 & NVD0_DMA_CONF0_TYPE) << 20; |
82 | flags0 |= (dmaobj->conf0 & NVD0_DMA_CONF0_PAGE) >> 4; |
83 | |
84 | switch (dmaobj->target) { |
85 | case NV_MEM_TARGET_VRAM: |
86 | flags0 |= 0x00000009; |
87 | break; |
88 | default: |
89 | return -EINVAL; |
90 | break; |
91 | } |
92 | |
93 | ret = nouveau_gpuobj_new(parent, parent, 24, 32, 0, pgpuobj); |
94 | if (ret == 0) { |
95 | nv_wo32(*pgpuobj, 0x00, flags0); |
96 | nv_wo32(*pgpuobj, 0x04, dmaobj->start >> 8); |
97 | nv_wo32(*pgpuobj, 0x08, dmaobj->limit >> 8); |
98 | nv_wo32(*pgpuobj, 0x0c, 0x00000000); |
99 | nv_wo32(*pgpuobj, 0x10, 0x00000000); |
100 | nv_wo32(*pgpuobj, 0x14, 0x00000000); |
101 | } |
102 | |
103 | return ret; |
104 | } |
105 | |
106 | static int |
107 | nvd0_dmaeng_ctor(struct nouveau_object *parent, struct nouveau_object *engine, |
108 | struct nouveau_oclass *oclass, void *data, u32 size, |
109 | struct nouveau_object **pobject) |
110 | { |
111 | struct nvd0_dmaeng_priv *priv; |
112 | int ret; |
113 | |
114 | ret = nouveau_dmaeng_create(parent, engine, oclass, &priv); |
115 | *pobject = nv_object(priv); |
116 | if (ret) |
117 | return ret; |
118 | |
119 | nv_engine(priv)->sclass = nouveau_dmaobj_sclass; |
120 | priv->base.bind = nvd0_dmaobj_bind; |
121 | return 0; |
122 | } |
123 | |
124 | struct nouveau_oclass |
125 | nvd0_dmaeng_oclass = { |
126 | .handle = NV_ENGINE(DMAOBJ, 0xd0), |
127 | .ofuncs = &(struct nouveau_ofuncs) { |
128 | .ctor = nvd0_dmaeng_ctor, |
129 | .dtor = _nouveau_dmaeng_dtor, |
130 | .init = _nouveau_dmaeng_init, |
131 | .fini = _nouveau_dmaeng_fini, |
132 | }, |
133 | }; |
134 | |