1 | /* $NetBSD: if_ural.c,v 1.50 2016/07/07 06:55:42 msaitoh Exp $ */ |
2 | /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ |
3 | |
4 | /*- |
5 | * Copyright (c) 2005, 2006 |
6 | * Damien Bergamini <damien.bergamini@free.fr> |
7 | * |
8 | * Permission to use, copy, modify, and distribute this software for any |
9 | * purpose with or without fee is hereby granted, provided that the above |
10 | * copyright notice and this permission notice appear in all copies. |
11 | * |
12 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
13 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
14 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
15 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
16 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
17 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
18 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
19 | */ |
20 | |
21 | /*- |
22 | * Ralink Technology RT2500USB chipset driver |
23 | * http://www.ralinktech.com/ |
24 | */ |
25 | |
26 | #include <sys/cdefs.h> |
27 | __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.50 2016/07/07 06:55:42 msaitoh Exp $" ); |
28 | |
29 | #include <sys/param.h> |
30 | #include <sys/sockio.h> |
31 | #include <sys/sysctl.h> |
32 | #include <sys/mbuf.h> |
33 | #include <sys/kernel.h> |
34 | #include <sys/socket.h> |
35 | #include <sys/systm.h> |
36 | #include <sys/conf.h> |
37 | #include <sys/device.h> |
38 | |
39 | #include <sys/bus.h> |
40 | #include <machine/endian.h> |
41 | #include <sys/intr.h> |
42 | |
43 | #include <net/bpf.h> |
44 | #include <net/if.h> |
45 | #include <net/if_arp.h> |
46 | #include <net/if_dl.h> |
47 | #include <net/if_ether.h> |
48 | #include <net/if_media.h> |
49 | #include <net/if_types.h> |
50 | |
51 | #include <netinet/in.h> |
52 | #include <netinet/in_systm.h> |
53 | #include <netinet/in_var.h> |
54 | #include <netinet/ip.h> |
55 | |
56 | #include <net80211/ieee80211_netbsd.h> |
57 | #include <net80211/ieee80211_var.h> |
58 | #include <net80211/ieee80211_amrr.h> |
59 | #include <net80211/ieee80211_radiotap.h> |
60 | |
61 | #include <dev/usb/usb.h> |
62 | #include <dev/usb/usbdi.h> |
63 | #include <dev/usb/usbdi_util.h> |
64 | #include <dev/usb/usbdevs.h> |
65 | |
66 | #include <dev/usb/if_uralreg.h> |
67 | #include <dev/usb/if_uralvar.h> |
68 | |
69 | #ifdef URAL_DEBUG |
70 | #define DPRINTF(x) do { if (ural_debug) printf x; } while (0) |
71 | #define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0) |
72 | int ural_debug = 0; |
73 | #else |
74 | #define DPRINTF(x) |
75 | #define DPRINTFN(n, x) |
76 | #endif |
77 | |
78 | /* various supported device vendors/products */ |
79 | static const struct usb_devno ural_devs[] = { |
80 | { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, |
81 | { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, |
82 | { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, |
83 | { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, |
84 | { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, |
85 | { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, |
86 | { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, |
87 | { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, |
88 | { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, |
89 | { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, |
90 | { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, |
91 | { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, |
92 | { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, |
93 | { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, |
94 | { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, |
95 | { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, |
96 | { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, |
97 | { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, |
98 | { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, |
99 | { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, |
100 | { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, |
101 | { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, |
102 | { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, |
103 | { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, |
104 | { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, |
105 | { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, |
106 | }; |
107 | |
108 | Static int ural_alloc_tx_list(struct ural_softc *); |
109 | Static void ural_free_tx_list(struct ural_softc *); |
110 | Static int ural_alloc_rx_list(struct ural_softc *); |
111 | Static void ural_free_rx_list(struct ural_softc *); |
112 | Static int ural_media_change(struct ifnet *); |
113 | Static void ural_next_scan(void *); |
114 | Static void ural_task(void *); |
115 | Static int ural_newstate(struct ieee80211com *, |
116 | enum ieee80211_state, int); |
117 | Static int ural_rxrate(struct ural_rx_desc *); |
118 | Static void ural_txeof(struct usbd_xfer *, void *, |
119 | usbd_status); |
120 | Static void ural_rxeof(struct usbd_xfer *, void *, |
121 | usbd_status); |
122 | Static int ural_ack_rate(struct ieee80211com *, int); |
123 | Static uint16_t ural_txtime(int, int, uint32_t); |
124 | Static uint8_t ural_plcp_signal(int); |
125 | Static void ural_setup_tx_desc(struct ural_softc *, |
126 | struct ural_tx_desc *, uint32_t, int, int); |
127 | Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, |
128 | struct ieee80211_node *); |
129 | Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, |
130 | struct ieee80211_node *); |
131 | Static int ural_tx_data(struct ural_softc *, struct mbuf *, |
132 | struct ieee80211_node *); |
133 | Static void ural_start(struct ifnet *); |
134 | Static void ural_watchdog(struct ifnet *); |
135 | Static int ural_reset(struct ifnet *); |
136 | Static int ural_ioctl(struct ifnet *, u_long, void *); |
137 | Static void ural_set_testmode(struct ural_softc *); |
138 | Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, |
139 | int); |
140 | Static uint16_t ural_read(struct ural_softc *, uint16_t); |
141 | Static void ural_read_multi(struct ural_softc *, uint16_t, void *, |
142 | int); |
143 | Static void ural_write(struct ural_softc *, uint16_t, uint16_t); |
144 | Static void ural_write_multi(struct ural_softc *, uint16_t, void *, |
145 | int); |
146 | Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); |
147 | Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); |
148 | Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); |
149 | Static void ural_set_chan(struct ural_softc *, |
150 | struct ieee80211_channel *); |
151 | Static void ural_disable_rf_tune(struct ural_softc *); |
152 | Static void ural_enable_tsf_sync(struct ural_softc *); |
153 | Static void ural_update_slot(struct ifnet *); |
154 | Static void ural_set_txpreamble(struct ural_softc *); |
155 | Static void ural_set_basicrates(struct ural_softc *); |
156 | Static void ural_set_bssid(struct ural_softc *, uint8_t *); |
157 | Static void ural_set_macaddr(struct ural_softc *, uint8_t *); |
158 | Static void ural_update_promisc(struct ural_softc *); |
159 | Static const char *ural_get_rf(int); |
160 | Static void ural_read_eeprom(struct ural_softc *); |
161 | Static int ural_bbp_init(struct ural_softc *); |
162 | Static void ural_set_txantenna(struct ural_softc *, int); |
163 | Static void ural_set_rxantenna(struct ural_softc *, int); |
164 | Static int ural_init(struct ifnet *); |
165 | Static void ural_stop(struct ifnet *, int); |
166 | Static void ural_amrr_start(struct ural_softc *, |
167 | struct ieee80211_node *); |
168 | Static void ural_amrr_timeout(void *); |
169 | Static void ural_amrr_update(struct usbd_xfer *, void *, |
170 | usbd_status status); |
171 | |
172 | /* |
173 | * Supported rates for 802.11a/b/g modes (in 500Kbps unit). |
174 | */ |
175 | static const struct ieee80211_rateset ural_rateset_11a = |
176 | { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; |
177 | |
178 | static const struct ieee80211_rateset ural_rateset_11b = |
179 | { 4, { 2, 4, 11, 22 } }; |
180 | |
181 | static const struct ieee80211_rateset ural_rateset_11g = |
182 | { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; |
183 | |
184 | /* |
185 | * Default values for MAC registers; values taken from the reference driver. |
186 | */ |
187 | static const struct { |
188 | uint16_t reg; |
189 | uint16_t val; |
190 | } ural_def_mac[] = { |
191 | { RAL_TXRX_CSR5, 0x8c8d }, |
192 | { RAL_TXRX_CSR6, 0x8b8a }, |
193 | { RAL_TXRX_CSR7, 0x8687 }, |
194 | { RAL_TXRX_CSR8, 0x0085 }, |
195 | { RAL_MAC_CSR13, 0x1111 }, |
196 | { RAL_MAC_CSR14, 0x1e11 }, |
197 | { RAL_TXRX_CSR21, 0xe78f }, |
198 | { RAL_MAC_CSR9, 0xff1d }, |
199 | { RAL_MAC_CSR11, 0x0002 }, |
200 | { RAL_MAC_CSR22, 0x0053 }, |
201 | { RAL_MAC_CSR15, 0x0000 }, |
202 | { RAL_MAC_CSR8, 0x0780 }, |
203 | { RAL_TXRX_CSR19, 0x0000 }, |
204 | { RAL_TXRX_CSR18, 0x005a }, |
205 | { RAL_PHY_CSR2, 0x0000 }, |
206 | { RAL_TXRX_CSR0, 0x1ec0 }, |
207 | { RAL_PHY_CSR4, 0x000f } |
208 | }; |
209 | |
210 | /* |
211 | * Default values for BBP registers; values taken from the reference driver. |
212 | */ |
213 | static const struct { |
214 | uint8_t reg; |
215 | uint8_t val; |
216 | } ural_def_bbp[] = { |
217 | { 3, 0x02 }, |
218 | { 4, 0x19 }, |
219 | { 14, 0x1c }, |
220 | { 15, 0x30 }, |
221 | { 16, 0xac }, |
222 | { 17, 0x48 }, |
223 | { 18, 0x18 }, |
224 | { 19, 0xff }, |
225 | { 20, 0x1e }, |
226 | { 21, 0x08 }, |
227 | { 22, 0x08 }, |
228 | { 23, 0x08 }, |
229 | { 24, 0x80 }, |
230 | { 25, 0x50 }, |
231 | { 26, 0x08 }, |
232 | { 27, 0x23 }, |
233 | { 30, 0x10 }, |
234 | { 31, 0x2b }, |
235 | { 32, 0xb9 }, |
236 | { 34, 0x12 }, |
237 | { 35, 0x50 }, |
238 | { 39, 0xc4 }, |
239 | { 40, 0x02 }, |
240 | { 41, 0x60 }, |
241 | { 53, 0x10 }, |
242 | { 54, 0x18 }, |
243 | { 56, 0x08 }, |
244 | { 57, 0x10 }, |
245 | { 58, 0x08 }, |
246 | { 61, 0x60 }, |
247 | { 62, 0x10 }, |
248 | { 75, 0xff } |
249 | }; |
250 | |
251 | /* |
252 | * Default values for RF register R2 indexed by channel numbers. |
253 | */ |
254 | static const uint32_t ural_rf2522_r2[] = { |
255 | 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, |
256 | 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e |
257 | }; |
258 | |
259 | static const uint32_t ural_rf2523_r2[] = { |
260 | 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, |
261 | 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 |
262 | }; |
263 | |
264 | static const uint32_t ural_rf2524_r2[] = { |
265 | 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, |
266 | 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 |
267 | }; |
268 | |
269 | static const uint32_t ural_rf2525_r2[] = { |
270 | 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, |
271 | 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 |
272 | }; |
273 | |
274 | static const uint32_t ural_rf2525_hi_r2[] = { |
275 | 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, |
276 | 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e |
277 | }; |
278 | |
279 | static const uint32_t ural_rf2525e_r2[] = { |
280 | 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, |
281 | 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b |
282 | }; |
283 | |
284 | static const uint32_t ural_rf2526_hi_r2[] = { |
285 | 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, |
286 | 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 |
287 | }; |
288 | |
289 | static const uint32_t ural_rf2526_r2[] = { |
290 | 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, |
291 | 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d |
292 | }; |
293 | |
294 | /* |
295 | * For dual-band RF, RF registers R1 and R4 also depend on channel number; |
296 | * values taken from the reference driver. |
297 | */ |
298 | static const struct { |
299 | uint8_t chan; |
300 | uint32_t r1; |
301 | uint32_t r2; |
302 | uint32_t r4; |
303 | } ural_rf5222[] = { |
304 | { 1, 0x08808, 0x0044d, 0x00282 }, |
305 | { 2, 0x08808, 0x0044e, 0x00282 }, |
306 | { 3, 0x08808, 0x0044f, 0x00282 }, |
307 | { 4, 0x08808, 0x00460, 0x00282 }, |
308 | { 5, 0x08808, 0x00461, 0x00282 }, |
309 | { 6, 0x08808, 0x00462, 0x00282 }, |
310 | { 7, 0x08808, 0x00463, 0x00282 }, |
311 | { 8, 0x08808, 0x00464, 0x00282 }, |
312 | { 9, 0x08808, 0x00465, 0x00282 }, |
313 | { 10, 0x08808, 0x00466, 0x00282 }, |
314 | { 11, 0x08808, 0x00467, 0x00282 }, |
315 | { 12, 0x08808, 0x00468, 0x00282 }, |
316 | { 13, 0x08808, 0x00469, 0x00282 }, |
317 | { 14, 0x08808, 0x0046b, 0x00286 }, |
318 | |
319 | { 36, 0x08804, 0x06225, 0x00287 }, |
320 | { 40, 0x08804, 0x06226, 0x00287 }, |
321 | { 44, 0x08804, 0x06227, 0x00287 }, |
322 | { 48, 0x08804, 0x06228, 0x00287 }, |
323 | { 52, 0x08804, 0x06229, 0x00287 }, |
324 | { 56, 0x08804, 0x0622a, 0x00287 }, |
325 | { 60, 0x08804, 0x0622b, 0x00287 }, |
326 | { 64, 0x08804, 0x0622c, 0x00287 }, |
327 | |
328 | { 100, 0x08804, 0x02200, 0x00283 }, |
329 | { 104, 0x08804, 0x02201, 0x00283 }, |
330 | { 108, 0x08804, 0x02202, 0x00283 }, |
331 | { 112, 0x08804, 0x02203, 0x00283 }, |
332 | { 116, 0x08804, 0x02204, 0x00283 }, |
333 | { 120, 0x08804, 0x02205, 0x00283 }, |
334 | { 124, 0x08804, 0x02206, 0x00283 }, |
335 | { 128, 0x08804, 0x02207, 0x00283 }, |
336 | { 132, 0x08804, 0x02208, 0x00283 }, |
337 | { 136, 0x08804, 0x02209, 0x00283 }, |
338 | { 140, 0x08804, 0x0220a, 0x00283 }, |
339 | |
340 | { 149, 0x08808, 0x02429, 0x00281 }, |
341 | { 153, 0x08808, 0x0242b, 0x00281 }, |
342 | { 157, 0x08808, 0x0242d, 0x00281 }, |
343 | { 161, 0x08808, 0x0242f, 0x00281 } |
344 | }; |
345 | |
346 | int ural_match(device_t, cfdata_t, void *); |
347 | void ural_attach(device_t, device_t, void *); |
348 | int ural_detach(device_t, int); |
349 | int ural_activate(device_t, enum devact); |
350 | extern struct cfdriver ural_cd; |
351 | CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach, |
352 | ural_detach, ural_activate); |
353 | |
354 | int |
355 | ural_match(device_t parent, cfdata_t match, void *aux) |
356 | { |
357 | struct usb_attach_arg *uaa = aux; |
358 | |
359 | return (usb_lookup(ural_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ? |
360 | UMATCH_VENDOR_PRODUCT : UMATCH_NONE; |
361 | } |
362 | |
363 | void |
364 | ural_attach(device_t parent, device_t self, void *aux) |
365 | { |
366 | struct ural_softc *sc = device_private(self); |
367 | struct usb_attach_arg *uaa = aux; |
368 | struct ieee80211com *ic = &sc->sc_ic; |
369 | struct ifnet *ifp = &sc->sc_if; |
370 | usb_interface_descriptor_t *id; |
371 | usb_endpoint_descriptor_t *ed; |
372 | usbd_status error; |
373 | char *devinfop; |
374 | int i; |
375 | |
376 | sc->sc_dev = self; |
377 | sc->sc_udev = uaa->uaa_device; |
378 | |
379 | aprint_naive("\n" ); |
380 | aprint_normal("\n" ); |
381 | |
382 | devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); |
383 | aprint_normal_dev(self, "%s\n" , devinfop); |
384 | usbd_devinfo_free(devinfop); |
385 | |
386 | error = usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0); |
387 | if (error != 0) { |
388 | aprint_error_dev(self, "failed to set configuration" |
389 | ", err=%s\n" , usbd_errstr(error)); |
390 | return; |
391 | } |
392 | |
393 | /* get the first interface handle */ |
394 | error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, |
395 | &sc->sc_iface); |
396 | if (error != 0) { |
397 | aprint_error_dev(self, "could not get interface handle\n" ); |
398 | return; |
399 | } |
400 | |
401 | /* |
402 | * Find endpoints. |
403 | */ |
404 | id = usbd_get_interface_descriptor(sc->sc_iface); |
405 | |
406 | sc->sc_rx_no = sc->sc_tx_no = -1; |
407 | for (i = 0; i < id->bNumEndpoints; i++) { |
408 | ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); |
409 | if (ed == NULL) { |
410 | aprint_error_dev(self, |
411 | "no endpoint descriptor for %d\n" , i); |
412 | return; |
413 | } |
414 | |
415 | if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && |
416 | UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) |
417 | sc->sc_rx_no = ed->bEndpointAddress; |
418 | else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && |
419 | UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) |
420 | sc->sc_tx_no = ed->bEndpointAddress; |
421 | } |
422 | if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { |
423 | aprint_error_dev(self, "missing endpoint\n" ); |
424 | return; |
425 | } |
426 | |
427 | usb_init_task(&sc->sc_task, ural_task, sc, 0); |
428 | callout_init(&sc->sc_scan_ch, 0); |
429 | sc->amrr.amrr_min_success_threshold = 1; |
430 | sc->amrr.amrr_max_success_threshold = 15; |
431 | callout_init(&sc->sc_amrr_ch, 0); |
432 | |
433 | /* retrieve RT2570 rev. no */ |
434 | sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); |
435 | |
436 | /* retrieve MAC address and various other things from EEPROM */ |
437 | ural_read_eeprom(sc); |
438 | |
439 | aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n" , |
440 | sc->asic_rev, ural_get_rf(sc->rf_rev)); |
441 | |
442 | ifp->if_softc = sc; |
443 | memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); |
444 | ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; |
445 | ifp->if_init = ural_init; |
446 | ifp->if_ioctl = ural_ioctl; |
447 | ifp->if_start = ural_start; |
448 | ifp->if_watchdog = ural_watchdog; |
449 | IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); |
450 | IFQ_SET_READY(&ifp->if_snd); |
451 | |
452 | ic->ic_ifp = ifp; |
453 | ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ |
454 | ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ |
455 | ic->ic_state = IEEE80211_S_INIT; |
456 | |
457 | /* set device capabilities */ |
458 | ic->ic_caps = |
459 | IEEE80211_C_IBSS | /* IBSS mode supported */ |
460 | IEEE80211_C_MONITOR | /* monitor mode supported */ |
461 | IEEE80211_C_HOSTAP | /* HostAp mode supported */ |
462 | IEEE80211_C_TXPMGT | /* tx power management */ |
463 | IEEE80211_C_SHPREAMBLE | /* short preamble supported */ |
464 | IEEE80211_C_SHSLOT | /* short slot time supported */ |
465 | IEEE80211_C_WPA; /* 802.11i */ |
466 | |
467 | if (sc->rf_rev == RAL_RF_5222) { |
468 | /* set supported .11a rates */ |
469 | ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; |
470 | |
471 | /* set supported .11a channels */ |
472 | for (i = 36; i <= 64; i += 4) { |
473 | ic->ic_channels[i].ic_freq = |
474 | ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); |
475 | ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; |
476 | } |
477 | for (i = 100; i <= 140; i += 4) { |
478 | ic->ic_channels[i].ic_freq = |
479 | ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); |
480 | ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; |
481 | } |
482 | for (i = 149; i <= 161; i += 4) { |
483 | ic->ic_channels[i].ic_freq = |
484 | ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); |
485 | ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; |
486 | } |
487 | } |
488 | |
489 | /* set supported .11b and .11g rates */ |
490 | ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; |
491 | ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; |
492 | |
493 | /* set supported .11b and .11g channels (1 through 14) */ |
494 | for (i = 1; i <= 14; i++) { |
495 | ic->ic_channels[i].ic_freq = |
496 | ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); |
497 | ic->ic_channels[i].ic_flags = |
498 | IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | |
499 | IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; |
500 | } |
501 | |
502 | if_attach(ifp); |
503 | ieee80211_ifattach(ic); |
504 | ic->ic_reset = ural_reset; |
505 | |
506 | /* override state transition machine */ |
507 | sc->sc_newstate = ic->ic_newstate; |
508 | ic->ic_newstate = ural_newstate; |
509 | ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); |
510 | |
511 | bpf_attach2(ifp, DLT_IEEE802_11_RADIO, |
512 | sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf); |
513 | |
514 | sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); |
515 | sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); |
516 | sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); |
517 | |
518 | sc->sc_txtap_len = sizeof(sc->sc_txtapu); |
519 | sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); |
520 | sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); |
521 | |
522 | ieee80211_announce(ic); |
523 | |
524 | usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev); |
525 | |
526 | if (!pmf_device_register(self, NULL, NULL)) |
527 | aprint_error_dev(self, "couldn't establish power handler\n" ); |
528 | |
529 | return; |
530 | } |
531 | |
532 | int |
533 | ural_detach(device_t self, int flags) |
534 | { |
535 | struct ural_softc *sc = device_private(self); |
536 | struct ieee80211com *ic = &sc->sc_ic; |
537 | struct ifnet *ifp = &sc->sc_if; |
538 | int s; |
539 | |
540 | pmf_device_deregister(self); |
541 | |
542 | s = splusb(); |
543 | |
544 | ural_stop(ifp, 1); |
545 | usb_rem_task(sc->sc_udev, &sc->sc_task); |
546 | callout_stop(&sc->sc_scan_ch); |
547 | callout_stop(&sc->sc_amrr_ch); |
548 | |
549 | bpf_detach(ifp); |
550 | ieee80211_ifdetach(ic); |
551 | if_detach(ifp); |
552 | |
553 | splx(s); |
554 | |
555 | usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev); |
556 | |
557 | return 0; |
558 | } |
559 | |
560 | Static int |
561 | ural_alloc_tx_list(struct ural_softc *sc) |
562 | { |
563 | struct ural_tx_data *data; |
564 | int i, error; |
565 | |
566 | sc->tx_queued = 0; |
567 | |
568 | for (i = 0; i < RAL_TX_LIST_COUNT; i++) { |
569 | data = &sc->tx_data[i]; |
570 | |
571 | data->sc = sc; |
572 | error = usbd_create_xfer(sc->sc_tx_pipeh, |
573 | RAL_TX_DESC_SIZE + MCLBYTES, USBD_FORCE_SHORT_XFER, 0, |
574 | &data->xfer); |
575 | if (error) { |
576 | printf("%s: could not allocate tx xfer\n" , |
577 | device_xname(sc->sc_dev)); |
578 | goto fail; |
579 | } |
580 | |
581 | data->buf = usbd_get_buffer(data->xfer); |
582 | } |
583 | |
584 | return 0; |
585 | |
586 | fail: ural_free_tx_list(sc); |
587 | return error; |
588 | } |
589 | |
590 | Static void |
591 | ural_free_tx_list(struct ural_softc *sc) |
592 | { |
593 | struct ural_tx_data *data; |
594 | int i; |
595 | |
596 | for (i = 0; i < RAL_TX_LIST_COUNT; i++) { |
597 | data = &sc->tx_data[i]; |
598 | |
599 | if (data->xfer != NULL) { |
600 | usbd_destroy_xfer(data->xfer); |
601 | data->xfer = NULL; |
602 | } |
603 | |
604 | if (data->ni != NULL) { |
605 | ieee80211_free_node(data->ni); |
606 | data->ni = NULL; |
607 | } |
608 | } |
609 | } |
610 | |
611 | Static int |
612 | ural_alloc_rx_list(struct ural_softc *sc) |
613 | { |
614 | struct ural_rx_data *data; |
615 | int i, error; |
616 | |
617 | for (i = 0; i < RAL_RX_LIST_COUNT; i++) { |
618 | data = &sc->rx_data[i]; |
619 | |
620 | data->sc = sc; |
621 | |
622 | error = usbd_create_xfer(sc->sc_rx_pipeh, MCLBYTES, |
623 | USBD_SHORT_XFER_OK, 0, &data->xfer); |
624 | if (error) { |
625 | printf("%s: could not allocate rx xfer\n" , |
626 | device_xname(sc->sc_dev)); |
627 | goto fail; |
628 | } |
629 | |
630 | MGETHDR(data->m, M_DONTWAIT, MT_DATA); |
631 | if (data->m == NULL) { |
632 | printf("%s: could not allocate rx mbuf\n" , |
633 | device_xname(sc->sc_dev)); |
634 | error = ENOMEM; |
635 | goto fail; |
636 | } |
637 | |
638 | MCLGET(data->m, M_DONTWAIT); |
639 | if (!(data->m->m_flags & M_EXT)) { |
640 | printf("%s: could not allocate rx mbuf cluster\n" , |
641 | device_xname(sc->sc_dev)); |
642 | error = ENOMEM; |
643 | goto fail; |
644 | } |
645 | |
646 | data->buf = mtod(data->m, uint8_t *); |
647 | } |
648 | |
649 | return 0; |
650 | |
651 | fail: ural_free_tx_list(sc); |
652 | return error; |
653 | } |
654 | |
655 | Static void |
656 | ural_free_rx_list(struct ural_softc *sc) |
657 | { |
658 | struct ural_rx_data *data; |
659 | int i; |
660 | |
661 | for (i = 0; i < RAL_RX_LIST_COUNT; i++) { |
662 | data = &sc->rx_data[i]; |
663 | |
664 | if (data->xfer != NULL) { |
665 | usbd_destroy_xfer(data->xfer); |
666 | data->xfer = NULL; |
667 | } |
668 | |
669 | if (data->m != NULL) { |
670 | m_freem(data->m); |
671 | data->m = NULL; |
672 | } |
673 | } |
674 | } |
675 | |
676 | Static int |
677 | ural_media_change(struct ifnet *ifp) |
678 | { |
679 | int error; |
680 | |
681 | error = ieee80211_media_change(ifp); |
682 | if (error != ENETRESET) |
683 | return error; |
684 | |
685 | if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) |
686 | ural_init(ifp); |
687 | |
688 | return 0; |
689 | } |
690 | |
691 | /* |
692 | * This function is called periodically (every 200ms) during scanning to |
693 | * switch from one channel to another. |
694 | */ |
695 | Static void |
696 | ural_next_scan(void *arg) |
697 | { |
698 | struct ural_softc *sc = arg; |
699 | struct ieee80211com *ic = &sc->sc_ic; |
700 | |
701 | if (ic->ic_state == IEEE80211_S_SCAN) |
702 | ieee80211_next_scan(ic); |
703 | } |
704 | |
705 | Static void |
706 | ural_task(void *arg) |
707 | { |
708 | struct ural_softc *sc = arg; |
709 | struct ieee80211com *ic = &sc->sc_ic; |
710 | enum ieee80211_state ostate; |
711 | struct ieee80211_node *ni; |
712 | struct mbuf *m; |
713 | |
714 | ostate = ic->ic_state; |
715 | |
716 | switch (sc->sc_state) { |
717 | case IEEE80211_S_INIT: |
718 | if (ostate == IEEE80211_S_RUN) { |
719 | /* abort TSF synchronization */ |
720 | ural_write(sc, RAL_TXRX_CSR19, 0); |
721 | |
722 | /* force tx led to stop blinking */ |
723 | ural_write(sc, RAL_MAC_CSR20, 0); |
724 | } |
725 | break; |
726 | |
727 | case IEEE80211_S_SCAN: |
728 | ural_set_chan(sc, ic->ic_curchan); |
729 | callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc); |
730 | break; |
731 | |
732 | case IEEE80211_S_AUTH: |
733 | ural_set_chan(sc, ic->ic_curchan); |
734 | break; |
735 | |
736 | case IEEE80211_S_ASSOC: |
737 | ural_set_chan(sc, ic->ic_curchan); |
738 | break; |
739 | |
740 | case IEEE80211_S_RUN: |
741 | ural_set_chan(sc, ic->ic_curchan); |
742 | |
743 | ni = ic->ic_bss; |
744 | |
745 | if (ic->ic_opmode != IEEE80211_M_MONITOR) { |
746 | ural_update_slot(ic->ic_ifp); |
747 | ural_set_txpreamble(sc); |
748 | ural_set_basicrates(sc); |
749 | ural_set_bssid(sc, ni->ni_bssid); |
750 | } |
751 | |
752 | if (ic->ic_opmode == IEEE80211_M_HOSTAP || |
753 | ic->ic_opmode == IEEE80211_M_IBSS) { |
754 | m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); |
755 | if (m == NULL) { |
756 | printf("%s: could not allocate beacon\n" , |
757 | device_xname(sc->sc_dev)); |
758 | return; |
759 | } |
760 | |
761 | if (ural_tx_bcn(sc, m, ni) != 0) { |
762 | m_freem(m); |
763 | printf("%s: could not send beacon\n" , |
764 | device_xname(sc->sc_dev)); |
765 | return; |
766 | } |
767 | |
768 | /* beacon is no longer needed */ |
769 | m_freem(m); |
770 | } |
771 | |
772 | /* make tx led blink on tx (controlled by ASIC) */ |
773 | ural_write(sc, RAL_MAC_CSR20, 1); |
774 | |
775 | if (ic->ic_opmode != IEEE80211_M_MONITOR) |
776 | ural_enable_tsf_sync(sc); |
777 | |
778 | /* enable automatic rate adaptation in STA mode */ |
779 | if (ic->ic_opmode == IEEE80211_M_STA && |
780 | ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) |
781 | ural_amrr_start(sc, ni); |
782 | |
783 | break; |
784 | } |
785 | |
786 | sc->sc_newstate(ic, sc->sc_state, -1); |
787 | } |
788 | |
789 | Static int |
790 | ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, |
791 | int arg) |
792 | { |
793 | struct ural_softc *sc = ic->ic_ifp->if_softc; |
794 | |
795 | usb_rem_task(sc->sc_udev, &sc->sc_task); |
796 | callout_stop(&sc->sc_scan_ch); |
797 | callout_stop(&sc->sc_amrr_ch); |
798 | |
799 | /* do it in a process context */ |
800 | sc->sc_state = nstate; |
801 | usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); |
802 | |
803 | return 0; |
804 | } |
805 | |
806 | /* quickly determine if a given rate is CCK or OFDM */ |
807 | #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) |
808 | |
809 | #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ |
810 | #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ |
811 | |
812 | #define RAL_SIFS 10 /* us */ |
813 | |
814 | #define RAL_RXTX_TURNAROUND 5 /* us */ |
815 | |
816 | /* |
817 | * This function is only used by the Rx radiotap code. |
818 | */ |
819 | Static int |
820 | ural_rxrate(struct ural_rx_desc *desc) |
821 | { |
822 | if (le32toh(desc->flags) & RAL_RX_OFDM) { |
823 | /* reverse function of ural_plcp_signal */ |
824 | switch (desc->rate) { |
825 | case 0xb: return 12; |
826 | case 0xf: return 18; |
827 | case 0xa: return 24; |
828 | case 0xe: return 36; |
829 | case 0x9: return 48; |
830 | case 0xd: return 72; |
831 | case 0x8: return 96; |
832 | case 0xc: return 108; |
833 | } |
834 | } else { |
835 | if (desc->rate == 10) |
836 | return 2; |
837 | if (desc->rate == 20) |
838 | return 4; |
839 | if (desc->rate == 55) |
840 | return 11; |
841 | if (desc->rate == 110) |
842 | return 22; |
843 | } |
844 | return 2; /* should not get there */ |
845 | } |
846 | |
847 | Static void |
848 | ural_txeof(struct usbd_xfer *xfer, void * priv, |
849 | usbd_status status) |
850 | { |
851 | struct ural_tx_data *data = priv; |
852 | struct ural_softc *sc = data->sc; |
853 | struct ifnet *ifp = &sc->sc_if; |
854 | int s; |
855 | |
856 | if (status != USBD_NORMAL_COMPLETION) { |
857 | if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) |
858 | return; |
859 | |
860 | printf("%s: could not transmit buffer: %s\n" , |
861 | device_xname(sc->sc_dev), usbd_errstr(status)); |
862 | |
863 | if (status == USBD_STALLED) |
864 | usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); |
865 | |
866 | ifp->if_oerrors++; |
867 | return; |
868 | } |
869 | |
870 | s = splnet(); |
871 | |
872 | m_freem(data->m); |
873 | data->m = NULL; |
874 | ieee80211_free_node(data->ni); |
875 | data->ni = NULL; |
876 | |
877 | sc->tx_queued--; |
878 | ifp->if_opackets++; |
879 | |
880 | DPRINTFN(10, ("tx done\n" )); |
881 | |
882 | sc->sc_tx_timer = 0; |
883 | ifp->if_flags &= ~IFF_OACTIVE; |
884 | ural_start(ifp); |
885 | |
886 | splx(s); |
887 | } |
888 | |
889 | Static void |
890 | ural_rxeof(struct usbd_xfer *xfer, void * priv, usbd_status status) |
891 | { |
892 | struct ural_rx_data *data = priv; |
893 | struct ural_softc *sc = data->sc; |
894 | struct ieee80211com *ic = &sc->sc_ic; |
895 | struct ifnet *ifp = &sc->sc_if; |
896 | struct ural_rx_desc *desc; |
897 | struct ieee80211_frame *wh; |
898 | struct ieee80211_node *ni; |
899 | struct mbuf *mnew, *m; |
900 | int s, len; |
901 | |
902 | if (status != USBD_NORMAL_COMPLETION) { |
903 | if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) |
904 | return; |
905 | |
906 | if (status == USBD_STALLED) |
907 | usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); |
908 | goto skip; |
909 | } |
910 | |
911 | usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); |
912 | |
913 | if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { |
914 | DPRINTF(("%s: xfer too short %d\n" , device_xname(sc->sc_dev), |
915 | len)); |
916 | ifp->if_ierrors++; |
917 | goto skip; |
918 | } |
919 | |
920 | /* rx descriptor is located at the end */ |
921 | desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); |
922 | |
923 | if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || |
924 | (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { |
925 | /* |
926 | * This should not happen since we did not request to receive |
927 | * those frames when we filled RAL_TXRX_CSR2. |
928 | */ |
929 | DPRINTFN(5, ("PHY or CRC error\n" )); |
930 | ifp->if_ierrors++; |
931 | goto skip; |
932 | } |
933 | |
934 | MGETHDR(mnew, M_DONTWAIT, MT_DATA); |
935 | if (mnew == NULL) { |
936 | ifp->if_ierrors++; |
937 | goto skip; |
938 | } |
939 | |
940 | MCLGET(mnew, M_DONTWAIT); |
941 | if (!(mnew->m_flags & M_EXT)) { |
942 | ifp->if_ierrors++; |
943 | m_freem(mnew); |
944 | goto skip; |
945 | } |
946 | |
947 | m = data->m; |
948 | data->m = mnew; |
949 | data->buf = mtod(data->m, uint8_t *); |
950 | |
951 | /* finalize mbuf */ |
952 | m_set_rcvif(m, ifp); |
953 | m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; |
954 | m->m_flags |= M_HASFCS; /* h/w leaves FCS */ |
955 | |
956 | s = splnet(); |
957 | |
958 | if (sc->sc_drvbpf != NULL) { |
959 | struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; |
960 | |
961 | tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; |
962 | tap->wr_rate = ural_rxrate(desc); |
963 | tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); |
964 | tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); |
965 | tap->wr_antenna = sc->rx_ant; |
966 | tap->wr_antsignal = desc->rssi; |
967 | |
968 | bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); |
969 | } |
970 | |
971 | wh = mtod(m, struct ieee80211_frame *); |
972 | ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); |
973 | |
974 | /* send the frame to the 802.11 layer */ |
975 | ieee80211_input(ic, m, ni, desc->rssi, 0); |
976 | |
977 | /* node is no longer needed */ |
978 | ieee80211_free_node(ni); |
979 | |
980 | splx(s); |
981 | |
982 | DPRINTFN(15, ("rx done\n" )); |
983 | |
984 | skip: /* setup a new transfer */ |
985 | usbd_setup_xfer(xfer, data, data->buf, MCLBYTES, |
986 | USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); |
987 | usbd_transfer(xfer); |
988 | } |
989 | |
990 | /* |
991 | * Return the expected ack rate for a frame transmitted at rate `rate'. |
992 | * XXX: this should depend on the destination node basic rate set. |
993 | */ |
994 | Static int |
995 | ural_ack_rate(struct ieee80211com *ic, int rate) |
996 | { |
997 | switch (rate) { |
998 | /* CCK rates */ |
999 | case 2: |
1000 | return 2; |
1001 | case 4: |
1002 | case 11: |
1003 | case 22: |
1004 | return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; |
1005 | |
1006 | /* OFDM rates */ |
1007 | case 12: |
1008 | case 18: |
1009 | return 12; |
1010 | case 24: |
1011 | case 36: |
1012 | return 24; |
1013 | case 48: |
1014 | case 72: |
1015 | case 96: |
1016 | case 108: |
1017 | return 48; |
1018 | } |
1019 | |
1020 | /* default to 1Mbps */ |
1021 | return 2; |
1022 | } |
1023 | |
1024 | /* |
1025 | * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. |
1026 | * The function automatically determines the operating mode depending on the |
1027 | * given rate. `flags' indicates whether short preamble is in use or not. |
1028 | */ |
1029 | Static uint16_t |
1030 | ural_txtime(int len, int rate, uint32_t flags) |
1031 | { |
1032 | uint16_t txtime; |
1033 | |
1034 | if (RAL_RATE_IS_OFDM(rate)) { |
1035 | /* IEEE Std 802.11g-2003, pp. 37 */ |
1036 | txtime = (8 + 4 * len + 3 + rate - 1) / rate; |
1037 | txtime = 16 + 4 + 4 * txtime + 6; |
1038 | } else { |
1039 | /* IEEE Std 802.11b-1999, pp. 28 */ |
1040 | txtime = (16 * len + rate - 1) / rate; |
1041 | if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) |
1042 | txtime += 72 + 24; |
1043 | else |
1044 | txtime += 144 + 48; |
1045 | } |
1046 | return txtime; |
1047 | } |
1048 | |
1049 | Static uint8_t |
1050 | ural_plcp_signal(int rate) |
1051 | { |
1052 | switch (rate) { |
1053 | /* CCK rates (returned values are device-dependent) */ |
1054 | case 2: return 0x0; |
1055 | case 4: return 0x1; |
1056 | case 11: return 0x2; |
1057 | case 22: return 0x3; |
1058 | |
1059 | /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ |
1060 | case 12: return 0xb; |
1061 | case 18: return 0xf; |
1062 | case 24: return 0xa; |
1063 | case 36: return 0xe; |
1064 | case 48: return 0x9; |
1065 | case 72: return 0xd; |
1066 | case 96: return 0x8; |
1067 | case 108: return 0xc; |
1068 | |
1069 | /* unsupported rates (should not get there) */ |
1070 | default: return 0xff; |
1071 | } |
1072 | } |
1073 | |
1074 | Static void |
1075 | ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, |
1076 | uint32_t flags, int len, int rate) |
1077 | { |
1078 | struct ieee80211com *ic = &sc->sc_ic; |
1079 | uint16_t plcp_length; |
1080 | int remainder; |
1081 | |
1082 | desc->flags = htole32(flags); |
1083 | desc->flags |= htole32(RAL_TX_NEWSEQ); |
1084 | desc->flags |= htole32(len << 16); |
1085 | |
1086 | desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); |
1087 | desc->wme |= htole16(RAL_IVOFFSET(sizeof(struct ieee80211_frame))); |
1088 | |
1089 | /* setup PLCP fields */ |
1090 | desc->plcp_signal = ural_plcp_signal(rate); |
1091 | desc->plcp_service = 4; |
1092 | |
1093 | len += IEEE80211_CRC_LEN; |
1094 | if (RAL_RATE_IS_OFDM(rate)) { |
1095 | desc->flags |= htole32(RAL_TX_OFDM); |
1096 | |
1097 | plcp_length = len & 0xfff; |
1098 | desc->plcp_length_hi = plcp_length >> 6; |
1099 | desc->plcp_length_lo = plcp_length & 0x3f; |
1100 | } else { |
1101 | plcp_length = (16 * len + rate - 1) / rate; |
1102 | if (rate == 22) { |
1103 | remainder = (16 * len) % 22; |
1104 | if (remainder != 0 && remainder < 7) |
1105 | desc->plcp_service |= RAL_PLCP_LENGEXT; |
1106 | } |
1107 | desc->plcp_length_hi = plcp_length >> 8; |
1108 | desc->plcp_length_lo = plcp_length & 0xff; |
1109 | |
1110 | if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) |
1111 | desc->plcp_signal |= 0x08; |
1112 | } |
1113 | |
1114 | desc->iv = 0; |
1115 | desc->eiv = 0; |
1116 | } |
1117 | |
1118 | #define RAL_TX_TIMEOUT 5000 |
1119 | |
1120 | Static int |
1121 | ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) |
1122 | { |
1123 | struct ural_tx_desc *desc; |
1124 | struct usbd_xfer *xfer; |
1125 | uint8_t cmd = 0; |
1126 | usbd_status error; |
1127 | uint8_t *buf; |
1128 | int xferlen, rate; |
1129 | |
1130 | rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; |
1131 | |
1132 | /* xfer length needs to be a multiple of two! */ |
1133 | xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; |
1134 | |
1135 | error = usbd_create_xfer(sc->sc_tx_pipeh, xferlen, |
1136 | USBD_FORCE_SHORT_XFER, 0, &xfer); |
1137 | if (error) |
1138 | return error; |
1139 | |
1140 | buf = usbd_get_buffer(xfer); |
1141 | |
1142 | usbd_setup_xfer(xfer, NULL, &cmd, sizeof(cmd), USBD_FORCE_SHORT_XFER, |
1143 | RAL_TX_TIMEOUT, NULL); |
1144 | |
1145 | error = usbd_sync_transfer(xfer); |
1146 | if (error != 0) { |
1147 | usbd_destroy_xfer(xfer); |
1148 | return error; |
1149 | } |
1150 | |
1151 | desc = (struct ural_tx_desc *)buf; |
1152 | |
1153 | m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); |
1154 | ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, |
1155 | m0->m_pkthdr.len, rate); |
1156 | |
1157 | DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n" , |
1158 | m0->m_pkthdr.len, rate, xferlen)); |
1159 | |
1160 | usbd_setup_xfer(xfer, NULL, buf, xferlen, USBD_FORCE_SHORT_XFER, |
1161 | RAL_TX_TIMEOUT, NULL); |
1162 | |
1163 | error = usbd_sync_transfer(xfer); |
1164 | usbd_destroy_xfer(xfer); |
1165 | |
1166 | return error; |
1167 | } |
1168 | |
1169 | Static int |
1170 | ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) |
1171 | { |
1172 | struct ieee80211com *ic = &sc->sc_ic; |
1173 | struct ural_tx_desc *desc; |
1174 | struct ural_tx_data *data; |
1175 | struct ieee80211_frame *wh; |
1176 | struct ieee80211_key *k; |
1177 | uint32_t flags = 0; |
1178 | uint16_t dur; |
1179 | usbd_status error; |
1180 | int xferlen, rate; |
1181 | |
1182 | data = &sc->tx_data[0]; |
1183 | desc = (struct ural_tx_desc *)data->buf; |
1184 | |
1185 | rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; |
1186 | |
1187 | wh = mtod(m0, struct ieee80211_frame *); |
1188 | |
1189 | if (wh->i_fc[1] & IEEE80211_FC1_WEP) { |
1190 | k = ieee80211_crypto_encap(ic, ni, m0); |
1191 | if (k == NULL) { |
1192 | m_freem(m0); |
1193 | return ENOBUFS; |
1194 | } |
1195 | } |
1196 | |
1197 | data->m = m0; |
1198 | data->ni = ni; |
1199 | |
1200 | wh = mtod(m0, struct ieee80211_frame *); |
1201 | |
1202 | if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { |
1203 | flags |= RAL_TX_ACK; |
1204 | |
1205 | dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; |
1206 | *(uint16_t *)wh->i_dur = htole16(dur); |
1207 | |
1208 | /* tell hardware to add timestamp for probe responses */ |
1209 | if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == |
1210 | IEEE80211_FC0_TYPE_MGT && |
1211 | (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == |
1212 | IEEE80211_FC0_SUBTYPE_PROBE_RESP) |
1213 | flags |= RAL_TX_TIMESTAMP; |
1214 | } |
1215 | |
1216 | if (sc->sc_drvbpf != NULL) { |
1217 | struct ural_tx_radiotap_header *tap = &sc->sc_txtap; |
1218 | |
1219 | tap->wt_flags = 0; |
1220 | tap->wt_rate = rate; |
1221 | tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); |
1222 | tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); |
1223 | tap->wt_antenna = sc->tx_ant; |
1224 | |
1225 | bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); |
1226 | } |
1227 | |
1228 | m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); |
1229 | ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); |
1230 | |
1231 | /* align end on a 2-bytes boundary */ |
1232 | xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; |
1233 | |
1234 | /* |
1235 | * No space left in the last URB to store the extra 2 bytes, force |
1236 | * sending of another URB. |
1237 | */ |
1238 | if ((xferlen % 64) == 0) |
1239 | xferlen += 2; |
1240 | |
1241 | DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n" , |
1242 | m0->m_pkthdr.len, rate, xferlen)); |
1243 | |
1244 | usbd_setup_xfer(data->xfer, data, data->buf, xferlen, |
1245 | USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); |
1246 | |
1247 | error = usbd_transfer(data->xfer); |
1248 | if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { |
1249 | m_freem(m0); |
1250 | return error; |
1251 | } |
1252 | |
1253 | sc->tx_queued++; |
1254 | |
1255 | return 0; |
1256 | } |
1257 | |
1258 | Static int |
1259 | ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) |
1260 | { |
1261 | struct ieee80211com *ic = &sc->sc_ic; |
1262 | struct ural_tx_desc *desc; |
1263 | struct ural_tx_data *data; |
1264 | struct ieee80211_frame *wh; |
1265 | struct ieee80211_key *k; |
1266 | uint32_t flags = 0; |
1267 | uint16_t dur; |
1268 | usbd_status error; |
1269 | int xferlen, rate; |
1270 | |
1271 | wh = mtod(m0, struct ieee80211_frame *); |
1272 | |
1273 | if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) |
1274 | rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; |
1275 | else |
1276 | rate = ni->ni_rates.rs_rates[ni->ni_txrate]; |
1277 | |
1278 | rate &= IEEE80211_RATE_VAL; |
1279 | |
1280 | if (wh->i_fc[1] & IEEE80211_FC1_WEP) { |
1281 | k = ieee80211_crypto_encap(ic, ni, m0); |
1282 | if (k == NULL) { |
1283 | m_freem(m0); |
1284 | return ENOBUFS; |
1285 | } |
1286 | |
1287 | /* packet header may have moved, reset our local pointer */ |
1288 | wh = mtod(m0, struct ieee80211_frame *); |
1289 | } |
1290 | |
1291 | data = &sc->tx_data[0]; |
1292 | desc = (struct ural_tx_desc *)data->buf; |
1293 | |
1294 | data->m = m0; |
1295 | data->ni = ni; |
1296 | |
1297 | if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { |
1298 | flags |= RAL_TX_ACK; |
1299 | flags |= RAL_TX_RETRY(7); |
1300 | |
1301 | dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), |
1302 | ic->ic_flags) + RAL_SIFS; |
1303 | *(uint16_t *)wh->i_dur = htole16(dur); |
1304 | } |
1305 | |
1306 | if (sc->sc_drvbpf != NULL) { |
1307 | struct ural_tx_radiotap_header *tap = &sc->sc_txtap; |
1308 | |
1309 | tap->wt_flags = 0; |
1310 | tap->wt_rate = rate; |
1311 | tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); |
1312 | tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); |
1313 | tap->wt_antenna = sc->tx_ant; |
1314 | |
1315 | bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); |
1316 | } |
1317 | |
1318 | m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); |
1319 | ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); |
1320 | |
1321 | /* align end on a 2-bytes boundary */ |
1322 | xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; |
1323 | |
1324 | /* |
1325 | * No space left in the last URB to store the extra 2 bytes, force |
1326 | * sending of another URB. |
1327 | */ |
1328 | if ((xferlen % 64) == 0) |
1329 | xferlen += 2; |
1330 | |
1331 | DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n" , |
1332 | m0->m_pkthdr.len, rate, xferlen)); |
1333 | usbd_setup_xfer(data->xfer, data, data->buf, xferlen, |
1334 | USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); |
1335 | |
1336 | error = usbd_transfer(data->xfer); |
1337 | if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) |
1338 | return error; |
1339 | |
1340 | sc->tx_queued++; |
1341 | |
1342 | return 0; |
1343 | } |
1344 | |
1345 | Static void |
1346 | ural_start(struct ifnet *ifp) |
1347 | { |
1348 | struct ural_softc *sc = ifp->if_softc; |
1349 | struct ieee80211com *ic = &sc->sc_ic; |
1350 | struct mbuf *m0; |
1351 | struct ether_header *eh; |
1352 | struct ieee80211_node *ni; |
1353 | |
1354 | for (;;) { |
1355 | IF_POLL(&ic->ic_mgtq, m0); |
1356 | if (m0 != NULL) { |
1357 | if (sc->tx_queued >= RAL_TX_LIST_COUNT) { |
1358 | ifp->if_flags |= IFF_OACTIVE; |
1359 | break; |
1360 | } |
1361 | IF_DEQUEUE(&ic->ic_mgtq, m0); |
1362 | |
1363 | ni = M_GETCTX(m0, struct ieee80211_node *); |
1364 | M_CLEARCTX(m0); |
1365 | bpf_mtap3(ic->ic_rawbpf, m0); |
1366 | if (ural_tx_mgt(sc, m0, ni) != 0) |
1367 | break; |
1368 | |
1369 | } else { |
1370 | if (ic->ic_state != IEEE80211_S_RUN) |
1371 | break; |
1372 | IFQ_DEQUEUE(&ifp->if_snd, m0); |
1373 | if (m0 == NULL) |
1374 | break; |
1375 | if (sc->tx_queued >= RAL_TX_LIST_COUNT) { |
1376 | IF_PREPEND(&ifp->if_snd, m0); |
1377 | ifp->if_flags |= IFF_OACTIVE; |
1378 | break; |
1379 | } |
1380 | |
1381 | if (m0->m_len < sizeof(struct ether_header) && |
1382 | !(m0 = m_pullup(m0, sizeof(struct ether_header)))) |
1383 | continue; |
1384 | |
1385 | eh = mtod(m0, struct ether_header *); |
1386 | ni = ieee80211_find_txnode(ic, eh->ether_dhost); |
1387 | if (ni == NULL) { |
1388 | m_freem(m0); |
1389 | continue; |
1390 | } |
1391 | bpf_mtap(ifp, m0); |
1392 | m0 = ieee80211_encap(ic, m0, ni); |
1393 | if (m0 == NULL) { |
1394 | ieee80211_free_node(ni); |
1395 | continue; |
1396 | } |
1397 | bpf_mtap3(ic->ic_rawbpf, m0); |
1398 | if (ural_tx_data(sc, m0, ni) != 0) { |
1399 | ieee80211_free_node(ni); |
1400 | ifp->if_oerrors++; |
1401 | break; |
1402 | } |
1403 | } |
1404 | |
1405 | sc->sc_tx_timer = 5; |
1406 | ifp->if_timer = 1; |
1407 | } |
1408 | } |
1409 | |
1410 | Static void |
1411 | ural_watchdog(struct ifnet *ifp) |
1412 | { |
1413 | struct ural_softc *sc = ifp->if_softc; |
1414 | struct ieee80211com *ic = &sc->sc_ic; |
1415 | |
1416 | ifp->if_timer = 0; |
1417 | |
1418 | if (sc->sc_tx_timer > 0) { |
1419 | if (--sc->sc_tx_timer == 0) { |
1420 | printf("%s: device timeout\n" , device_xname(sc->sc_dev)); |
1421 | /*ural_init(sc); XXX needs a process context! */ |
1422 | ifp->if_oerrors++; |
1423 | return; |
1424 | } |
1425 | ifp->if_timer = 1; |
1426 | } |
1427 | |
1428 | ieee80211_watchdog(ic); |
1429 | } |
1430 | |
1431 | /* |
1432 | * This function allows for fast channel switching in monitor mode (used by |
1433 | * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to |
1434 | * generate a new beacon frame. |
1435 | */ |
1436 | Static int |
1437 | ural_reset(struct ifnet *ifp) |
1438 | { |
1439 | struct ural_softc *sc = ifp->if_softc; |
1440 | struct ieee80211com *ic = &sc->sc_ic; |
1441 | |
1442 | if (ic->ic_opmode != IEEE80211_M_MONITOR) |
1443 | return ENETRESET; |
1444 | |
1445 | ural_set_chan(sc, ic->ic_curchan); |
1446 | |
1447 | return 0; |
1448 | } |
1449 | |
1450 | Static int |
1451 | ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) |
1452 | { |
1453 | #define IS_RUNNING(ifp) \ |
1454 | (((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING)) |
1455 | |
1456 | struct ural_softc *sc = ifp->if_softc; |
1457 | struct ieee80211com *ic = &sc->sc_ic; |
1458 | int s, error = 0; |
1459 | |
1460 | s = splnet(); |
1461 | |
1462 | switch (cmd) { |
1463 | case SIOCSIFFLAGS: |
1464 | if ((error = ifioctl_common(ifp, cmd, data)) != 0) |
1465 | break; |
1466 | /* XXX re-use ether_ioctl() */ |
1467 | switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { |
1468 | case IFF_UP|IFF_RUNNING: |
1469 | ural_update_promisc(sc); |
1470 | break; |
1471 | case IFF_UP: |
1472 | ural_init(ifp); |
1473 | break; |
1474 | case IFF_RUNNING: |
1475 | ural_stop(ifp, 1); |
1476 | break; |
1477 | case 0: |
1478 | break; |
1479 | } |
1480 | break; |
1481 | |
1482 | case SIOCADDMULTI: |
1483 | case SIOCDELMULTI: |
1484 | if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { |
1485 | error = 0; |
1486 | } |
1487 | break; |
1488 | |
1489 | default: |
1490 | error = ieee80211_ioctl(ic, cmd, data); |
1491 | } |
1492 | |
1493 | if (error == ENETRESET) { |
1494 | if (IS_RUNNING(ifp) && |
1495 | (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)) |
1496 | ural_init(ifp); |
1497 | error = 0; |
1498 | } |
1499 | |
1500 | splx(s); |
1501 | |
1502 | return error; |
1503 | #undef IS_RUNNING |
1504 | } |
1505 | |
1506 | Static void |
1507 | ural_set_testmode(struct ural_softc *sc) |
1508 | { |
1509 | usb_device_request_t req; |
1510 | usbd_status error; |
1511 | |
1512 | req.bmRequestType = UT_WRITE_VENDOR_DEVICE; |
1513 | req.bRequest = RAL_VENDOR_REQUEST; |
1514 | USETW(req.wValue, 4); |
1515 | USETW(req.wIndex, 1); |
1516 | USETW(req.wLength, 0); |
1517 | |
1518 | error = usbd_do_request(sc->sc_udev, &req, NULL); |
1519 | if (error != 0) { |
1520 | printf("%s: could not set test mode: %s\n" , |
1521 | device_xname(sc->sc_dev), usbd_errstr(error)); |
1522 | } |
1523 | } |
1524 | |
1525 | Static void |
1526 | ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) |
1527 | { |
1528 | usb_device_request_t req; |
1529 | usbd_status error; |
1530 | |
1531 | req.bmRequestType = UT_READ_VENDOR_DEVICE; |
1532 | req.bRequest = RAL_READ_EEPROM; |
1533 | USETW(req.wValue, 0); |
1534 | USETW(req.wIndex, addr); |
1535 | USETW(req.wLength, len); |
1536 | |
1537 | error = usbd_do_request(sc->sc_udev, &req, buf); |
1538 | if (error != 0) { |
1539 | printf("%s: could not read EEPROM: %s\n" , |
1540 | device_xname(sc->sc_dev), usbd_errstr(error)); |
1541 | } |
1542 | } |
1543 | |
1544 | Static uint16_t |
1545 | ural_read(struct ural_softc *sc, uint16_t reg) |
1546 | { |
1547 | usb_device_request_t req; |
1548 | usbd_status error; |
1549 | uint16_t val; |
1550 | |
1551 | req.bmRequestType = UT_READ_VENDOR_DEVICE; |
1552 | req.bRequest = RAL_READ_MAC; |
1553 | USETW(req.wValue, 0); |
1554 | USETW(req.wIndex, reg); |
1555 | USETW(req.wLength, sizeof(uint16_t)); |
1556 | |
1557 | error = usbd_do_request(sc->sc_udev, &req, &val); |
1558 | if (error != 0) { |
1559 | printf("%s: could not read MAC register: %s\n" , |
1560 | device_xname(sc->sc_dev), usbd_errstr(error)); |
1561 | return 0; |
1562 | } |
1563 | |
1564 | return le16toh(val); |
1565 | } |
1566 | |
1567 | Static void |
1568 | ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) |
1569 | { |
1570 | usb_device_request_t req; |
1571 | usbd_status error; |
1572 | |
1573 | req.bmRequestType = UT_READ_VENDOR_DEVICE; |
1574 | req.bRequest = RAL_READ_MULTI_MAC; |
1575 | USETW(req.wValue, 0); |
1576 | USETW(req.wIndex, reg); |
1577 | USETW(req.wLength, len); |
1578 | |
1579 | error = usbd_do_request(sc->sc_udev, &req, buf); |
1580 | if (error != 0) { |
1581 | printf("%s: could not read MAC register: %s\n" , |
1582 | device_xname(sc->sc_dev), usbd_errstr(error)); |
1583 | } |
1584 | } |
1585 | |
1586 | Static void |
1587 | ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) |
1588 | { |
1589 | usb_device_request_t req; |
1590 | usbd_status error; |
1591 | |
1592 | req.bmRequestType = UT_WRITE_VENDOR_DEVICE; |
1593 | req.bRequest = RAL_WRITE_MAC; |
1594 | USETW(req.wValue, val); |
1595 | USETW(req.wIndex, reg); |
1596 | USETW(req.wLength, 0); |
1597 | |
1598 | error = usbd_do_request(sc->sc_udev, &req, NULL); |
1599 | if (error != 0) { |
1600 | printf("%s: could not write MAC register: %s\n" , |
1601 | device_xname(sc->sc_dev), usbd_errstr(error)); |
1602 | } |
1603 | } |
1604 | |
1605 | Static void |
1606 | ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) |
1607 | { |
1608 | usb_device_request_t req; |
1609 | usbd_status error; |
1610 | |
1611 | req.bmRequestType = UT_WRITE_VENDOR_DEVICE; |
1612 | req.bRequest = RAL_WRITE_MULTI_MAC; |
1613 | USETW(req.wValue, 0); |
1614 | USETW(req.wIndex, reg); |
1615 | USETW(req.wLength, len); |
1616 | |
1617 | error = usbd_do_request(sc->sc_udev, &req, buf); |
1618 | if (error != 0) { |
1619 | printf("%s: could not write MAC register: %s\n" , |
1620 | device_xname(sc->sc_dev), usbd_errstr(error)); |
1621 | } |
1622 | } |
1623 | |
1624 | Static void |
1625 | ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) |
1626 | { |
1627 | uint16_t tmp; |
1628 | int ntries; |
1629 | |
1630 | for (ntries = 0; ntries < 5; ntries++) { |
1631 | if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) |
1632 | break; |
1633 | } |
1634 | if (ntries == 5) { |
1635 | printf("%s: could not write to BBP\n" , device_xname(sc->sc_dev)); |
1636 | return; |
1637 | } |
1638 | |
1639 | tmp = reg << 8 | val; |
1640 | ural_write(sc, RAL_PHY_CSR7, tmp); |
1641 | } |
1642 | |
1643 | Static uint8_t |
1644 | ural_bbp_read(struct ural_softc *sc, uint8_t reg) |
1645 | { |
1646 | uint16_t val; |
1647 | int ntries; |
1648 | |
1649 | val = RAL_BBP_WRITE | reg << 8; |
1650 | ural_write(sc, RAL_PHY_CSR7, val); |
1651 | |
1652 | for (ntries = 0; ntries < 5; ntries++) { |
1653 | if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) |
1654 | break; |
1655 | } |
1656 | if (ntries == 5) { |
1657 | printf("%s: could not read BBP\n" , device_xname(sc->sc_dev)); |
1658 | return 0; |
1659 | } |
1660 | |
1661 | return ural_read(sc, RAL_PHY_CSR7) & 0xff; |
1662 | } |
1663 | |
1664 | Static void |
1665 | ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) |
1666 | { |
1667 | uint32_t tmp; |
1668 | int ntries; |
1669 | |
1670 | for (ntries = 0; ntries < 5; ntries++) { |
1671 | if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) |
1672 | break; |
1673 | } |
1674 | if (ntries == 5) { |
1675 | printf("%s: could not write to RF\n" , device_xname(sc->sc_dev)); |
1676 | return; |
1677 | } |
1678 | |
1679 | tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); |
1680 | ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); |
1681 | ural_write(sc, RAL_PHY_CSR10, tmp >> 16); |
1682 | |
1683 | /* remember last written value in sc */ |
1684 | sc->rf_regs[reg] = val; |
1685 | |
1686 | DPRINTFN(15, ("RF R[%u] <- 0x%05x\n" , reg & 0x3, val & 0xfffff)); |
1687 | } |
1688 | |
1689 | Static void |
1690 | ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) |
1691 | { |
1692 | struct ieee80211com *ic = &sc->sc_ic; |
1693 | uint8_t power, tmp; |
1694 | u_int i, chan; |
1695 | |
1696 | chan = ieee80211_chan2ieee(ic, c); |
1697 | if (chan == 0 || chan == IEEE80211_CHAN_ANY) |
1698 | return; |
1699 | |
1700 | if (IEEE80211_IS_CHAN_2GHZ(c)) |
1701 | power = min(sc->txpow[chan - 1], 31); |
1702 | else |
1703 | power = 31; |
1704 | |
1705 | /* adjust txpower using ifconfig settings */ |
1706 | power -= (100 - ic->ic_txpowlimit) / 8; |
1707 | |
1708 | DPRINTFN(2, ("setting channel to %u, txpower to %u\n" , chan, power)); |
1709 | |
1710 | switch (sc->rf_rev) { |
1711 | case RAL_RF_2522: |
1712 | ural_rf_write(sc, RAL_RF1, 0x00814); |
1713 | ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); |
1714 | ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); |
1715 | break; |
1716 | |
1717 | case RAL_RF_2523: |
1718 | ural_rf_write(sc, RAL_RF1, 0x08804); |
1719 | ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); |
1720 | ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); |
1721 | ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); |
1722 | break; |
1723 | |
1724 | case RAL_RF_2524: |
1725 | ural_rf_write(sc, RAL_RF1, 0x0c808); |
1726 | ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); |
1727 | ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); |
1728 | ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); |
1729 | break; |
1730 | |
1731 | case RAL_RF_2525: |
1732 | ural_rf_write(sc, RAL_RF1, 0x08808); |
1733 | ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); |
1734 | ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); |
1735 | ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); |
1736 | |
1737 | ural_rf_write(sc, RAL_RF1, 0x08808); |
1738 | ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); |
1739 | ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); |
1740 | ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); |
1741 | break; |
1742 | |
1743 | case RAL_RF_2525E: |
1744 | ural_rf_write(sc, RAL_RF1, 0x08808); |
1745 | ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); |
1746 | ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); |
1747 | ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); |
1748 | break; |
1749 | |
1750 | case RAL_RF_2526: |
1751 | ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); |
1752 | ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); |
1753 | ural_rf_write(sc, RAL_RF1, 0x08804); |
1754 | |
1755 | ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); |
1756 | ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); |
1757 | ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); |
1758 | break; |
1759 | |
1760 | /* dual-band RF */ |
1761 | case RAL_RF_5222: |
1762 | for (i = 0; ural_rf5222[i].chan != chan; i++); |
1763 | |
1764 | ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); |
1765 | ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); |
1766 | ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); |
1767 | ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); |
1768 | break; |
1769 | } |
1770 | |
1771 | if (ic->ic_opmode != IEEE80211_M_MONITOR && |
1772 | ic->ic_state != IEEE80211_S_SCAN) { |
1773 | /* set Japan filter bit for channel 14 */ |
1774 | tmp = ural_bbp_read(sc, 70); |
1775 | |
1776 | tmp &= ~RAL_JAPAN_FILTER; |
1777 | if (chan == 14) |
1778 | tmp |= RAL_JAPAN_FILTER; |
1779 | |
1780 | ural_bbp_write(sc, 70, tmp); |
1781 | |
1782 | /* clear CRC errors */ |
1783 | ural_read(sc, RAL_STA_CSR0); |
1784 | |
1785 | DELAY(10000); |
1786 | ural_disable_rf_tune(sc); |
1787 | } |
1788 | } |
1789 | |
1790 | /* |
1791 | * Disable RF auto-tuning. |
1792 | */ |
1793 | Static void |
1794 | ural_disable_rf_tune(struct ural_softc *sc) |
1795 | { |
1796 | uint32_t tmp; |
1797 | |
1798 | if (sc->rf_rev != RAL_RF_2523) { |
1799 | tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; |
1800 | ural_rf_write(sc, RAL_RF1, tmp); |
1801 | } |
1802 | |
1803 | tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; |
1804 | ural_rf_write(sc, RAL_RF3, tmp); |
1805 | |
1806 | DPRINTFN(2, ("disabling RF autotune\n" )); |
1807 | } |
1808 | |
1809 | /* |
1810 | * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF |
1811 | * synchronization. |
1812 | */ |
1813 | Static void |
1814 | ural_enable_tsf_sync(struct ural_softc *sc) |
1815 | { |
1816 | struct ieee80211com *ic = &sc->sc_ic; |
1817 | uint16_t logcwmin, preload, tmp; |
1818 | |
1819 | /* first, disable TSF synchronization */ |
1820 | ural_write(sc, RAL_TXRX_CSR19, 0); |
1821 | |
1822 | tmp = (16 * ic->ic_bss->ni_intval) << 4; |
1823 | ural_write(sc, RAL_TXRX_CSR18, tmp); |
1824 | |
1825 | logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; |
1826 | preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; |
1827 | tmp = logcwmin << 12 | preload; |
1828 | ural_write(sc, RAL_TXRX_CSR20, tmp); |
1829 | |
1830 | /* finally, enable TSF synchronization */ |
1831 | tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; |
1832 | if (ic->ic_opmode == IEEE80211_M_STA) |
1833 | tmp |= RAL_ENABLE_TSF_SYNC(1); |
1834 | else |
1835 | tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; |
1836 | ural_write(sc, RAL_TXRX_CSR19, tmp); |
1837 | |
1838 | DPRINTF(("enabling TSF synchronization\n" )); |
1839 | } |
1840 | |
1841 | Static void |
1842 | ural_update_slot(struct ifnet *ifp) |
1843 | { |
1844 | struct ural_softc *sc = ifp->if_softc; |
1845 | struct ieee80211com *ic = &sc->sc_ic; |
1846 | uint16_t slottime, sifs, eifs; |
1847 | |
1848 | slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; |
1849 | |
1850 | /* |
1851 | * These settings may sound a bit inconsistent but this is what the |
1852 | * reference driver does. |
1853 | */ |
1854 | if (ic->ic_curmode == IEEE80211_MODE_11B) { |
1855 | sifs = 16 - RAL_RXTX_TURNAROUND; |
1856 | eifs = 364; |
1857 | } else { |
1858 | sifs = 10 - RAL_RXTX_TURNAROUND; |
1859 | eifs = 64; |
1860 | } |
1861 | |
1862 | ural_write(sc, RAL_MAC_CSR10, slottime); |
1863 | ural_write(sc, RAL_MAC_CSR11, sifs); |
1864 | ural_write(sc, RAL_MAC_CSR12, eifs); |
1865 | } |
1866 | |
1867 | Static void |
1868 | ural_set_txpreamble(struct ural_softc *sc) |
1869 | { |
1870 | uint16_t tmp; |
1871 | |
1872 | tmp = ural_read(sc, RAL_TXRX_CSR10); |
1873 | |
1874 | tmp &= ~RAL_SHORT_PREAMBLE; |
1875 | if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) |
1876 | tmp |= RAL_SHORT_PREAMBLE; |
1877 | |
1878 | ural_write(sc, RAL_TXRX_CSR10, tmp); |
1879 | } |
1880 | |
1881 | Static void |
1882 | ural_set_basicrates(struct ural_softc *sc) |
1883 | { |
1884 | struct ieee80211com *ic = &sc->sc_ic; |
1885 | |
1886 | /* update basic rate set */ |
1887 | if (ic->ic_curmode == IEEE80211_MODE_11B) { |
1888 | /* 11b basic rates: 1, 2Mbps */ |
1889 | ural_write(sc, RAL_TXRX_CSR11, 0x3); |
1890 | } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { |
1891 | /* 11a basic rates: 6, 12, 24Mbps */ |
1892 | ural_write(sc, RAL_TXRX_CSR11, 0x150); |
1893 | } else { |
1894 | /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ |
1895 | ural_write(sc, RAL_TXRX_CSR11, 0x15f); |
1896 | } |
1897 | } |
1898 | |
1899 | Static void |
1900 | ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) |
1901 | { |
1902 | uint16_t tmp; |
1903 | |
1904 | tmp = bssid[0] | bssid[1] << 8; |
1905 | ural_write(sc, RAL_MAC_CSR5, tmp); |
1906 | |
1907 | tmp = bssid[2] | bssid[3] << 8; |
1908 | ural_write(sc, RAL_MAC_CSR6, tmp); |
1909 | |
1910 | tmp = bssid[4] | bssid[5] << 8; |
1911 | ural_write(sc, RAL_MAC_CSR7, tmp); |
1912 | |
1913 | DPRINTF(("setting BSSID to %s\n" , ether_sprintf(bssid))); |
1914 | } |
1915 | |
1916 | Static void |
1917 | ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) |
1918 | { |
1919 | uint16_t tmp; |
1920 | |
1921 | tmp = addr[0] | addr[1] << 8; |
1922 | ural_write(sc, RAL_MAC_CSR2, tmp); |
1923 | |
1924 | tmp = addr[2] | addr[3] << 8; |
1925 | ural_write(sc, RAL_MAC_CSR3, tmp); |
1926 | |
1927 | tmp = addr[4] | addr[5] << 8; |
1928 | ural_write(sc, RAL_MAC_CSR4, tmp); |
1929 | |
1930 | DPRINTF(("setting MAC address to %s\n" , ether_sprintf(addr))); |
1931 | } |
1932 | |
1933 | Static void |
1934 | ural_update_promisc(struct ural_softc *sc) |
1935 | { |
1936 | struct ifnet *ifp = sc->sc_ic.ic_ifp; |
1937 | uint32_t tmp; |
1938 | |
1939 | tmp = ural_read(sc, RAL_TXRX_CSR2); |
1940 | |
1941 | tmp &= ~RAL_DROP_NOT_TO_ME; |
1942 | if (!(ifp->if_flags & IFF_PROMISC)) |
1943 | tmp |= RAL_DROP_NOT_TO_ME; |
1944 | |
1945 | ural_write(sc, RAL_TXRX_CSR2, tmp); |
1946 | |
1947 | DPRINTF(("%s promiscuous mode\n" , (ifp->if_flags & IFF_PROMISC) ? |
1948 | "entering" : "leaving" )); |
1949 | } |
1950 | |
1951 | Static const char * |
1952 | ural_get_rf(int rev) |
1953 | { |
1954 | switch (rev) { |
1955 | case RAL_RF_2522: return "RT2522" ; |
1956 | case RAL_RF_2523: return "RT2523" ; |
1957 | case RAL_RF_2524: return "RT2524" ; |
1958 | case RAL_RF_2525: return "RT2525" ; |
1959 | case RAL_RF_2525E: return "RT2525e" ; |
1960 | case RAL_RF_2526: return "RT2526" ; |
1961 | case RAL_RF_5222: return "RT5222" ; |
1962 | default: return "unknown" ; |
1963 | } |
1964 | } |
1965 | |
1966 | Static void |
1967 | ural_read_eeprom(struct ural_softc *sc) |
1968 | { |
1969 | struct ieee80211com *ic = &sc->sc_ic; |
1970 | uint16_t val; |
1971 | |
1972 | ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); |
1973 | val = le16toh(val); |
1974 | sc->rf_rev = (val >> 11) & 0x7; |
1975 | sc->hw_radio = (val >> 10) & 0x1; |
1976 | sc->led_mode = (val >> 6) & 0x7; |
1977 | sc->rx_ant = (val >> 4) & 0x3; |
1978 | sc->tx_ant = (val >> 2) & 0x3; |
1979 | sc->nb_ant = val & 0x3; |
1980 | |
1981 | /* read MAC address */ |
1982 | ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); |
1983 | |
1984 | /* read default values for BBP registers */ |
1985 | ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); |
1986 | |
1987 | /* read Tx power for all b/g channels */ |
1988 | ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); |
1989 | } |
1990 | |
1991 | Static int |
1992 | ural_bbp_init(struct ural_softc *sc) |
1993 | { |
1994 | int i, ntries; |
1995 | |
1996 | /* wait for BBP to be ready */ |
1997 | for (ntries = 0; ntries < 100; ntries++) { |
1998 | if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) |
1999 | break; |
2000 | DELAY(1000); |
2001 | } |
2002 | if (ntries == 100) { |
2003 | printf("%s: timeout waiting for BBP\n" , device_xname(sc->sc_dev)); |
2004 | return EIO; |
2005 | } |
2006 | |
2007 | /* initialize BBP registers to default values */ |
2008 | for (i = 0; i < __arraycount(ural_def_bbp); i++) |
2009 | ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); |
2010 | |
2011 | #if 0 |
2012 | /* initialize BBP registers to values stored in EEPROM */ |
2013 | for (i = 0; i < 16; i++) { |
2014 | if (sc->bbp_prom[i].reg == 0xff) |
2015 | continue; |
2016 | ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); |
2017 | } |
2018 | #endif |
2019 | |
2020 | return 0; |
2021 | } |
2022 | |
2023 | Static void |
2024 | ural_set_txantenna(struct ural_softc *sc, int antenna) |
2025 | { |
2026 | uint16_t tmp; |
2027 | uint8_t tx; |
2028 | |
2029 | tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; |
2030 | if (antenna == 1) |
2031 | tx |= RAL_BBP_ANTA; |
2032 | else if (antenna == 2) |
2033 | tx |= RAL_BBP_ANTB; |
2034 | else |
2035 | tx |= RAL_BBP_DIVERSITY; |
2036 | |
2037 | /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ |
2038 | if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || |
2039 | sc->rf_rev == RAL_RF_5222) |
2040 | tx |= RAL_BBP_FLIPIQ; |
2041 | |
2042 | ural_bbp_write(sc, RAL_BBP_TX, tx); |
2043 | |
2044 | /* update values in PHY_CSR5 and PHY_CSR6 */ |
2045 | tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; |
2046 | ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); |
2047 | |
2048 | tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; |
2049 | ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); |
2050 | } |
2051 | |
2052 | Static void |
2053 | ural_set_rxantenna(struct ural_softc *sc, int antenna) |
2054 | { |
2055 | uint8_t rx; |
2056 | |
2057 | rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; |
2058 | if (antenna == 1) |
2059 | rx |= RAL_BBP_ANTA; |
2060 | else if (antenna == 2) |
2061 | rx |= RAL_BBP_ANTB; |
2062 | else |
2063 | rx |= RAL_BBP_DIVERSITY; |
2064 | |
2065 | /* need to force no I/Q flip for RF 2525e and 2526 */ |
2066 | if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) |
2067 | rx &= ~RAL_BBP_FLIPIQ; |
2068 | |
2069 | ural_bbp_write(sc, RAL_BBP_RX, rx); |
2070 | } |
2071 | |
2072 | Static int |
2073 | ural_init(struct ifnet *ifp) |
2074 | { |
2075 | struct ural_softc *sc = ifp->if_softc; |
2076 | struct ieee80211com *ic = &sc->sc_ic; |
2077 | struct ieee80211_key *wk; |
2078 | uint16_t tmp; |
2079 | usbd_status error; |
2080 | int i, ntries; |
2081 | |
2082 | ural_set_testmode(sc); |
2083 | ural_write(sc, 0x308, 0x00f0); /* XXX magic */ |
2084 | |
2085 | ural_stop(ifp, 0); |
2086 | |
2087 | /* initialize MAC registers to default values */ |
2088 | for (i = 0; i < __arraycount(ural_def_mac); i++) |
2089 | ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); |
2090 | |
2091 | /* wait for BBP and RF to wake up (this can take a long time!) */ |
2092 | for (ntries = 0; ntries < 100; ntries++) { |
2093 | tmp = ural_read(sc, RAL_MAC_CSR17); |
2094 | if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == |
2095 | (RAL_BBP_AWAKE | RAL_RF_AWAKE)) |
2096 | break; |
2097 | DELAY(1000); |
2098 | } |
2099 | if (ntries == 100) { |
2100 | printf("%s: timeout waiting for BBP/RF to wakeup\n" , |
2101 | device_xname(sc->sc_dev)); |
2102 | error = EIO; |
2103 | goto fail; |
2104 | } |
2105 | |
2106 | /* we're ready! */ |
2107 | ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); |
2108 | |
2109 | /* set basic rate set (will be updated later) */ |
2110 | ural_write(sc, RAL_TXRX_CSR11, 0x15f); |
2111 | |
2112 | error = ural_bbp_init(sc); |
2113 | if (error != 0) |
2114 | goto fail; |
2115 | |
2116 | /* set default BSS channel */ |
2117 | ural_set_chan(sc, ic->ic_curchan); |
2118 | |
2119 | /* clear statistic registers (STA_CSR0 to STA_CSR10) */ |
2120 | ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); |
2121 | |
2122 | ural_set_txantenna(sc, sc->tx_ant); |
2123 | ural_set_rxantenna(sc, sc->rx_ant); |
2124 | |
2125 | IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); |
2126 | ural_set_macaddr(sc, ic->ic_myaddr); |
2127 | |
2128 | /* |
2129 | * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). |
2130 | */ |
2131 | for (i = 0; i < IEEE80211_WEP_NKID; i++) { |
2132 | wk = &ic->ic_crypto.cs_nw_keys[i]; |
2133 | ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + |
2134 | RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); |
2135 | } |
2136 | |
2137 | /* |
2138 | * Allocate xfer for AMRR statistics requests. |
2139 | */ |
2140 | struct usbd_pipe *pipe0 = usbd_get_pipe0(sc->sc_udev); |
2141 | error = usbd_create_xfer(pipe0, sizeof(sc->sta), 0, 0, &sc->amrr_xfer); |
2142 | if (error) { |
2143 | printf("%s: could not allocate AMRR xfer\n" , |
2144 | device_xname(sc->sc_dev)); |
2145 | goto fail; |
2146 | } |
2147 | |
2148 | /* |
2149 | * Open Tx and Rx USB bulk pipes. |
2150 | */ |
2151 | error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, |
2152 | &sc->sc_tx_pipeh); |
2153 | if (error != 0) { |
2154 | printf("%s: could not open Tx pipe: %s\n" , |
2155 | device_xname(sc->sc_dev), usbd_errstr(error)); |
2156 | goto fail; |
2157 | } |
2158 | |
2159 | error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, |
2160 | &sc->sc_rx_pipeh); |
2161 | if (error != 0) { |
2162 | printf("%s: could not open Rx pipe: %s\n" , |
2163 | device_xname(sc->sc_dev), usbd_errstr(error)); |
2164 | goto fail; |
2165 | } |
2166 | |
2167 | /* |
2168 | * Allocate Tx and Rx xfer queues. |
2169 | */ |
2170 | error = ural_alloc_tx_list(sc); |
2171 | if (error != 0) { |
2172 | printf("%s: could not allocate Tx list\n" , |
2173 | device_xname(sc->sc_dev)); |
2174 | goto fail; |
2175 | } |
2176 | |
2177 | error = ural_alloc_rx_list(sc); |
2178 | if (error != 0) { |
2179 | printf("%s: could not allocate Rx list\n" , |
2180 | device_xname(sc->sc_dev)); |
2181 | goto fail; |
2182 | } |
2183 | |
2184 | /* |
2185 | * Start up the receive pipe. |
2186 | */ |
2187 | for (i = 0; i < RAL_RX_LIST_COUNT; i++) { |
2188 | struct ural_rx_data *data = &sc->rx_data[i]; |
2189 | |
2190 | usbd_setup_xfer(data->xfer, data, data->buf, MCLBYTES, |
2191 | USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); |
2192 | usbd_transfer(data->xfer); |
2193 | } |
2194 | |
2195 | /* kick Rx */ |
2196 | tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; |
2197 | if (ic->ic_opmode != IEEE80211_M_MONITOR) { |
2198 | tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; |
2199 | if (ic->ic_opmode != IEEE80211_M_HOSTAP) |
2200 | tmp |= RAL_DROP_TODS; |
2201 | if (!(ifp->if_flags & IFF_PROMISC)) |
2202 | tmp |= RAL_DROP_NOT_TO_ME; |
2203 | } |
2204 | ural_write(sc, RAL_TXRX_CSR2, tmp); |
2205 | |
2206 | ifp->if_flags &= ~IFF_OACTIVE; |
2207 | ifp->if_flags |= IFF_RUNNING; |
2208 | |
2209 | if (ic->ic_opmode != IEEE80211_M_MONITOR) { |
2210 | if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) |
2211 | ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); |
2212 | } else |
2213 | ieee80211_new_state(ic, IEEE80211_S_RUN, -1); |
2214 | |
2215 | return 0; |
2216 | |
2217 | fail: ural_stop(ifp, 1); |
2218 | return error; |
2219 | } |
2220 | |
2221 | Static void |
2222 | ural_stop(struct ifnet *ifp, int disable) |
2223 | { |
2224 | struct ural_softc *sc = ifp->if_softc; |
2225 | struct ieee80211com *ic = &sc->sc_ic; |
2226 | |
2227 | ieee80211_new_state(ic, IEEE80211_S_INIT, -1); |
2228 | |
2229 | sc->sc_tx_timer = 0; |
2230 | ifp->if_timer = 0; |
2231 | ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); |
2232 | |
2233 | /* disable Rx */ |
2234 | ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); |
2235 | |
2236 | /* reset ASIC and BBP (but won't reset MAC registers!) */ |
2237 | ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); |
2238 | ural_write(sc, RAL_MAC_CSR1, 0); |
2239 | |
2240 | if (sc->amrr_xfer != NULL) { |
2241 | usbd_destroy_xfer(sc->amrr_xfer); |
2242 | sc->amrr_xfer = NULL; |
2243 | } |
2244 | |
2245 | if (sc->sc_rx_pipeh != NULL) { |
2246 | usbd_abort_pipe(sc->sc_rx_pipeh); |
2247 | } |
2248 | |
2249 | if (sc->sc_tx_pipeh != NULL) { |
2250 | usbd_abort_pipe(sc->sc_tx_pipeh); |
2251 | } |
2252 | |
2253 | ural_free_rx_list(sc); |
2254 | ural_free_tx_list(sc); |
2255 | |
2256 | if (sc->sc_rx_pipeh != NULL) { |
2257 | usbd_close_pipe(sc->sc_rx_pipeh); |
2258 | sc->sc_rx_pipeh = NULL; |
2259 | } |
2260 | |
2261 | if (sc->sc_tx_pipeh != NULL) { |
2262 | usbd_close_pipe(sc->sc_tx_pipeh); |
2263 | sc->sc_tx_pipeh = NULL; |
2264 | } |
2265 | } |
2266 | |
2267 | int |
2268 | ural_activate(device_t self, enum devact act) |
2269 | { |
2270 | struct ural_softc *sc = device_private(self); |
2271 | |
2272 | switch (act) { |
2273 | case DVACT_DEACTIVATE: |
2274 | if_deactivate(&sc->sc_if); |
2275 | return 0; |
2276 | default: |
2277 | return EOPNOTSUPP; |
2278 | } |
2279 | } |
2280 | |
2281 | Static void |
2282 | ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) |
2283 | { |
2284 | int i; |
2285 | |
2286 | /* clear statistic registers (STA_CSR0 to STA_CSR10) */ |
2287 | ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); |
2288 | |
2289 | ieee80211_amrr_node_init(&sc->amrr, &sc->amn); |
2290 | |
2291 | /* set rate to some reasonable initial value */ |
2292 | for (i = ni->ni_rates.rs_nrates - 1; |
2293 | i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; |
2294 | i--); |
2295 | ni->ni_txrate = i; |
2296 | |
2297 | callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); |
2298 | } |
2299 | |
2300 | Static void |
2301 | ural_amrr_timeout(void *arg) |
2302 | { |
2303 | struct ural_softc *sc = (struct ural_softc *)arg; |
2304 | usb_device_request_t req; |
2305 | int s; |
2306 | |
2307 | s = splusb(); |
2308 | |
2309 | /* |
2310 | * Asynchronously read statistic registers (cleared by read). |
2311 | */ |
2312 | req.bmRequestType = UT_READ_VENDOR_DEVICE; |
2313 | req.bRequest = RAL_READ_MULTI_MAC; |
2314 | USETW(req.wValue, 0); |
2315 | USETW(req.wIndex, RAL_STA_CSR0); |
2316 | USETW(req.wLength, sizeof(sc->sta)); |
2317 | |
2318 | usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, |
2319 | USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof(sc->sta), 0, |
2320 | ural_amrr_update); |
2321 | (void)usbd_transfer(sc->amrr_xfer); |
2322 | |
2323 | splx(s); |
2324 | } |
2325 | |
2326 | Static void |
2327 | ural_amrr_update(struct usbd_xfer *xfer, void * priv, |
2328 | usbd_status status) |
2329 | { |
2330 | struct ural_softc *sc = (struct ural_softc *)priv; |
2331 | struct ifnet *ifp = sc->sc_ic.ic_ifp; |
2332 | |
2333 | if (status != USBD_NORMAL_COMPLETION) { |
2334 | printf("%s: could not retrieve Tx statistics - " |
2335 | "cancelling automatic rate control\n" , |
2336 | device_xname(sc->sc_dev)); |
2337 | return; |
2338 | } |
2339 | |
2340 | /* count TX retry-fail as Tx errors */ |
2341 | ifp->if_oerrors += sc->sta[9]; |
2342 | |
2343 | sc->amn.amn_retrycnt = |
2344 | sc->sta[7] + /* TX one-retry ok count */ |
2345 | sc->sta[8] + /* TX more-retry ok count */ |
2346 | sc->sta[9]; /* TX retry-fail count */ |
2347 | |
2348 | sc->amn.amn_txcnt = |
2349 | sc->amn.amn_retrycnt + |
2350 | sc->sta[6]; /* TX no-retry ok count */ |
2351 | |
2352 | ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); |
2353 | |
2354 | callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); |
2355 | } |
2356 | |