1 | /* $NetBSD: nouveau_subdev_bus_nv50.c,v 1.1.1.1 2014/08/06 12:36:29 riastradh Exp $ */ |
2 | |
3 | /* |
4 | * Copyright 2012 Nouveau Community |
5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), |
8 | * to deal in the Software without restriction, including without limitation |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
10 | * and/or sell copies of the Software, and to permit persons to whom the |
11 | * Software is furnished to do so, subject to the following conditions: |
12 | * |
13 | * The above copyright notice and this permission notice shall be included in |
14 | * all copies or substantial portions of the Software. |
15 | * |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
22 | * OTHER DEALINGS IN THE SOFTWARE. |
23 | * |
24 | * Authors: Martin Peres <martin.peres@labri.fr> |
25 | * Ben Skeggs |
26 | */ |
27 | |
28 | #include <sys/cdefs.h> |
29 | __KERNEL_RCSID(0, "$NetBSD: nouveau_subdev_bus_nv50.c,v 1.1.1.1 2014/08/06 12:36:29 riastradh Exp $" ); |
30 | |
31 | #include <subdev/timer.h> |
32 | |
33 | #include "nv04.h" |
34 | |
35 | static int |
36 | nv50_bus_hwsq_exec(struct nouveau_bus *pbus, u32 *data, u32 size) |
37 | { |
38 | struct nv50_bus_priv *priv = (void *)pbus; |
39 | int i; |
40 | |
41 | nv_mask(pbus, 0x001098, 0x00000008, 0x00000000); |
42 | nv_wr32(pbus, 0x001304, 0x00000000); |
43 | for (i = 0; i < size; i++) |
44 | nv_wr32(priv, 0x001400 + (i * 4), data[i]); |
45 | nv_mask(pbus, 0x001098, 0x00000018, 0x00000018); |
46 | nv_wr32(pbus, 0x00130c, 0x00000003); |
47 | |
48 | return nv_wait(pbus, 0x001308, 0x00000100, 0x00000000) ? 0 : -ETIMEDOUT; |
49 | } |
50 | |
51 | void |
52 | nv50_bus_intr(struct nouveau_subdev *subdev) |
53 | { |
54 | struct nouveau_bus *pbus = nouveau_bus(subdev); |
55 | u32 stat = nv_rd32(pbus, 0x001100) & nv_rd32(pbus, 0x001140); |
56 | |
57 | if (stat & 0x00000008) { |
58 | u32 addr = nv_rd32(pbus, 0x009084); |
59 | u32 data = nv_rd32(pbus, 0x009088); |
60 | |
61 | nv_error(pbus, "MMIO %s of 0x%08x FAULT at 0x%06x\n" , |
62 | (addr & 0x00000002) ? "write" : "read" , data, |
63 | (addr & 0x00fffffc)); |
64 | |
65 | stat &= ~0x00000008; |
66 | nv_wr32(pbus, 0x001100, 0x00000008); |
67 | } |
68 | |
69 | if (stat & 0x00010000) { |
70 | subdev = nouveau_subdev(pbus, NVDEV_SUBDEV_THERM); |
71 | if (subdev && subdev->intr) |
72 | subdev->intr(subdev); |
73 | stat &= ~0x00010000; |
74 | nv_wr32(pbus, 0x001100, 0x00010000); |
75 | } |
76 | |
77 | if (stat) { |
78 | nv_error(pbus, "unknown intr 0x%08x\n" , stat); |
79 | nv_mask(pbus, 0x001140, stat, 0); |
80 | } |
81 | } |
82 | |
83 | int |
84 | nv50_bus_init(struct nouveau_object *object) |
85 | { |
86 | struct nv04_bus_priv *priv = (void *)object; |
87 | int ret; |
88 | |
89 | ret = nouveau_bus_init(&priv->base); |
90 | if (ret) |
91 | return ret; |
92 | |
93 | nv_wr32(priv, 0x001100, 0xffffffff); |
94 | nv_wr32(priv, 0x001140, 0x00010008); |
95 | return 0; |
96 | } |
97 | |
98 | struct nouveau_oclass * |
99 | nv50_bus_oclass = &(struct nv04_bus_impl) { |
100 | .base.handle = NV_SUBDEV(BUS, 0x50), |
101 | .base.ofuncs = &(struct nouveau_ofuncs) { |
102 | .ctor = nv04_bus_ctor, |
103 | .dtor = _nouveau_bus_dtor, |
104 | .init = nv50_bus_init, |
105 | .fini = _nouveau_bus_fini, |
106 | }, |
107 | .intr = nv50_bus_intr, |
108 | .hwsq_exec = nv50_bus_hwsq_exec, |
109 | .hwsq_size = 64, |
110 | }.base; |
111 | |