1 | /* |
2 | * Copyright 2009 Jerome Glisse. |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), |
6 | * to deal in the Software without restriction, including without limitation |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * Software is furnished to do so, subject to the following conditions: |
10 | * |
11 | * The above copyright notice and this permission notice shall be included in |
12 | * all copies or substantial portions of the Software. |
13 | * |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
20 | * OTHER DEALINGS IN THE SOFTWARE. |
21 | * |
22 | * Authors: Jerome Glisse |
23 | */ |
24 | #include <drm/drmP.h> |
25 | #include <drm/radeon_drm.h> |
26 | #include "radeon_reg.h" |
27 | #include "radeon.h" |
28 | |
29 | #define RADEON_BENCHMARK_COPY_BLIT 1 |
30 | #define RADEON_BENCHMARK_COPY_DMA 0 |
31 | |
32 | #define RADEON_BENCHMARK_ITERATIONS 1024 |
33 | #define RADEON_BENCHMARK_COMMON_MODES_N 17 |
34 | |
35 | static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size, |
36 | uint64_t saddr, uint64_t daddr, |
37 | int flag, int n) |
38 | { |
39 | unsigned long start_jiffies; |
40 | unsigned long end_jiffies; |
41 | struct radeon_fence *fence = NULL; |
42 | int i, r; |
43 | |
44 | start_jiffies = jiffies; |
45 | for (i = 0; i < n; i++) { |
46 | switch (flag) { |
47 | case RADEON_BENCHMARK_COPY_DMA: |
48 | r = radeon_copy_dma(rdev, saddr, daddr, |
49 | size / RADEON_GPU_PAGE_SIZE, |
50 | &fence); |
51 | break; |
52 | case RADEON_BENCHMARK_COPY_BLIT: |
53 | r = radeon_copy_blit(rdev, saddr, daddr, |
54 | size / RADEON_GPU_PAGE_SIZE, |
55 | &fence); |
56 | break; |
57 | default: |
58 | DRM_ERROR("Unknown copy method\n" ); |
59 | r = -EINVAL; |
60 | } |
61 | if (r) |
62 | goto exit_do_move; |
63 | r = radeon_fence_wait(fence, false); |
64 | if (r) |
65 | goto exit_do_move; |
66 | radeon_fence_unref(&fence); |
67 | } |
68 | end_jiffies = jiffies; |
69 | r = jiffies_to_msecs(end_jiffies - start_jiffies); |
70 | |
71 | exit_do_move: |
72 | if (fence) |
73 | radeon_fence_unref(&fence); |
74 | return r; |
75 | } |
76 | |
77 | |
78 | static void radeon_benchmark_log_results(int n, unsigned size, |
79 | unsigned int time, |
80 | unsigned sdomain, unsigned ddomain, |
81 | const char *kind) |
82 | { |
83 | unsigned int throughput = (n * (size >> 10)) / time; |
84 | DRM_INFO("radeon: %s %u bo moves of %u kB from" |
85 | " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n" , |
86 | kind, n, size >> 10, sdomain, ddomain, time, |
87 | throughput * 8, throughput); |
88 | } |
89 | |
90 | static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size, |
91 | unsigned sdomain, unsigned ddomain) |
92 | { |
93 | struct radeon_bo *dobj = NULL; |
94 | struct radeon_bo *sobj = NULL; |
95 | uint64_t saddr, daddr; |
96 | int r, n; |
97 | int time; |
98 | |
99 | n = RADEON_BENCHMARK_ITERATIONS; |
100 | r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, NULL, &sobj); |
101 | if (r) { |
102 | goto out_cleanup; |
103 | } |
104 | r = radeon_bo_reserve(sobj, false); |
105 | if (unlikely(r != 0)) |
106 | goto out_cleanup; |
107 | r = radeon_bo_pin(sobj, sdomain, &saddr); |
108 | radeon_bo_unreserve(sobj); |
109 | if (r) { |
110 | goto out_cleanup; |
111 | } |
112 | r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, NULL, &dobj); |
113 | if (r) { |
114 | goto out_cleanup; |
115 | } |
116 | r = radeon_bo_reserve(dobj, false); |
117 | if (unlikely(r != 0)) |
118 | goto out_cleanup; |
119 | r = radeon_bo_pin(dobj, ddomain, &daddr); |
120 | radeon_bo_unreserve(dobj); |
121 | if (r) { |
122 | goto out_cleanup; |
123 | } |
124 | |
125 | if (rdev->asic->copy.dma) { |
126 | time = radeon_benchmark_do_move(rdev, size, saddr, daddr, |
127 | RADEON_BENCHMARK_COPY_DMA, n); |
128 | if (time < 0) |
129 | goto out_cleanup; |
130 | if (time > 0) |
131 | radeon_benchmark_log_results(n, size, time, |
132 | sdomain, ddomain, "dma" ); |
133 | } |
134 | |
135 | if (rdev->asic->copy.blit) { |
136 | time = radeon_benchmark_do_move(rdev, size, saddr, daddr, |
137 | RADEON_BENCHMARK_COPY_BLIT, n); |
138 | if (time < 0) |
139 | goto out_cleanup; |
140 | if (time > 0) |
141 | radeon_benchmark_log_results(n, size, time, |
142 | sdomain, ddomain, "blit" ); |
143 | } |
144 | |
145 | out_cleanup: |
146 | if (sobj) { |
147 | r = radeon_bo_reserve(sobj, false); |
148 | if (likely(r == 0)) { |
149 | radeon_bo_unpin(sobj); |
150 | radeon_bo_unreserve(sobj); |
151 | } |
152 | radeon_bo_unref(&sobj); |
153 | } |
154 | if (dobj) { |
155 | r = radeon_bo_reserve(dobj, false); |
156 | if (likely(r == 0)) { |
157 | radeon_bo_unpin(dobj); |
158 | radeon_bo_unreserve(dobj); |
159 | } |
160 | radeon_bo_unref(&dobj); |
161 | } |
162 | |
163 | if (r) { |
164 | DRM_ERROR("Error while benchmarking BO move.\n" ); |
165 | } |
166 | } |
167 | |
168 | void radeon_benchmark(struct radeon_device *rdev, int test_number) |
169 | { |
170 | int i; |
171 | int common_modes[RADEON_BENCHMARK_COMMON_MODES_N] = { |
172 | 640 * 480 * 4, |
173 | 720 * 480 * 4, |
174 | 800 * 600 * 4, |
175 | 848 * 480 * 4, |
176 | 1024 * 768 * 4, |
177 | 1152 * 768 * 4, |
178 | 1280 * 720 * 4, |
179 | 1280 * 800 * 4, |
180 | 1280 * 854 * 4, |
181 | 1280 * 960 * 4, |
182 | 1280 * 1024 * 4, |
183 | 1440 * 900 * 4, |
184 | 1400 * 1050 * 4, |
185 | 1680 * 1050 * 4, |
186 | 1600 * 1200 * 4, |
187 | 1920 * 1080 * 4, |
188 | 1920 * 1200 * 4 |
189 | }; |
190 | |
191 | switch (test_number) { |
192 | case 1: |
193 | /* simple test, VRAM to GTT and GTT to VRAM */ |
194 | radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_GTT, |
195 | RADEON_GEM_DOMAIN_VRAM); |
196 | radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM, |
197 | RADEON_GEM_DOMAIN_GTT); |
198 | break; |
199 | case 2: |
200 | /* simple test, VRAM to VRAM */ |
201 | radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM, |
202 | RADEON_GEM_DOMAIN_VRAM); |
203 | break; |
204 | case 3: |
205 | /* GTT to VRAM, buffer size sweep, powers of 2 */ |
206 | for (i = 1; i <= 16384; i <<= 1) |
207 | radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE, |
208 | RADEON_GEM_DOMAIN_GTT, |
209 | RADEON_GEM_DOMAIN_VRAM); |
210 | break; |
211 | case 4: |
212 | /* VRAM to GTT, buffer size sweep, powers of 2 */ |
213 | for (i = 1; i <= 16384; i <<= 1) |
214 | radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE, |
215 | RADEON_GEM_DOMAIN_VRAM, |
216 | RADEON_GEM_DOMAIN_GTT); |
217 | break; |
218 | case 5: |
219 | /* VRAM to VRAM, buffer size sweep, powers of 2 */ |
220 | for (i = 1; i <= 16384; i <<= 1) |
221 | radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE, |
222 | RADEON_GEM_DOMAIN_VRAM, |
223 | RADEON_GEM_DOMAIN_VRAM); |
224 | break; |
225 | case 6: |
226 | /* GTT to VRAM, buffer size sweep, common modes */ |
227 | for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) |
228 | radeon_benchmark_move(rdev, common_modes[i], |
229 | RADEON_GEM_DOMAIN_GTT, |
230 | RADEON_GEM_DOMAIN_VRAM); |
231 | break; |
232 | case 7: |
233 | /* VRAM to GTT, buffer size sweep, common modes */ |
234 | for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) |
235 | radeon_benchmark_move(rdev, common_modes[i], |
236 | RADEON_GEM_DOMAIN_VRAM, |
237 | RADEON_GEM_DOMAIN_GTT); |
238 | break; |
239 | case 8: |
240 | /* VRAM to VRAM, buffer size sweep, common modes */ |
241 | for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++) |
242 | radeon_benchmark_move(rdev, common_modes[i], |
243 | RADEON_GEM_DOMAIN_VRAM, |
244 | RADEON_GEM_DOMAIN_VRAM); |
245 | break; |
246 | |
247 | default: |
248 | DRM_ERROR("Unknown benchmark\n" ); |
249 | } |
250 | } |
251 | |