1 | /** |
2 | * \file radeon_drv.c |
3 | * ATI Radeon driver |
4 | * |
5 | * \author Gareth Hughes <gareth@valinux.com> |
6 | */ |
7 | |
8 | /* |
9 | * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. |
10 | * All Rights Reserved. |
11 | * |
12 | * Permission is hereby granted, free of charge, to any person obtaining a |
13 | * copy of this software and associated documentation files (the "Software"), |
14 | * to deal in the Software without restriction, including without limitation |
15 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
16 | * and/or sell copies of the Software, and to permit persons to whom the |
17 | * Software is furnished to do so, subject to the following conditions: |
18 | * |
19 | * The above copyright notice and this permission notice (including the next |
20 | * paragraph) shall be included in all copies or substantial portions of the |
21 | * Software. |
22 | * |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
24 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
25 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
26 | * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR |
27 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
28 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
29 | * OTHER DEALINGS IN THE SOFTWARE. |
30 | */ |
31 | |
32 | #include <drm/drmP.h> |
33 | #include <drm/radeon_drm.h> |
34 | #include "radeon_drv.h" |
35 | |
36 | #include <drm/drm_pciids.h> |
37 | #include <linux/console.h> |
38 | #include <linux/module.h> |
39 | #include <linux/moduleparam.h> |
40 | #include <linux/pm_runtime.h> |
41 | #include <linux/vga_switcheroo.h> |
42 | #include "drm_crtc_helper.h" |
43 | /* |
44 | * KMS wrapper. |
45 | * - 2.0.0 - initial interface |
46 | * - 2.1.0 - add square tiling interface |
47 | * - 2.2.0 - add r6xx/r7xx const buffer support |
48 | * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs |
49 | * - 2.4.0 - add crtc id query |
50 | * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen |
51 | * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) |
52 | * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs |
53 | * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query |
54 | * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query |
55 | * 2.10.0 - fusion 2D tiling |
56 | * 2.11.0 - backend map, initial compute support for the CS checker |
57 | * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS |
58 | * 2.13.0 - virtual memory support, streamout |
59 | * 2.14.0 - add evergreen tiling informations |
60 | * 2.15.0 - add max_pipes query |
61 | * 2.16.0 - fix evergreen 2D tiled surface calculation |
62 | * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx |
63 | * 2.18.0 - r600-eg: allow "invalid" DB formats |
64 | * 2.19.0 - r600-eg: MSAA textures |
65 | * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query |
66 | * 2.21.0 - r600-r700: FMASK and CMASK |
67 | * 2.22.0 - r600 only: RESOLVE_BOX allowed |
68 | * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880 |
69 | * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures |
70 | * 2.25.0 - eg+: new info request for num SE and num SH |
71 | * 2.26.0 - r600-eg: fix htile size computation |
72 | * 2.27.0 - r600-SI: Add CS ioctl support for async DMA |
73 | * 2.28.0 - r600-eg: Add MEM_WRITE packet support |
74 | * 2.29.0 - R500 FP16 color clear registers |
75 | * 2.30.0 - fix for FMASK texturing |
76 | * 2.31.0 - Add fastfb support for rs690 |
77 | * 2.32.0 - new info request for rings working |
78 | * 2.33.0 - Add SI tiling mode array query |
79 | * 2.34.0 - Add CIK tiling mode array query |
80 | * 2.35.0 - Add CIK macrotile mode array query |
81 | * 2.36.0 - Fix CIK DCE tiling setup |
82 | * 2.37.0 - allow GS ring setup on r6xx/r7xx |
83 | * 2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN), |
84 | * CIK: 1D and linear tiling modes contain valid PIPE_CONFIG |
85 | */ |
86 | #define KMS_DRIVER_MAJOR 2 |
87 | #define KMS_DRIVER_MINOR 38 |
88 | #define KMS_DRIVER_PATCHLEVEL 0 |
89 | int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); |
90 | int radeon_driver_unload_kms(struct drm_device *dev); |
91 | void radeon_driver_lastclose_kms(struct drm_device *dev); |
92 | int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); |
93 | void radeon_driver_postclose_kms(struct drm_device *dev, |
94 | struct drm_file *file_priv); |
95 | void radeon_driver_preclose_kms(struct drm_device *dev, |
96 | struct drm_file *file_priv); |
97 | int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon); |
98 | int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon); |
99 | u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc); |
100 | int radeon_enable_vblank_kms(struct drm_device *dev, int crtc); |
101 | void radeon_disable_vblank_kms(struct drm_device *dev, int crtc); |
102 | int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc, |
103 | int *max_error, |
104 | struct timeval *vblank_time, |
105 | unsigned flags); |
106 | void radeon_driver_irq_preinstall_kms(struct drm_device *dev); |
107 | int radeon_driver_irq_postinstall_kms(struct drm_device *dev); |
108 | void radeon_driver_irq_uninstall_kms(struct drm_device *dev); |
109 | irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS); |
110 | void radeon_gem_object_free(struct drm_gem_object *obj); |
111 | int radeon_gem_object_open(struct drm_gem_object *obj, |
112 | struct drm_file *file_priv); |
113 | void radeon_gem_object_close(struct drm_gem_object *obj, |
114 | struct drm_file *file_priv); |
115 | extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc, |
116 | unsigned int flags, |
117 | int *vpos, int *hpos, ktime_t *stime, |
118 | ktime_t *etime); |
119 | extern bool radeon_is_px(struct drm_device *dev); |
120 | extern const struct drm_ioctl_desc radeon_ioctls_kms[]; |
121 | extern int radeon_max_kms_ioctl; |
122 | #ifdef __NetBSD__ |
123 | int radeon_mmap_object(struct drm_device *, off_t, size_t, vm_prot_t, |
124 | struct uvm_object **, voff_t *, struct file *); |
125 | #else |
126 | int radeon_mmap(struct file *filp, struct vm_area_struct *vma); |
127 | #endif |
128 | int radeon_mode_dumb_mmap(struct drm_file *filp, |
129 | struct drm_device *dev, |
130 | uint32_t handle, uint64_t *offset_p); |
131 | int radeon_mode_dumb_create(struct drm_file *file_priv, |
132 | struct drm_device *dev, |
133 | struct drm_mode_create_dumb *args); |
134 | struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj); |
135 | struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev, |
136 | size_t size, |
137 | struct sg_table *sg); |
138 | int radeon_gem_prime_pin(struct drm_gem_object *obj); |
139 | void radeon_gem_prime_unpin(struct drm_gem_object *obj); |
140 | void *radeon_gem_prime_vmap(struct drm_gem_object *obj); |
141 | void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); |
142 | extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, |
143 | unsigned long arg); |
144 | |
145 | #if defined(CONFIG_DEBUG_FS) |
146 | int radeon_debugfs_init(struct drm_minor *minor); |
147 | void radeon_debugfs_cleanup(struct drm_minor *minor); |
148 | #endif |
149 | |
150 | /* atpx handler */ |
151 | #if defined(CONFIG_VGA_SWITCHEROO) |
152 | void radeon_register_atpx_handler(void); |
153 | void radeon_unregister_atpx_handler(void); |
154 | #else |
155 | #ifndef __NetBSD__ |
156 | static inline void radeon_register_atpx_handler(void) {} |
157 | static inline void radeon_unregister_atpx_handler(void) {} |
158 | #endif |
159 | #endif |
160 | |
161 | int radeon_no_wb; |
162 | int radeon_modeset = -1; |
163 | int radeon_dynclks = -1; |
164 | int radeon_r4xx_atom = 0; |
165 | int radeon_agpmode = 0; |
166 | int radeon_vram_limit = 0; |
167 | int radeon_gart_size = -1; /* auto */ |
168 | int radeon_benchmarking = 0; |
169 | int radeon_testing = 0; |
170 | int radeon_connector_table = 0; |
171 | int radeon_tv = 1; |
172 | int radeon_audio = -1; |
173 | int radeon_disp_priority = 0; |
174 | int radeon_hw_i2c = 0; |
175 | int radeon_pcie_gen2 = -1; |
176 | int radeon_msi = -1; |
177 | int radeon_lockup_timeout = 10000; |
178 | int radeon_fastfb = 0; |
179 | int radeon_dpm = -1; |
180 | int radeon_aspm = -1; |
181 | int radeon_runtime_pm = -1; |
182 | int radeon_hard_reset = 0; |
183 | |
184 | MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers" ); |
185 | module_param_named(no_wb, radeon_no_wb, int, 0444); |
186 | |
187 | MODULE_PARM_DESC(modeset, "Disable/Enable modesetting" ); |
188 | module_param_named(modeset, radeon_modeset, int, 0400); |
189 | |
190 | MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks" ); |
191 | module_param_named(dynclks, radeon_dynclks, int, 0444); |
192 | |
193 | MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx" ); |
194 | module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); |
195 | |
196 | MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes" ); |
197 | module_param_named(vramlimit, radeon_vram_limit, int, 0600); |
198 | |
199 | MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)" ); |
200 | module_param_named(agpmode, radeon_agpmode, int, 0444); |
201 | |
202 | MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)" ); |
203 | module_param_named(gartsize, radeon_gart_size, int, 0600); |
204 | |
205 | MODULE_PARM_DESC(benchmark, "Run benchmark" ); |
206 | module_param_named(benchmark, radeon_benchmarking, int, 0444); |
207 | |
208 | MODULE_PARM_DESC(test, "Run tests" ); |
209 | module_param_named(test, radeon_testing, int, 0444); |
210 | |
211 | MODULE_PARM_DESC(connector_table, "Force connector table" ); |
212 | module_param_named(connector_table, radeon_connector_table, int, 0444); |
213 | |
214 | MODULE_PARM_DESC(tv, "TV enable (0 = disable)" ); |
215 | module_param_named(tv, radeon_tv, int, 0444); |
216 | |
217 | MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)" ); |
218 | module_param_named(audio, radeon_audio, int, 0444); |
219 | |
220 | MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)" ); |
221 | module_param_named(disp_priority, radeon_disp_priority, int, 0444); |
222 | |
223 | MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)" ); |
224 | module_param_named(hw_i2c, radeon_hw_i2c, int, 0444); |
225 | |
226 | MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)" ); |
227 | module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444); |
228 | |
229 | MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)" ); |
230 | module_param_named(msi, radeon_msi, int, 0444); |
231 | |
232 | MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)" ); |
233 | module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444); |
234 | |
235 | MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)" ); |
236 | module_param_named(fastfb, radeon_fastfb, int, 0444); |
237 | |
238 | MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)" ); |
239 | module_param_named(dpm, radeon_dpm, int, 0444); |
240 | |
241 | MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)" ); |
242 | module_param_named(aspm, radeon_aspm, int, 0444); |
243 | |
244 | MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)" ); |
245 | module_param_named(runpm, radeon_runtime_pm, int, 0444); |
246 | |
247 | MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))" ); |
248 | module_param_named(hard_reset, radeon_hard_reset, int, 0444); |
249 | |
250 | static struct pci_device_id pciidlist[] = { |
251 | radeon_PCI_IDS |
252 | }; |
253 | |
254 | MODULE_DEVICE_TABLE(pci, pciidlist); |
255 | |
256 | #ifdef CONFIG_DRM_RADEON_UMS |
257 | |
258 | static int radeon_suspend(struct drm_device *dev, pm_message_t state) |
259 | { |
260 | drm_radeon_private_t *dev_priv = dev->dev_private; |
261 | |
262 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) |
263 | return 0; |
264 | |
265 | /* Disable *all* interrupts */ |
266 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) |
267 | RADEON_WRITE(R500_DxMODE_INT_MASK, 0); |
268 | RADEON_WRITE(RADEON_GEN_INT_CNTL, 0); |
269 | return 0; |
270 | } |
271 | |
272 | static int radeon_resume(struct drm_device *dev) |
273 | { |
274 | drm_radeon_private_t *dev_priv = dev->dev_private; |
275 | |
276 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) |
277 | return 0; |
278 | |
279 | /* Restore interrupt registers */ |
280 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) |
281 | RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); |
282 | RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); |
283 | return 0; |
284 | } |
285 | |
286 | |
287 | static const struct file_operations radeon_driver_old_fops = { |
288 | .owner = THIS_MODULE, |
289 | .open = drm_open, |
290 | .release = drm_release, |
291 | .unlocked_ioctl = drm_ioctl, |
292 | .mmap = drm_mmap, |
293 | .poll = drm_poll, |
294 | .read = drm_read, |
295 | #ifdef CONFIG_COMPAT |
296 | .compat_ioctl = radeon_compat_ioctl, |
297 | #endif |
298 | .llseek = noop_llseek, |
299 | }; |
300 | |
301 | static struct drm_driver driver_old = { |
302 | .driver_features = |
303 | DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG | |
304 | DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED, |
305 | .dev_priv_size = sizeof(drm_radeon_buf_priv_t), |
306 | .load = radeon_driver_load, |
307 | .firstopen = radeon_driver_firstopen, |
308 | .open = radeon_driver_open, |
309 | .preclose = radeon_driver_preclose, |
310 | .postclose = radeon_driver_postclose, |
311 | .lastclose = radeon_driver_lastclose, |
312 | .unload = radeon_driver_unload, |
313 | .suspend = radeon_suspend, |
314 | .resume = radeon_resume, |
315 | .get_vblank_counter = radeon_get_vblank_counter, |
316 | .enable_vblank = radeon_enable_vblank, |
317 | .disable_vblank = radeon_disable_vblank, |
318 | .master_create = radeon_master_create, |
319 | .master_destroy = radeon_master_destroy, |
320 | .irq_preinstall = radeon_driver_irq_preinstall, |
321 | .irq_postinstall = radeon_driver_irq_postinstall, |
322 | .irq_uninstall = radeon_driver_irq_uninstall, |
323 | .irq_handler = radeon_driver_irq_handler, |
324 | .ioctls = radeon_ioctls, |
325 | .dma_ioctl = radeon_cp_buffers, |
326 | .fops = &radeon_driver_old_fops, |
327 | .name = DRIVER_NAME, |
328 | .desc = DRIVER_DESC, |
329 | .date = DRIVER_DATE, |
330 | .major = DRIVER_MAJOR, |
331 | .minor = DRIVER_MINOR, |
332 | .patchlevel = DRIVER_PATCHLEVEL, |
333 | }; |
334 | |
335 | #endif |
336 | |
337 | static struct drm_driver kms_driver; |
338 | |
339 | #ifdef __NetBSD__ |
340 | |
341 | struct drm_driver *const radeon_drm_driver = &kms_driver; |
342 | const struct pci_device_id *const radeon_device_ids = pciidlist; |
343 | const size_t radeon_n_device_ids = __arraycount(pciidlist); |
344 | |
345 | /* XXX Kludge for the non-GEM GEM that radeon uses. */ |
346 | static const struct uvm_pagerops radeon_gem_uvm_ops; |
347 | |
348 | #else |
349 | |
350 | static int radeon_kick_out_firmware_fb(struct pci_dev *pdev) |
351 | { |
352 | struct apertures_struct *ap; |
353 | bool primary = false; |
354 | |
355 | ap = alloc_apertures(1); |
356 | if (!ap) |
357 | return -ENOMEM; |
358 | |
359 | ap->ranges[0].base = pci_resource_start(pdev, 0); |
360 | ap->ranges[0].size = pci_resource_len(pdev, 0); |
361 | |
362 | #ifdef CONFIG_X86 |
363 | primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; |
364 | #endif |
365 | remove_conflicting_framebuffers(ap, "radeondrmfb" , primary); |
366 | kfree(ap); |
367 | |
368 | return 0; |
369 | } |
370 | |
371 | static int radeon_pci_probe(struct pci_dev *pdev, |
372 | const struct pci_device_id *ent) |
373 | { |
374 | int ret; |
375 | |
376 | /* Get rid of things like offb */ |
377 | ret = radeon_kick_out_firmware_fb(pdev); |
378 | if (ret) |
379 | return ret; |
380 | |
381 | return drm_get_pci_dev(pdev, ent, &kms_driver); |
382 | } |
383 | |
384 | static void |
385 | radeon_pci_remove(struct pci_dev *pdev) |
386 | { |
387 | struct drm_device *dev = pci_get_drvdata(pdev); |
388 | |
389 | drm_put_dev(dev); |
390 | } |
391 | |
392 | static int radeon_pmops_suspend(struct device *dev) |
393 | { |
394 | struct pci_dev *pdev = to_pci_dev(dev); |
395 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
396 | return radeon_suspend_kms(drm_dev, true, true); |
397 | } |
398 | |
399 | static int radeon_pmops_resume(struct device *dev) |
400 | { |
401 | struct pci_dev *pdev = to_pci_dev(dev); |
402 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
403 | return radeon_resume_kms(drm_dev, true, true); |
404 | } |
405 | |
406 | static int radeon_pmops_freeze(struct device *dev) |
407 | { |
408 | struct pci_dev *pdev = to_pci_dev(dev); |
409 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
410 | return radeon_suspend_kms(drm_dev, false, true); |
411 | } |
412 | |
413 | static int radeon_pmops_thaw(struct device *dev) |
414 | { |
415 | struct pci_dev *pdev = to_pci_dev(dev); |
416 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
417 | return radeon_resume_kms(drm_dev, false, true); |
418 | } |
419 | |
420 | static int radeon_pmops_runtime_suspend(struct device *dev) |
421 | { |
422 | struct pci_dev *pdev = to_pci_dev(dev); |
423 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
424 | int ret; |
425 | |
426 | if (!radeon_is_px(drm_dev)) { |
427 | pm_runtime_forbid(dev); |
428 | return -EBUSY; |
429 | } |
430 | |
431 | drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; |
432 | drm_kms_helper_poll_disable(drm_dev); |
433 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); |
434 | |
435 | ret = radeon_suspend_kms(drm_dev, false, false); |
436 | pci_save_state(pdev); |
437 | pci_disable_device(pdev); |
438 | pci_set_power_state(pdev, PCI_D3cold); |
439 | drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; |
440 | |
441 | return 0; |
442 | } |
443 | |
444 | static int radeon_pmops_runtime_resume(struct device *dev) |
445 | { |
446 | struct pci_dev *pdev = to_pci_dev(dev); |
447 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
448 | int ret; |
449 | |
450 | if (!radeon_is_px(drm_dev)) |
451 | return -EINVAL; |
452 | |
453 | drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; |
454 | |
455 | pci_set_power_state(pdev, PCI_D0); |
456 | pci_restore_state(pdev); |
457 | ret = pci_enable_device(pdev); |
458 | if (ret) |
459 | return ret; |
460 | pci_set_master(pdev); |
461 | |
462 | ret = radeon_resume_kms(drm_dev, false, false); |
463 | drm_kms_helper_poll_enable(drm_dev); |
464 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); |
465 | drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; |
466 | return 0; |
467 | } |
468 | |
469 | static int radeon_pmops_runtime_idle(struct device *dev) |
470 | { |
471 | struct pci_dev *pdev = to_pci_dev(dev); |
472 | struct drm_device *drm_dev = pci_get_drvdata(pdev); |
473 | struct drm_crtc *crtc; |
474 | |
475 | if (!radeon_is_px(drm_dev)) { |
476 | pm_runtime_forbid(dev); |
477 | return -EBUSY; |
478 | } |
479 | |
480 | list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) { |
481 | if (crtc->enabled) { |
482 | DRM_DEBUG_DRIVER("failing to power off - crtc active\n" ); |
483 | return -EBUSY; |
484 | } |
485 | } |
486 | |
487 | pm_runtime_mark_last_busy(dev); |
488 | pm_runtime_autosuspend(dev); |
489 | /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ |
490 | return 1; |
491 | } |
492 | |
493 | long radeon_drm_ioctl(struct file *filp, |
494 | unsigned int cmd, unsigned long arg) |
495 | { |
496 | struct drm_file *file_priv = filp->private_data; |
497 | struct drm_device *dev; |
498 | long ret; |
499 | dev = file_priv->minor->dev; |
500 | ret = pm_runtime_get_sync(dev->dev); |
501 | if (ret < 0) |
502 | return ret; |
503 | |
504 | ret = drm_ioctl(filp, cmd, arg); |
505 | |
506 | pm_runtime_mark_last_busy(dev->dev); |
507 | pm_runtime_put_autosuspend(dev->dev); |
508 | return ret; |
509 | } |
510 | |
511 | static const struct dev_pm_ops radeon_pm_ops = { |
512 | .suspend = radeon_pmops_suspend, |
513 | .resume = radeon_pmops_resume, |
514 | .freeze = radeon_pmops_freeze, |
515 | .thaw = radeon_pmops_thaw, |
516 | .poweroff = radeon_pmops_freeze, |
517 | .restore = radeon_pmops_resume, |
518 | .runtime_suspend = radeon_pmops_runtime_suspend, |
519 | .runtime_resume = radeon_pmops_runtime_resume, |
520 | .runtime_idle = radeon_pmops_runtime_idle, |
521 | }; |
522 | |
523 | static const struct file_operations radeon_driver_kms_fops = { |
524 | .owner = THIS_MODULE, |
525 | .open = drm_open, |
526 | .release = drm_release, |
527 | .unlocked_ioctl = radeon_drm_ioctl, |
528 | .mmap = radeon_mmap, |
529 | .poll = drm_poll, |
530 | .read = drm_read, |
531 | #ifdef CONFIG_COMPAT |
532 | .compat_ioctl = radeon_kms_compat_ioctl, |
533 | #endif |
534 | }; |
535 | #endif /* __NetBSD__ */ |
536 | |
537 | static struct drm_driver kms_driver = { |
538 | .driver_features = |
539 | DRIVER_USE_AGP | |
540 | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | |
541 | DRIVER_PRIME | DRIVER_RENDER, |
542 | .dev_priv_size = 0, |
543 | .load = radeon_driver_load_kms, |
544 | .open = radeon_driver_open_kms, |
545 | .preclose = radeon_driver_preclose_kms, |
546 | .postclose = radeon_driver_postclose_kms, |
547 | .lastclose = radeon_driver_lastclose_kms, |
548 | .unload = radeon_driver_unload_kms, |
549 | .get_vblank_counter = radeon_get_vblank_counter_kms, |
550 | .enable_vblank = radeon_enable_vblank_kms, |
551 | .disable_vblank = radeon_disable_vblank_kms, |
552 | .get_vblank_timestamp = radeon_get_vblank_timestamp_kms, |
553 | .get_scanout_position = radeon_get_crtc_scanoutpos, |
554 | #if defined(CONFIG_DEBUG_FS) |
555 | .debugfs_init = radeon_debugfs_init, |
556 | .debugfs_cleanup = radeon_debugfs_cleanup, |
557 | #endif |
558 | .irq_preinstall = radeon_driver_irq_preinstall_kms, |
559 | .irq_postinstall = radeon_driver_irq_postinstall_kms, |
560 | .irq_uninstall = radeon_driver_irq_uninstall_kms, |
561 | .irq_handler = radeon_driver_irq_handler_kms, |
562 | .ioctls = radeon_ioctls_kms, |
563 | .gem_free_object = radeon_gem_object_free, |
564 | .gem_open_object = radeon_gem_object_open, |
565 | .gem_close_object = radeon_gem_object_close, |
566 | .dumb_create = radeon_mode_dumb_create, |
567 | .dumb_map_offset = radeon_mode_dumb_mmap, |
568 | .dumb_destroy = drm_gem_dumb_destroy, |
569 | #ifdef __NetBSD__ |
570 | .fops = NULL, |
571 | .mmap_object = &radeon_mmap_object, |
572 | .gem_uvm_ops = &radeon_gem_uvm_ops, |
573 | #else |
574 | .fops = &radeon_driver_kms_fops, |
575 | #endif |
576 | |
577 | #ifndef __NetBSD__ /* XXX drm prime */ |
578 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, |
579 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, |
580 | .gem_prime_export = drm_gem_prime_export, |
581 | .gem_prime_import = drm_gem_prime_import, |
582 | .gem_prime_pin = radeon_gem_prime_pin, |
583 | .gem_prime_unpin = radeon_gem_prime_unpin, |
584 | .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table, |
585 | .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table, |
586 | .gem_prime_vmap = radeon_gem_prime_vmap, |
587 | .gem_prime_vunmap = radeon_gem_prime_vunmap, |
588 | #endif |
589 | |
590 | .name = DRIVER_NAME, |
591 | .desc = DRIVER_DESC, |
592 | .date = DRIVER_DATE, |
593 | .major = KMS_DRIVER_MAJOR, |
594 | .minor = KMS_DRIVER_MINOR, |
595 | .patchlevel = KMS_DRIVER_PATCHLEVEL, |
596 | }; |
597 | |
598 | #ifndef __NetBSD__ |
599 | |
600 | static struct drm_driver *driver; |
601 | static struct pci_driver *pdriver; |
602 | |
603 | #ifdef CONFIG_DRM_RADEON_UMS |
604 | static struct pci_driver radeon_pci_driver = { |
605 | .name = DRIVER_NAME, |
606 | .id_table = pciidlist, |
607 | }; |
608 | #endif |
609 | |
610 | static struct pci_driver radeon_kms_pci_driver = { |
611 | .name = DRIVER_NAME, |
612 | .id_table = pciidlist, |
613 | .probe = radeon_pci_probe, |
614 | .remove = radeon_pci_remove, |
615 | .driver.pm = &radeon_pm_ops, |
616 | }; |
617 | |
618 | static int __init radeon_init(void) |
619 | { |
620 | #ifdef CONFIG_VGA_CONSOLE |
621 | if (vgacon_text_force() && radeon_modeset == -1) { |
622 | DRM_INFO("VGACON disable radeon kernel modesetting.\n" ); |
623 | radeon_modeset = 0; |
624 | } |
625 | #endif |
626 | /* set to modesetting by default if not nomodeset */ |
627 | if (radeon_modeset == -1) |
628 | radeon_modeset = 1; |
629 | |
630 | if (radeon_modeset == 1) { |
631 | DRM_INFO("radeon kernel modesetting enabled.\n" ); |
632 | driver = &kms_driver; |
633 | pdriver = &radeon_kms_pci_driver; |
634 | driver->driver_features |= DRIVER_MODESET; |
635 | driver->num_ioctls = radeon_max_kms_ioctl; |
636 | radeon_register_atpx_handler(); |
637 | |
638 | } else { |
639 | #ifdef CONFIG_DRM_RADEON_UMS |
640 | DRM_INFO("radeon userspace modesetting enabled.\n" ); |
641 | driver = &driver_old; |
642 | pdriver = &radeon_pci_driver; |
643 | driver->driver_features &= ~DRIVER_MODESET; |
644 | driver->num_ioctls = radeon_max_ioctl; |
645 | #else |
646 | DRM_ERROR("No UMS support in radeon module!\n" ); |
647 | return -EINVAL; |
648 | #endif |
649 | } |
650 | |
651 | /* let modprobe override vga console setting */ |
652 | return drm_pci_init(driver, pdriver); |
653 | } |
654 | |
655 | static void __exit radeon_exit(void) |
656 | { |
657 | drm_pci_exit(driver, pdriver); |
658 | radeon_unregister_atpx_handler(); |
659 | } |
660 | |
661 | #endif |
662 | |
663 | module_init(radeon_init); |
664 | module_exit(radeon_exit); |
665 | |
666 | MODULE_AUTHOR(DRIVER_AUTHOR); |
667 | MODULE_DESCRIPTION(DRIVER_DESC); |
668 | MODULE_LICENSE("GPL and additional rights" ); |
669 | |