1/* $NetBSD: pci_usrreq.c,v 1.30 2016/09/24 23:12:54 mrg Exp $ */
2
3/*
4 * Copyright 2001 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38/*
39 * User -> kernel interface for PCI bus access.
40 */
41
42#include <sys/cdefs.h>
43__KERNEL_RCSID(0, "$NetBSD: pci_usrreq.c,v 1.30 2016/09/24 23:12:54 mrg Exp $");
44
45#ifdef _KERNEL_OPT
46#include "opt_pci.h"
47#endif
48
49#include <sys/param.h>
50#include <sys/conf.h>
51#include <sys/device.h>
52#include <sys/ioctl.h>
53#include <sys/proc.h>
54#include <sys/systm.h>
55#include <sys/errno.h>
56#include <sys/fcntl.h>
57#include <sys/kauth.h>
58
59#include <dev/pci/pcireg.h>
60#include <dev/pci/pcivar.h>
61#include <dev/pci/pciio.h>
62
63static int
64pciopen(dev_t dev, int flags, int mode, struct lwp *l)
65{
66 device_t dv;
67
68 dv = device_lookup(&pci_cd, minor(dev));
69 if (dv == NULL)
70 return ENXIO;
71
72 return 0;
73}
74
75static int
76pciioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
77{
78 struct pci_softc *sc = device_lookup_private(&pci_cd, minor(dev));
79 struct pci_child *child;
80 struct pciio_bdf_cfgreg *bdfr;
81 struct pciio_businfo *binfo;
82 struct pciio_drvname *dname;
83 struct pciio_drvnameonbus *dnameonbus;
84 pcitag_t tag;
85
86 switch (cmd) {
87 case PCI_IOC_BDF_CFGREAD:
88 case PCI_IOC_BDF_CFGWRITE:
89 bdfr = data;
90 if (bdfr->bus > 255 || bdfr->device >= sc->sc_maxndevs ||
91 bdfr->function > 7 || ISSET(bdfr->cfgreg.reg, 3))
92 return EINVAL;
93 tag = pci_make_tag(sc->sc_pc, bdfr->bus, bdfr->device,
94 bdfr->function);
95
96 if (cmd == PCI_IOC_BDF_CFGREAD) {
97 bdfr->cfgreg.val = pci_conf_read(sc->sc_pc, tag,
98 bdfr->cfgreg.reg);
99 } else {
100 if ((flag & FWRITE) == 0)
101 return EBADF;
102 pci_conf_write(sc->sc_pc, tag, bdfr->cfgreg.reg,
103 bdfr->cfgreg.val);
104 }
105 return 0;
106
107 case PCI_IOC_BUSINFO:
108 binfo = data;
109 binfo->busno = sc->sc_bus;
110 binfo->maxdevs = sc->sc_maxndevs;
111 return 0;
112
113 case PCI_IOC_DRVNAME:
114 dname = data;
115 if (dname->device >= sc->sc_maxndevs || dname->function > 7)
116 return EINVAL;
117 child = &sc->PCI_SC_DEVICESC(dname->device, dname->function);
118 if (!child->c_dev)
119 return ENXIO;
120 strlcpy(dname->name, device_xname(child->c_dev),
121 sizeof dname->name);
122 return 0;
123
124 case PCI_IOC_DRVNAMEONBUS:
125 dnameonbus = data;
126 int i;
127
128 for (i = 0; i < pci_cd.cd_ndevs; i++) {
129 sc = device_lookup_private(&pci_cd, i);
130 if (sc->sc_bus == dnameonbus->bus)
131 break; /* found the right bus */
132 }
133 if (i == pci_cd.cd_ndevs || sc == NULL)
134 return ENXIO;
135 if (dnameonbus->device >= sc->sc_maxndevs ||
136 dnameonbus->function > 7)
137 return EINVAL;
138
139 child = &sc->PCI_SC_DEVICESC(dnameonbus->device,
140 dnameonbus->function);
141 if (!child->c_dev)
142 return ENXIO;
143 strlcpy(dnameonbus->name, device_xname(child->c_dev),
144 sizeof dnameonbus->name);
145 return 0;
146
147 default:
148 return ENOTTY;
149 }
150}
151
152static paddr_t
153pcimmap(dev_t dev, off_t offset, int prot)
154{
155 struct pci_softc *sc = device_lookup_private(&pci_cd, minor(dev));
156 struct pci_child *c;
157 struct pci_range *r;
158 int flags = 0;
159 int device, range;
160
161 if (kauth_authorize_machdep(kauth_cred_get(), KAUTH_MACHDEP_UNMANAGEDMEM,
162 NULL, NULL, NULL, NULL) != 0) {
163 return -1;
164 }
165 /*
166 * Since we allow mapping of the entire bus, we
167 * take the offset to be the address on the bus,
168 * and pass 0 as the offset into that range.
169 *
170 * XXX Need a way to deal with linear/etc.
171 *
172 * XXX we rely on MD mmap() methods to enforce limits since these
173 * are hidden in *_tag_t structs if they exist at all
174 */
175
176#ifdef PCI_MAGIC_IO_RANGE
177 /*
178 * first, check if someone's trying to map the IO range
179 * XXX this assumes 64kB IO space even though some machines can have
180 * significantly more than that - macppc's bandit host bridge allows
181 * 8MB IO space and sparc64 may have the entire 4GB available. The
182 * firmware on both tries to use the lower 64kB first though and
183 * exausting it is pretty difficult so we should be safe
184 */
185 if ((offset >= PCI_MAGIC_IO_RANGE) &&
186 (offset < (PCI_MAGIC_IO_RANGE + 0x10000))) {
187 return bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE,
188 0, prot, 0);
189 }
190#endif /* PCI_MAGIC_IO_RANGE */
191
192 for (device = 0; device < __arraycount(sc->sc_devices); device++) {
193 c = &sc->sc_devices[device];
194 if (c->c_dev == NULL)
195 continue;
196 for (range = 0; range < __arraycount(c->c_range); range++) {
197 r = &c->c_range[range];
198 if (r->r_size == 0)
199 break;
200 if (offset >= r->r_offset &&
201 offset < r->r_offset + r->r_size) {
202 flags = r->r_flags;
203 break;
204 }
205 }
206 }
207
208 return bus_space_mmap(sc->sc_memt, offset, 0, prot, flags);
209}
210
211const struct cdevsw pci_cdevsw = {
212 .d_open = pciopen,
213 .d_close = nullclose,
214 .d_read = noread,
215 .d_write = nowrite,
216 .d_ioctl = pciioctl,
217 .d_stop = nostop,
218 .d_tty = notty,
219 .d_poll = nopoll,
220 .d_mmap = pcimmap,
221 .d_kqfilter = nokqfilter,
222 .d_discard = nodiscard,
223 .d_flag = D_OTHER
224};
225
226/*
227 * pci_devioctl:
228 *
229 * PCI ioctls that can be performed on devices directly.
230 */
231int
232pci_devioctl(pci_chipset_tag_t pc, pcitag_t tag, u_long cmd, void *data,
233 int flag, struct lwp *l)
234{
235 struct pciio_cfgreg *r = (void *) data;
236
237 switch (cmd) {
238 case PCI_IOC_CFGREAD:
239 r->val = pci_conf_read(pc, tag, r->reg);
240 break;
241
242 case PCI_IOC_CFGWRITE:
243 if ((flag & FWRITE) == 0)
244 return EBADF;
245 pci_conf_write(pc, tag, r->reg, r->val);
246 break;
247
248 default:
249 return EPASSTHROUGH;
250 }
251
252 return 0;
253}
254